1 /* 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016-2023, Broadcom Inc. All rights reserved. 5 * Support: <fbsd-storage-driver.pdl@broadcom.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation and/or other 15 * materials provided with the distribution. 16 * 3. Neither the name of the Broadcom Inc. nor the names of its contributors 17 * may be used to endorse or promote products derived from this software without 18 * specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 * 32 * The views and conclusions contained in the software and documentation are 33 * those of the authors and should not be interpreted as representing 34 * official policies,either expressed or implied, of the FreeBSD Project. 35 * 36 * Mail to: Broadcom Inc 1320 Ridder Park Dr, San Jose, CA 95131 37 * 38 * Broadcom Inc. (Broadcom) MPI3MR Adapter FreeBSD 39 * 40 */ 41 42 #ifndef MPI30_IOC_H 43 #define MPI30_IOC_H 1 44 45 /***************************************************************************** 46 * IOC Messages * 47 ****************************************************************************/ 48 49 /***************************************************************************** 50 * IOCInit Request Message * 51 ****************************************************************************/ 52 typedef struct _MPI3_IOC_INIT_REQUEST 53 { 54 U16 HostTag; /* 0x00 */ 55 U8 IOCUseOnly02; /* 0x02 */ 56 U8 Function; /* 0x03 */ 57 U16 IOCUseOnly04; /* 0x04 */ 58 U8 IOCUseOnly06; /* 0x06 */ 59 U8 MsgFlags; /* 0x07 */ 60 U16 ChangeCount; /* 0x08 */ 61 U16 Reserved0A; /* 0x0A */ 62 MPI3_VERSION_UNION MPIVersion; /* 0x0C */ 63 U64 TimeStamp; /* 0x10 */ 64 U8 Reserved18; /* 0x18 */ 65 U8 WhoInit; /* 0x19 */ 66 U16 Reserved1A; /* 0x1A */ 67 U16 ReplyFreeQueueDepth; /* 0x1C */ 68 U16 Reserved1E; /* 0x1E */ 69 U64 ReplyFreeQueueAddress; /* 0x20 */ 70 U32 Reserved28; /* 0x28 */ 71 U16 SenseBufferFreeQueueDepth; /* 0x2C */ 72 U16 SenseBufferLength; /* 0x2E */ 73 U64 SenseBufferFreeQueueAddress; /* 0x30 */ 74 U64 DriverInformationAddress; /* 0x38 */ 75 } MPI3_IOC_INIT_REQUEST, MPI3_POINTER PTR_MPI3_IOC_INIT_REQUEST, 76 Mpi3IOCInitRequest_t, MPI3_POINTER pMpi3IOCInitRequest_t; 77 78 /**** Defines for the MsgFlags field ****/ 79 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_MASK (0x03) 80 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_NOT_USED (0x00) 81 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_SEPARATED (0x01) 82 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_INLINE (0x02) 83 #define MPI3_IOCINIT_MSGFLAGS_HOSTMETADATA_BOTH (0x03) 84 85 /**** Defines for the WhoInit field ****/ 86 #define MPI3_WHOINIT_NOT_INITIALIZED (0x00) 87 #define MPI3_WHOINIT_ROM_BIOS (0x02) 88 #define MPI3_WHOINIT_HOST_DRIVER (0x03) 89 #define MPI3_WHOINIT_MANUFACTURER (0x04) 90 91 /**** Defines for the DriverInformationAddress field */ 92 typedef struct _MPI3_DRIVER_INFO_LAYOUT 93 { 94 U32 InformationLength; /* 0x00 */ 95 U8 DriverSignature[12]; /* 0x04 */ 96 U8 OsName[16]; /* 0x10 */ 97 U8 OsVersion[12]; /* 0x20 */ 98 U8 DriverName[20]; /* 0x2C */ 99 U8 DriverVersion[32]; /* 0x40 */ 100 U8 DriverReleaseDate[20]; /* 0x60 */ 101 U32 DriverCapabilities; /* 0x74 */ 102 } MPI3_DRIVER_INFO_LAYOUT, MPI3_POINTER PTR_MPI3_DRIVER_INFO_LAYOUT, 103 Mpi3DriverInfoLayout_t, MPI3_POINTER pMpi3DriverInfoLayout_t; 104 105 /***************************************************************************** 106 * IOCFacts Request Message * 107 ****************************************************************************/ 108 typedef struct _MPI3_IOC_FACTS_REQUEST 109 { 110 U16 HostTag; /* 0x00 */ 111 U8 IOCUseOnly02; /* 0x02 */ 112 U8 Function; /* 0x03 */ 113 U16 IOCUseOnly04; /* 0x04 */ 114 U8 IOCUseOnly06; /* 0x06 */ 115 U8 MsgFlags; /* 0x07 */ 116 U16 ChangeCount; /* 0x08 */ 117 U16 Reserved0A; /* 0x0A */ 118 U32 Reserved0C; /* 0x0C */ 119 MPI3_SGE_UNION SGL; /* 0x10 */ 120 } MPI3_IOC_FACTS_REQUEST, MPI3_POINTER PTR_MPI3_IOC_FACTS_REQUEST, 121 Mpi3IOCFactsRequest_t, MPI3_POINTER pMpi3IOCFactsRequest_t; 122 123 /***************************************************************************** 124 * IOCFacts Data * 125 ****************************************************************************/ 126 typedef struct _MPI3_IOC_FACTS_DATA 127 { 128 U16 IOCFactsDataLength; /* 0x00 */ 129 U16 Reserved02; /* 0x02 */ 130 MPI3_VERSION_UNION MPIVersion; /* 0x04 */ 131 MPI3_COMP_IMAGE_VERSION FWVersion; /* 0x08 */ 132 U32 IOCCapabilities; /* 0x10 */ 133 U8 IOCNumber; /* 0x14 */ 134 U8 WhoInit; /* 0x15 */ 135 U16 MaxMSIxVectors; /* 0x16 */ 136 U16 MaxOutstandingRequests; /* 0x18 */ 137 U16 ProductID; /* 0x1A */ 138 U16 IOCRequestFrameSize; /* 0x1C */ 139 U16 ReplyFrameSize; /* 0x1E */ 140 U16 IOCExceptions; /* 0x20 */ 141 U16 MaxPersistentID; /* 0x22 */ 142 U8 SGEModifierMask; /* 0x24 */ 143 U8 SGEModifierValue; /* 0x25 */ 144 U8 SGEModifierShift; /* 0x26 */ 145 U8 ProtocolFlags; /* 0x27 */ 146 U16 MaxSASInitiators; /* 0x28 */ 147 U16 MaxDataLength; /* 0x2A */ 148 U16 MaxSASExpanders; /* 0x2C */ 149 U16 MaxEnclosures; /* 0x2E */ 150 U16 MinDevHandle; /* 0x30 */ 151 U16 MaxDevHandle; /* 0x32 */ 152 U16 MaxPCIeSwitches; /* 0x34 */ 153 U16 MaxNVMe; /* 0x36 */ 154 U16 Reserved38; /* 0x38 */ 155 U16 MaxVDs; /* 0x3A */ 156 U16 MaxHostPDs; /* 0x3C */ 157 U16 MaxAdvHostPDs; /* 0x3E */ 158 U16 MaxRAIDPDs; /* 0x40 */ 159 U16 MaxPostedCmdBuffers; /* 0x42 */ 160 U32 Flags; /* 0x44 */ 161 U16 MaxOperationalRequestQueues; /* 0x48 */ 162 U16 MaxOperationalReplyQueues; /* 0x4A */ 163 U16 ShutdownTimeout; /* 0x4C */ 164 U16 Reserved4E; /* 0x4E */ 165 U32 DiagTraceSize; /* 0x50 */ 166 U32 DiagFwSize; /* 0x54 */ 167 U32 DiagDriverSize; /* 0x58 */ 168 U8 MaxHostPDNsCount; /* 0x5C */ 169 U8 MaxAdvHostPDNsCount; /* 0x5D */ 170 U8 MaxRAIDPDNsCount; /* 0x5E */ 171 U8 MaxDevicesPerThrottleGroup; /* 0x5F */ 172 U16 IOThrottleDataLength; /* 0x60 */ 173 U16 MaxIOThrottleGroup; /* 0x62 */ 174 U16 IOThrottleLow; /* 0x64 */ 175 U16 IOThrottleHigh; /* 0x66 */ 176 } MPI3_IOC_FACTS_DATA, MPI3_POINTER PTR_MPI3_IOC_FACTS_DATA, 177 Mpi3IOCFactsData_t, MPI3_POINTER pMpi3IOCFactsData_t; 178 179 /**** Defines for the IOCCapabilities field ****/ 180 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_MASK (0x80000000) 181 #define MPI3_IOCFACTS_CAPABILITY_SUPERVISOR_IOC (0x00000000) 182 #define MPI3_IOCFACTS_CAPABILITY_NON_SUPERVISOR_IOC (0x80000000) 183 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_MASK (0x00000600) 184 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_FIXED_THRESHOLD (0x00000000) 185 #define MPI3_IOCFACTS_CAPABILITY_INT_COALESCE_OUTSTANDING_IO (0x00000200) 186 #define MPI3_IOCFACTS_CAPABILITY_COMPLETE_RESET_CAPABLE (0x00000100) 187 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_TRACE_ENABLED (0x00000080) 188 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_FW_ENABLED (0x00000040) 189 #define MPI3_IOCFACTS_CAPABILITY_SEG_DIAG_DRIVER_ENABLED (0x00000020) 190 #define MPI3_IOCFACTS_CAPABILITY_ADVANCED_HOST_PD_ENABLED (0x00000010) 191 #define MPI3_IOCFACTS_CAPABILITY_RAID_CAPABLE (0x00000008) 192 #define MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED (0x00000002) 193 #define MPI3_IOCFACTS_CAPABILITY_COALESCE_CTRL_SUPPORTED (0x00000001) 194 195 /**** WhoInit values are defined under IOCInit Request Message definition ****/ 196 197 /**** Defines for the ProductID field ****/ 198 #define MPI3_IOCFACTS_PID_TYPE_MASK (0xF000) 199 #define MPI3_IOCFACTS_PID_TYPE_SHIFT (12) 200 #define MPI3_IOCFACTS_PID_PRODUCT_MASK (0x0F00) 201 #define MPI3_IOCFACTS_PID_PRODUCT_SHIFT (8) 202 #define MPI3_IOCFACTS_PID_FAMILY_MASK (0x00FF) 203 #define MPI3_IOCFACTS_PID_FAMILY_SHIFT (0) 204 205 /**** Defines for the IOCExceptions field ****/ 206 #define MPI3_IOCFACTS_EXCEPT_SECURITY_REKEY (0x2000) 207 #define MPI3_IOCFACTS_EXCEPT_SAS_DISABLED (0x1000) 208 #define MPI3_IOCFACTS_EXCEPT_SAFE_MODE (0x0800) 209 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_MASK (0x0700) 210 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_NONE (0x0000) 211 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_MGMT (0x0100) 212 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_MGMT (0x0200) 213 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_MGMT (0x0300) 214 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_LOCAL_VIA_OOB (0x0400) 215 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_EXT_VIA_OOB (0x0500) 216 #define MPI3_IOCFACTS_EXCEPT_SECURITY_KEY_DRIVE_EXT_VIA_OOB (0x0600) 217 #define MPI3_IOCFACTS_EXCEPT_PCIE_DISABLED (0x0080) 218 #define MPI3_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE (0x0040) 219 #define MPI3_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0020) 220 #define MPI3_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0010) 221 #define MPI3_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0008) 222 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x0001) 223 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_PRIMARY (0x0000) 224 #define MPI3_IOCFACTS_EXCEPT_BOOTSTAT_SECONDARY (0x0001) 225 226 /**** Defines for the ProtocolFlags field ****/ 227 #define MPI3_IOCFACTS_PROTOCOL_SAS (0x0010) 228 #define MPI3_IOCFACTS_PROTOCOL_SATA (0x0008) 229 #define MPI3_IOCFACTS_PROTOCOL_NVME (0x0004) 230 #define MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) 231 #define MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) 232 233 /**** Defines for the MaxDataLength field ****/ 234 #define MPI3_IOCFACTS_MAX_DATA_LENGTH_NOT_REPORTED (0x0000) 235 236 /**** Defines for the Flags field ****/ 237 #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED (0x00010000) 238 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK (0x0000FF00) 239 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT (8) 240 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK (0x00000030) 241 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED (0x00000000) 242 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_IN_PROGRESS (0x00000010) 243 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_COMPLETE (0x00000020) 244 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK (0x0000000F) 245 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA (0x00000000) 246 #define MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR (0x00000002) 247 248 /**** Defines for the IOThrottleDataLength field ****/ 249 #define MPI3_IOCFACTS_IO_THROTTLE_DATA_LENGTH_NOT_REQUIRED (0x0000) 250 251 /**** Defines for the IOThrottleDataLength field ****/ 252 #define MPI3_IOCFACTS_MAX_IO_THROTTLE_GROUP_NOT_REQUIRED (0x0000) 253 254 /***************************************************************************** 255 * Management Passthrough Request Message * 256 ****************************************************************************/ 257 typedef struct _MPI3_MGMT_PASSTHROUGH_REQUEST 258 { 259 U16 HostTag; /* 0x00 */ 260 U8 IOCUseOnly02; /* 0x02 */ 261 U8 Function; /* 0x03 */ 262 U16 IOCUseOnly04; /* 0x04 */ 263 U8 IOCUseOnly06; /* 0x06 */ 264 U8 MsgFlags; /* 0x07 */ 265 U16 ChangeCount; /* 0x08 */ 266 U16 Reserved0A; /* 0x0A */ 267 U32 Reserved0C[5]; /* 0x0C */ 268 MPI3_SGE_UNION CommandSGL; /* 0x20 */ 269 MPI3_SGE_UNION ResponseSGL; /* 0x30 */ 270 } MPI3_MGMT_PASSTHROUGH_REQUEST, MPI3_POINTER PTR_MPI3_MGMT_PASSTHROUGH_REQUEST, 271 Mpi3MgmtPassthroughRequest_t, MPI3_POINTER pMpi3MgmtPassthroughRequest_t; 272 273 /***************************************************************************** 274 * CreateRequestQueue Request Message * 275 ****************************************************************************/ 276 typedef struct _MPI3_CREATE_REQUEST_QUEUE_REQUEST 277 { 278 U16 HostTag; /* 0x00 */ 279 U8 IOCUseOnly02; /* 0x02 */ 280 U8 Function; /* 0x03 */ 281 U16 IOCUseOnly04; /* 0x04 */ 282 U8 IOCUseOnly06; /* 0x06 */ 283 U8 MsgFlags; /* 0x07 */ 284 U16 ChangeCount; /* 0x08 */ 285 U8 Flags; /* 0x0A */ 286 U8 Burst; /* 0x0B */ 287 U16 Size; /* 0x0C */ 288 U16 QueueID; /* 0x0E */ 289 U16 ReplyQueueID; /* 0x10 */ 290 U16 Reserved12; /* 0x12 */ 291 U32 Reserved14; /* 0x14 */ 292 U64 BaseAddress; /* 0x18 */ 293 } MPI3_CREATE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REQUEST_QUEUE_REQUEST, 294 Mpi3CreateRequestQueueRequest_t, MPI3_POINTER pMpi3CreateRequestQueueRequest_t; 295 296 /**** Defines for the Flags field ****/ 297 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 298 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 299 #define MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 300 301 /**** Defines for the Size field ****/ 302 #define MPI3_CREATE_REQUEST_QUEUE_SIZE_MINIMUM (2) 303 304 /***************************************************************************** 305 * DeleteRequestQueue Request Message * 306 ****************************************************************************/ 307 typedef struct _MPI3_DELETE_REQUEST_QUEUE_REQUEST 308 { 309 U16 HostTag; /* 0x00 */ 310 U8 IOCUseOnly02; /* 0x02 */ 311 U8 Function; /* 0x03 */ 312 U16 IOCUseOnly04; /* 0x04 */ 313 U8 IOCUseOnly06; /* 0x06 */ 314 U8 MsgFlags; /* 0x07 */ 315 U16 ChangeCount; /* 0x08 */ 316 U16 QueueID; /* 0x0A */ 317 } MPI3_DELETE_REQUEST_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REQUEST_QUEUE_REQUEST, 318 Mpi3DeleteRequestQueueRequest_t, MPI3_POINTER pMpi3DeleteRequestQueueRequest_t; 319 320 321 /***************************************************************************** 322 * CreateReplyQueue Request Message * 323 ****************************************************************************/ 324 typedef struct _MPI3_CREATE_REPLY_QUEUE_REQUEST 325 { 326 U16 HostTag; /* 0x00 */ 327 U8 IOCUseOnly02; /* 0x02 */ 328 U8 Function; /* 0x03 */ 329 U16 IOCUseOnly04; /* 0x04 */ 330 U8 IOCUseOnly06; /* 0x06 */ 331 U8 MsgFlags; /* 0x07 */ 332 U16 ChangeCount; /* 0x08 */ 333 U8 Flags; /* 0x0A */ 334 U8 Reserved0B; /* 0x0B */ 335 U16 Size; /* 0x0C */ 336 U16 QueueID; /* 0x0E */ 337 U16 MSIxIndex; /* 0x10 */ 338 U16 Reserved12; /* 0x12 */ 339 U32 Reserved14; /* 0x14 */ 340 U64 BaseAddress; /* 0x18 */ 341 } MPI3_CREATE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_CREATE_REPLY_QUEUE_REQUEST, 342 Mpi3CreateReplyQueueRequest_t, MPI3_POINTER pMpi3CreateReplyQueueRequest_t; 343 344 /**** Defines for the Flags field ****/ 345 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_MASK (0x80) 346 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_SEGMENTED (0x80) 347 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_SEGMENTED_CONTIGUOUS (0x00) 348 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_COALESCE_DISABLE (0x02) 349 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_MASK (0x01) 350 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_DISABLE (0x00) 351 #define MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE (0x01) 352 353 /**** Defines for the Size field ****/ 354 #define MPI3_CREATE_REPLY_QUEUE_SIZE_MINIMUM (2) 355 356 /***************************************************************************** 357 * DeleteReplyQueue Request Message * 358 ****************************************************************************/ 359 typedef struct _MPI3_DELETE_REPLY_QUEUE_REQUEST 360 { 361 U16 HostTag; /* 0x00 */ 362 U8 IOCUseOnly02; /* 0x02 */ 363 U8 Function; /* 0x03 */ 364 U16 IOCUseOnly04; /* 0x04 */ 365 U8 IOCUseOnly06; /* 0x06 */ 366 U8 MsgFlags; /* 0x07 */ 367 U16 ChangeCount; /* 0x08 */ 368 U16 QueueID; /* 0x0A */ 369 } MPI3_DELETE_REPLY_QUEUE_REQUEST, MPI3_POINTER PTR_MPI3_DELETE_REPLY_QUEUE_REQUEST, 370 Mpi3DeleteReplyQueueRequest_t, MPI3_POINTER pMpi3DeleteReplyQueueRequest_t; 371 372 373 /***************************************************************************** 374 * PortEnable Request Message * 375 ****************************************************************************/ 376 typedef struct _MPI3_PORT_ENABLE_REQUEST 377 { 378 U16 HostTag; /* 0x00 */ 379 U8 IOCUseOnly02; /* 0x02 */ 380 U8 Function; /* 0x03 */ 381 U16 IOCUseOnly04; /* 0x04 */ 382 U8 IOCUseOnly06; /* 0x06 */ 383 U8 MsgFlags; /* 0x07 */ 384 U16 ChangeCount; /* 0x08 */ 385 U16 Reserved0A; /* 0x0A */ 386 } MPI3_PORT_ENABLE_REQUEST, MPI3_POINTER PTR_MPI3_PORT_ENABLE_REQUEST, 387 Mpi3PortEnableRequest_t, MPI3_POINTER pMpi3PortEnableRequest_t; 388 389 390 /***************************************************************************** 391 * IOC Events and Event Management * 392 ****************************************************************************/ 393 #define MPI3_EVENT_LOG_DATA (0x01) 394 #define MPI3_EVENT_CHANGE (0x02) 395 #define MPI3_EVENT_GPIO_INTERRUPT (0x04) 396 #define MPI3_EVENT_CABLE_MGMT (0x06) 397 #define MPI3_EVENT_DEVICE_ADDED (0x07) 398 #define MPI3_EVENT_DEVICE_INFO_CHANGED (0x08) 399 #define MPI3_EVENT_PREPARE_FOR_RESET (0x09) 400 #define MPI3_EVENT_COMP_IMAGE_ACT_START (0x0A) 401 #define MPI3_EVENT_ENCL_DEVICE_ADDED (0x0B) 402 #define MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE (0x0C) 403 #define MPI3_EVENT_DEVICE_STATUS_CHANGE (0x0D) 404 #define MPI3_EVENT_ENERGY_PACK_CHANGE (0x0E) 405 #define MPI3_EVENT_SAS_DISCOVERY (0x11) 406 #define MPI3_EVENT_SAS_BROADCAST_PRIMITIVE (0x12) 407 #define MPI3_EVENT_SAS_NOTIFY_PRIMITIVE (0x13) 408 #define MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x14) 409 #define MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW (0x15) 410 #define MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x16) 411 #define MPI3_EVENT_SAS_PHY_COUNTER (0x18) 412 #define MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR (0x19) 413 #define MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST (0x20) 414 #define MPI3_EVENT_PCIE_ENUMERATION (0x22) 415 #define MPI3_EVENT_PCIE_ERROR_THRESHOLD (0x23) 416 #define MPI3_EVENT_HARD_RESET_RECEIVED (0x40) 417 #define MPI3_EVENT_DIAGNOSTIC_BUFFER_STATUS_CHANGE (0x50) 418 #define MPI3_EVENT_MIN_PRODUCT_SPECIFIC (0x60) 419 #define MPI3_EVENT_MAX_PRODUCT_SPECIFIC (0x7F) 420 421 422 /***************************************************************************** 423 * Event Notification Request Message * 424 ****************************************************************************/ 425 #define MPI3_EVENT_NOTIFY_EVENTMASK_WORDS (4) 426 427 typedef struct _MPI3_EVENT_NOTIFICATION_REQUEST 428 { 429 U16 HostTag; /* 0x00 */ 430 U8 IOCUseOnly02; /* 0x02 */ 431 U8 Function; /* 0x03 */ 432 U16 IOCUseOnly04; /* 0x04 */ 433 U8 IOCUseOnly06; /* 0x06 */ 434 U8 MsgFlags; /* 0x07 */ 435 U16 ChangeCount; /* 0x08 */ 436 U16 Reserved0A; /* 0x0A */ 437 U16 SASBroadcastPrimitiveMasks; /* 0x0C */ 438 U16 SASNotifyPrimitiveMasks; /* 0x0E */ 439 U32 EventMasks[MPI3_EVENT_NOTIFY_EVENTMASK_WORDS]; /* 0x10 */ 440 } MPI3_EVENT_NOTIFICATION_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REQUEST, 441 Mpi3EventNotificationRequest_t, MPI3_POINTER pMpi3EventNotificationRequest_t; 442 443 /**** Defines for the SASBroadcastPrimitiveMasks field - use MPI3_EVENT_PRIMITIVE_ values ****/ 444 445 /**** Defines for the SASNotifyPrimitiveMasks field - use MPI3_EVENT_NOTIFY_ values ****/ 446 447 /**** Defines for the EventMasks field - use MPI3_EVENT_ values ****/ 448 449 /***************************************************************************** 450 * Event Notification Reply Message * 451 ****************************************************************************/ 452 typedef struct _MPI3_EVENT_NOTIFICATION_REPLY 453 { 454 U16 HostTag; /* 0x00 */ 455 U8 IOCUseOnly02; /* 0x02 */ 456 U8 Function; /* 0x03 */ 457 U16 IOCUseOnly04; /* 0x04 */ 458 U8 IOCUseOnly06; /* 0x06 */ 459 U8 MsgFlags; /* 0x07 */ 460 U16 IOCUseOnly08; /* 0x08 */ 461 U16 IOCStatus; /* 0x0A */ 462 U32 IOCLogInfo; /* 0x0C */ 463 U8 EventDataLength; /* 0x10 */ 464 U8 Event; /* 0x11 */ 465 U16 IOCChangeCount; /* 0x12 */ 466 U32 EventContext; /* 0x14 */ 467 U32 EventData[1]; /* 0x18 */ 468 } MPI3_EVENT_NOTIFICATION_REPLY, MPI3_POINTER PTR_MPI3_EVENT_NOTIFICATION_REPLY, 469 Mpi3EventNotificationReply_t, MPI3_POINTER pMpi3EventNotificationReply_t; 470 471 /**** Defines for the MsgFlags field ****/ 472 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_MASK (0x01) 473 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_REQUIRED (0x01) 474 #define MPI3_EVENT_NOTIFY_MSGFLAGS_ACK_NOT_REQUIRED (0x00) 475 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_MASK (0x02) 476 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_ORIGINAL (0x00) 477 #define MPI3_EVENT_NOTIFY_MSGFLAGS_EVENT_ORIGINALITY_REPLAY (0x02) 478 479 /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 480 481 482 /***************************************************************************** 483 * GPIO Interrupt Event * 484 ****************************************************************************/ 485 typedef struct _MPI3_EVENT_DATA_GPIO_INTERRUPT 486 { 487 U8 GPIONum; /* 0x00 */ 488 U8 Reserved01[3]; /* 0x01 */ 489 } MPI3_EVENT_DATA_GPIO_INTERRUPT, MPI3_POINTER PTR_MPI3_EVENT_DATA_GPIO_INTERRUPT, 490 Mpi3EventDataGpioInterrupt_t, MPI3_POINTER pMpi3EventDataGpioInterrupt_t; 491 492 493 /***************************************************************************** 494 * Cable Management Event * 495 ****************************************************************************/ 496 typedef struct _MPI3_EVENT_DATA_CABLE_MANAGEMENT 497 { 498 U32 ActiveCablePowerRequirement; /* 0x00 */ 499 U8 Status; /* 0x04 */ 500 U8 ReceptacleID; /* 0x05 */ 501 U16 Reserved06; /* 0x06 */ 502 } MPI3_EVENT_DATA_CABLE_MANAGEMENT, MPI3_POINTER PTR_MPI3_EVENT_DATA_CABLE_MANAGEMENT, 503 Mpi3EventDataCableManagement_t, MPI3_POINTER pMpi3EventDataCableManagement_t; 504 505 /**** Defines for the ActiveCablePowerRequirement field ****/ 506 #define MPI3_EVENT_CABLE_MGMT_ACT_CABLE_PWR_INVALID (0xFFFFFFFF) 507 508 /**** Defines for the Status field ****/ 509 #define MPI3_EVENT_CABLE_MGMT_STATUS_INSUFFICIENT_POWER (0x00) 510 #define MPI3_EVENT_CABLE_MGMT_STATUS_PRESENT (0x01) 511 #define MPI3_EVENT_CABLE_MGMT_STATUS_DEGRADED (0x02) 512 513 514 /***************************************************************************** 515 * Event Ack Request Message * 516 ****************************************************************************/ 517 typedef struct _MPI3_EVENT_ACK_REQUEST 518 { 519 U16 HostTag; /* 0x00 */ 520 U8 IOCUseOnly02; /* 0x02 */ 521 U8 Function; /* 0x03 */ 522 U16 IOCUseOnly04; /* 0x04 */ 523 U8 IOCUseOnly06; /* 0x06 */ 524 U8 MsgFlags; /* 0x07 */ 525 U16 ChangeCount; /* 0x08 */ 526 U16 Reserved0A; /* 0x0A */ 527 U8 Event; /* 0x0C */ 528 U8 Reserved0D[3]; /* 0x0D */ 529 U32 EventContext; /* 0x10 */ 530 } MPI3_EVENT_ACK_REQUEST, MPI3_POINTER PTR_MPI3_EVENT_ACK_REQUEST, 531 Mpi3EventAckRequest_t, MPI3_POINTER pMpi3EventAckRequest_t; 532 533 /**** Defines for the Event field - use MPI3_EVENT_ values ****/ 534 535 536 /***************************************************************************** 537 * Prepare for Reset Event * 538 ****************************************************************************/ 539 typedef struct _MPI3_EVENT_DATA_PREPARE_FOR_RESET 540 { 541 U8 ReasonCode; /* 0x00 */ 542 U8 Reserved01; /* 0x01 */ 543 U16 Reserved02; /* 0x02 */ 544 } MPI3_EVENT_DATA_PREPARE_FOR_RESET, MPI3_POINTER PTR_MPI3_EVENT_DATA_PREPARE_FOR_RESET, 545 Mpi3EventDataPrepareForReset_t, MPI3_POINTER pMpi3EventDataPrepareForReset_t; 546 547 /**** Defines for the ReasonCode field ****/ 548 #define MPI3_EVENT_PREPARE_RESET_RC_START (0x01) 549 #define MPI3_EVENT_PREPARE_RESET_RC_ABORT (0x02) 550 551 552 /***************************************************************************** 553 * Component Image Activation Start Event * 554 ****************************************************************************/ 555 typedef struct _MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION 556 { 557 U32 Reserved00; /* 0x00 */ 558 } MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_COMP_IMAGE_ACTIVATION, 559 Mpi3EventDataCompImageActivation_t, MPI3_POINTER pMpi3EventDataCompImageActivation_t; 560 561 /***************************************************************************** 562 * Device Added Event * 563 ****************************************************************************/ 564 /* 565 * The Device Added Event Data is exactly the same as Device Page 0 data 566 * (including the Configuration Page header). So, please use/refer to 567 * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 568 */ 569 570 /**************************************************************************** 571 * Device Info Changed Event * 572 ****************************************************************************/ 573 /* 574 * The Device Info Changed Event Data is exactly the same as Device Page 0 data 575 * (including the Configuration Page header). So, please use/refer to 576 * MPI3_DEVICE_PAGE0 structure for Device Added Event data. 577 */ 578 579 /***************************************************************************** 580 * Device Status Change Event * 581 ****************************************************************************/ 582 typedef struct _MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE 583 { 584 U16 TaskTag; /* 0x00 */ 585 U8 ReasonCode; /* 0x02 */ 586 U8 IOUnitPort; /* 0x03 */ 587 U16 ParentDevHandle; /* 0x04 */ 588 U16 DevHandle; /* 0x06 */ 589 U64 WWID; /* 0x08 */ 590 U8 LUN[8]; /* 0x10 */ 591 } MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DEVICE_STATUS_CHANGE, 592 Mpi3EventDataDeviceStatusChange_t, MPI3_POINTER pMpi3EventDataDeviceStatusChange_t; 593 594 /**** Defines for the ReasonCode field ****/ 595 #define MPI3_EVENT_DEV_STAT_RC_MOVED (0x01) 596 #define MPI3_EVENT_DEV_STAT_RC_HIDDEN (0x02) 597 #define MPI3_EVENT_DEV_STAT_RC_NOT_HIDDEN (0x03) 598 #define MPI3_EVENT_DEV_STAT_RC_ASYNC_NOTIFICATION (0x04) 599 #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_STRT (0x20) 600 #define MPI3_EVENT_DEV_STAT_RC_INT_DEVICE_RESET_CMP (0x21) 601 #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_STRT (0x22) 602 #define MPI3_EVENT_DEV_STAT_RC_INT_TASK_ABORT_CMP (0x23) 603 #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_STRT (0x24) 604 #define MPI3_EVENT_DEV_STAT_RC_INT_IT_NEXUS_RESET_CMP (0x25) 605 #define MPI3_EVENT_DEV_STAT_RC_PCIE_HOT_RESET_FAILED (0x30) 606 #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_STRT (0x40) 607 #define MPI3_EVENT_DEV_STAT_RC_EXPANDER_REDUCED_FUNC_CMP (0x41) 608 #define MPI3_EVENT_DEV_STAT_RC_VD_NOT_RESPONDING (0x50) 609 610 /***************************************************************************** 611 * Energy Pack Change Event * 612 ****************************************************************************/ 613 typedef struct _MPI3_EVENT_DATA_ENERGY_PACK_CHANGE 614 { 615 U32 Reserved00; /* 0x00 */ 616 U16 ShutdownTimeout; /* 0x04 */ 617 U16 Reserved06; /* 0x06 */ 618 } MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_ENERGY_PACK_CHANGE, 619 Mpi3EventDataEnergyPackChange_t, MPI3_POINTER pMpi3EventDataEnergyPackChange_t; 620 621 /***************************************************************************** 622 * SAS Discovery Event * 623 ****************************************************************************/ 624 typedef struct _MPI3_EVENT_DATA_SAS_DISCOVERY 625 { 626 U8 Flags; /* 0x00 */ 627 U8 ReasonCode; /* 0x01 */ 628 U8 IOUnitPort; /* 0x02 */ 629 U8 Reserved03; /* 0x03 */ 630 U32 DiscoveryStatus; /* 0x04 */ 631 } MPI3_EVENT_DATA_SAS_DISCOVERY, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DISCOVERY, 632 Mpi3EventDataSasDiscovery_t, MPI3_POINTER pMpi3EventDataSasDiscovery_t; 633 634 /**** Defines for the Flags field ****/ 635 #define MPI3_EVENT_SAS_DISC_FLAGS_DEVICE_CHANGE (0x02) 636 #define MPI3_EVENT_SAS_DISC_FLAGS_IN_PROGRESS (0x01) 637 638 /**** Defines for the ReasonCode field ****/ 639 #define MPI3_EVENT_SAS_DISC_RC_STARTED (0x01) 640 #define MPI3_EVENT_SAS_DISC_RC_COMPLETED (0x02) 641 642 /**** Defines for the DiscoveryStatus field ****/ 643 #define MPI3_SAS_DISC_STATUS_MAX_ENCLOSURES_EXCEED (0x80000000) 644 #define MPI3_SAS_DISC_STATUS_MAX_EXPANDERS_EXCEED (0x40000000) 645 #define MPI3_SAS_DISC_STATUS_MAX_DEVICES_EXCEED (0x20000000) 646 #define MPI3_SAS_DISC_STATUS_MAX_TOPO_PHYS_EXCEED (0x10000000) 647 #define MPI3_SAS_DISC_STATUS_INVALID_CEI (0x00010000) 648 #define MPI3_SAS_DISC_STATUS_FECEI_MISMATCH (0x00008000) 649 #define MPI3_SAS_DISC_STATUS_MULTIPLE_DEVICES_IN_SLOT (0x00004000) 650 #define MPI3_SAS_DISC_STATUS_NECEI_MISMATCH (0x00002000) 651 #define MPI3_SAS_DISC_STATUS_TOO_MANY_SLOTS (0x00001000) 652 #define MPI3_SAS_DISC_STATUS_EXP_MULTI_SUBTRACTIVE (0x00000800) 653 #define MPI3_SAS_DISC_STATUS_MULTI_PORT_DOMAIN (0x00000400) 654 #define MPI3_SAS_DISC_STATUS_TABLE_TO_SUBTRACTIVE_LINK (0x00000200) 655 #define MPI3_SAS_DISC_STATUS_UNSUPPORTED_DEVICE (0x00000100) 656 #define MPI3_SAS_DISC_STATUS_TABLE_LINK (0x00000080) 657 #define MPI3_SAS_DISC_STATUS_SUBTRACTIVE_LINK (0x00000040) 658 #define MPI3_SAS_DISC_STATUS_SMP_CRC_ERROR (0x00000020) 659 #define MPI3_SAS_DISC_STATUS_SMP_FUNCTION_FAILED (0x00000010) 660 #define MPI3_SAS_DISC_STATUS_SMP_TIMEOUT (0x00000008) 661 #define MPI3_SAS_DISC_STATUS_MULTIPLE_PORTS (0x00000004) 662 #define MPI3_SAS_DISC_STATUS_INVALID_SAS_ADDRESS (0x00000002) 663 #define MPI3_SAS_DISC_STATUS_LOOP_DETECTED (0x00000001) 664 665 666 /***************************************************************************** 667 * SAS Broadcast Primitive Event * 668 ****************************************************************************/ 669 typedef struct _MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE 670 { 671 U8 PhyNum; /* 0x00 */ 672 U8 IOUnitPort; /* 0x01 */ 673 U8 PortWidth; /* 0x02 */ 674 U8 Primitive; /* 0x03 */ 675 } MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 676 Mpi3EventDataSasBroadcastPrimitive_t, MPI3_POINTER pMpi3EventDataSasBroadcastPrimitive_t; 677 678 /**** Defines for the Primitive field ****/ 679 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE (0x01) 680 #define MPI3_EVENT_BROADCAST_PRIMITIVE_SES (0x02) 681 #define MPI3_EVENT_BROADCAST_PRIMITIVE_EXPANDER (0x03) 682 #define MPI3_EVENT_BROADCAST_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) 683 #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED3 (0x05) 684 #define MPI3_EVENT_BROADCAST_PRIMITIVE_RESERVED4 (0x06) 685 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE0_RESERVED (0x07) 686 #define MPI3_EVENT_BROADCAST_PRIMITIVE_CHANGE1_RESERVED (0x08) 687 688 689 /***************************************************************************** 690 * SAS Notify Primitive Event * 691 ****************************************************************************/ 692 typedef struct _MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE 693 { 694 U8 PhyNum; /* 0x00 */ 695 U8 IOUnitPort; /* 0x01 */ 696 U8 Reserved02; /* 0x02 */ 697 U8 Primitive; /* 0x03 */ 698 } MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_NOTIFY_PRIMITIVE, 699 Mpi3EventDataSasNotifyPrimitive_t, MPI3_POINTER pMpi3EventDataSasNotifyPrimitive_t; 700 701 /**** Defines for the Primitive field ****/ 702 #define MPI3_EVENT_NOTIFY_PRIMITIVE_ENABLE_SPINUP (0x01) 703 #define MPI3_EVENT_NOTIFY_PRIMITIVE_POWER_LOSS_EXPECTED (0x02) 704 #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED1 (0x03) 705 #define MPI3_EVENT_NOTIFY_PRIMITIVE_RESERVED2 (0x04) 706 707 708 /***************************************************************************** 709 * SAS Topology Change List Event * 710 ****************************************************************************/ 711 #ifndef MPI3_EVENT_SAS_TOPO_PHY_COUNT 712 #define MPI3_EVENT_SAS_TOPO_PHY_COUNT (1) 713 #endif /* MPI3_EVENT_SAS_TOPO_PHY_COUNT */ 714 715 typedef struct _MPI3_EVENT_SAS_TOPO_PHY_ENTRY 716 { 717 U16 AttachedDevHandle; /* 0x00 */ 718 U8 LinkRate; /* 0x02 */ 719 U8 Status; /* 0x03 */ 720 } MPI3_EVENT_SAS_TOPO_PHY_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_SAS_TOPO_PHY_ENTRY, 721 Mpi3EventSasTopoPhyEntry_t, MPI3_POINTER pMpi3EventSasTopoPhyEntry_t; 722 723 /**** Defines for the LinkRate field ****/ 724 #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) 725 #define MPI3_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) 726 #define MPI3_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) 727 #define MPI3_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) 728 #define MPI3_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) 729 #define MPI3_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) 730 #define MPI3_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) 731 #define MPI3_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) 732 #define MPI3_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) 733 #define MPI3_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) 734 #define MPI3_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY (0x06) 735 #define MPI3_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) 736 #define MPI3_EVENT_SAS_TOPO_LR_RATE_12_0 (0x0B) 737 #define MPI3_EVENT_SAS_TOPO_LR_RATE_22_5 (0x0C) 738 739 /**** Defines for the PhyStatus field ****/ 740 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_MASK (0xC0) 741 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_SHIFT (6) 742 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_ACCESSIBLE (0x00) 743 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_NO_EXIST (0x40) 744 #define MPI3_EVENT_SAS_TOPO_PHY_STATUS_VACANT (0x80) 745 #define MPI3_EVENT_SAS_TOPO_PHY_RC_MASK (0x0F) 746 #define MPI3_EVENT_SAS_TOPO_PHY_RC_TARG_NOT_RESPONDING (0x02) 747 #define MPI3_EVENT_SAS_TOPO_PHY_RC_PHY_CHANGED (0x03) 748 #define MPI3_EVENT_SAS_TOPO_PHY_RC_NO_CHANGE (0x04) 749 #define MPI3_EVENT_SAS_TOPO_PHY_RC_DELAY_NOT_RESPONDING (0x05) 750 #define MPI3_EVENT_SAS_TOPO_PHY_RC_RESPONDING (0x06) 751 752 753 typedef struct _MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST 754 { 755 U16 EnclosureHandle; /* 0x00 */ 756 U16 ExpanderDevHandle; /* 0x02 */ 757 U8 NumPhys; /* 0x04 */ 758 U8 Reserved05[3]; /* 0x05 */ 759 U8 NumEntries; /* 0x08 */ 760 U8 StartPhyNum; /* 0x09 */ 761 U8 ExpStatus; /* 0x0A */ 762 U8 IOUnitPort; /* 0x0B */ 763 MPI3_EVENT_SAS_TOPO_PHY_ENTRY PhyEntry[MPI3_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C */ 764 } MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, 765 Mpi3EventDataSasTopologyChangeList_t, MPI3_POINTER pMpi3EventDataSasTopologyChangeList_t; 766 767 /**** Defines for the ExpStatus field ****/ 768 #define MPI3_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00) 769 #define MPI3_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) 770 #define MPI3_EVENT_SAS_TOPO_ES_RESPONDING (0x03) 771 #define MPI3_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) 772 773 /***************************************************************************** 774 * SAS PHY Counter Event * 775 ****************************************************************************/ 776 typedef struct _MPI3_EVENT_DATA_SAS_PHY_COUNTER 777 { 778 U64 TimeStamp; /* 0x00 */ 779 U32 Reserved08; /* 0x08 */ 780 U8 PhyEventCode; /* 0x0C */ 781 U8 PhyNum; /* 0x0D */ 782 U16 Reserved0E; /* 0x0E */ 783 U32 PhyEventInfo; /* 0x10 */ 784 U8 CounterType; /* 0x14 */ 785 U8 ThresholdWindow; /* 0x15 */ 786 U8 TimeUnits; /* 0x16 */ 787 U8 Reserved17; /* 0x17 */ 788 U32 EventThreshold; /* 0x18 */ 789 U16 ThresholdFlags; /* 0x1C */ 790 U16 Reserved1E; /* 0x1E */ 791 } MPI3_EVENT_DATA_SAS_PHY_COUNTER, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_PHY_COUNTER, 792 Mpi3EventDataSasPhyCounter_t, MPI3_POINTER pMpi3EventDataSasPhyCounter_t; 793 794 /**** Defines for the PhyEventCode field - use MPI3_SASPHY3_EVENT_CODE_ defines ****/ 795 796 /**** Defines for the CounterType field - use MPI3_SASPHY3_COUNTER_TYPE_ defines ****/ 797 798 /**** Defines for the TimeUnits field - use MPI3_SASPHY3_TIME_UNITS_ defines ****/ 799 800 /**** Defines for the ThresholdFlags field - use MPI3_SASPHY3_TFLAGS_ defines ****/ 801 802 803 /***************************************************************************** 804 * SAS Device Discovery Error Event * 805 ****************************************************************************/ 806 typedef struct _MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR 807 { 808 U16 DevHandle; /* 0x00 */ 809 U8 ReasonCode; /* 0x02 */ 810 U8 IOUnitPort; /* 0x03 */ 811 U32 Reserved04; /* 0x04 */ 812 U64 SASAddress; /* 0x08 */ 813 } MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_DEVICE_DISC_ERR, 814 Mpi3EventDataSasDeviceDiscErr_t, MPI3_POINTER pMpi3EventDataSasDeviceDiscErr_t; 815 816 /**** Defines for the ReasonCode field ****/ 817 #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_FAILED (0x01) 818 #define MPI3_EVENT_SAS_DISC_ERR_RC_SMP_TIMEOUT (0x02) 819 820 /***************************************************************************** 821 * PCIe Enumeration Event * 822 ****************************************************************************/ 823 typedef struct _MPI3_EVENT_DATA_PCIE_ENUMERATION 824 { 825 U8 Flags; /* 0x00 */ 826 U8 ReasonCode; /* 0x01 */ 827 U8 IOUnitPort; /* 0x02 */ 828 U8 Reserved03; /* 0x03 */ 829 U32 EnumerationStatus; /* 0x04 */ 830 } MPI3_EVENT_DATA_PCIE_ENUMERATION, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ENUMERATION, 831 Mpi3EventDataPcieEnumeration_t, MPI3_POINTER pMpi3EventDataPcieEnumeration_t; 832 833 /**** Defines for the Flags field ****/ 834 #define MPI3_EVENT_PCIE_ENUM_FLAGS_DEVICE_CHANGE (0x02) 835 #define MPI3_EVENT_PCIE_ENUM_FLAGS_IN_PROGRESS (0x01) 836 837 /**** Defines for the ReasonCode field ****/ 838 #define MPI3_EVENT_PCIE_ENUM_RC_STARTED (0x01) 839 #define MPI3_EVENT_PCIE_ENUM_RC_COMPLETED (0x02) 840 841 /**** Defines for the EnumerationStatus field ****/ 842 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCH_DEPTH_EXCEED (0x80000000) 843 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_SWITCHES_EXCEED (0x40000000) 844 #define MPI3_EVENT_PCIE_ENUM_ES_MAX_DEVICES_EXCEED (0x20000000) 845 #define MPI3_EVENT_PCIE_ENUM_ES_RESOURCES_EXHAUSTED (0x10000000) 846 847 848 /***************************************************************************** 849 * PCIe Topology Change List Event * 850 ****************************************************************************/ 851 #ifndef MPI3_EVENT_PCIE_TOPO_PORT_COUNT 852 #define MPI3_EVENT_PCIE_TOPO_PORT_COUNT (1) 853 #endif /* MPI3_EVENT_PCIE_TOPO_PORT_COUNT */ 854 855 typedef struct _MPI3_EVENT_PCIE_TOPO_PORT_ENTRY 856 { 857 U16 AttachedDevHandle; /* 0x00 */ 858 U8 PortStatus; /* 0x02 */ 859 U8 Reserved03; /* 0x03 */ 860 U8 CurrentPortInfo; /* 0x04 */ 861 U8 Reserved05; /* 0x05 */ 862 U8 PreviousPortInfo; /* 0x06 */ 863 U8 Reserved07; /* 0x07 */ 864 } MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, MPI3_POINTER PTR_MPI3_EVENT_PCIE_TOPO_PORT_ENTRY, 865 Mpi3EventPcieTopoPortEntry_t, MPI3_POINTER pMpi3EventPcieTopoPortEntry_t; 866 867 /**** Defines for the PortStatus field ****/ 868 #define MPI3_EVENT_PCIE_TOPO_PS_NOT_RESPONDING (0x02) 869 #define MPI3_EVENT_PCIE_TOPO_PS_PORT_CHANGED (0x03) 870 #define MPI3_EVENT_PCIE_TOPO_PS_NO_CHANGE (0x04) 871 #define MPI3_EVENT_PCIE_TOPO_PS_DELAY_NOT_RESPONDING (0x05) 872 #define MPI3_EVENT_PCIE_TOPO_PS_RESPONDING (0x06) 873 874 /**** Defines for the CurrentPortInfo and PreviousPortInfo field ****/ 875 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_MASK (0xF0) 876 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_UNKNOWN (0x00) 877 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_1 (0x10) 878 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_2 (0x20) 879 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_4 (0x30) 880 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_8 (0x40) 881 #define MPI3_EVENT_PCIE_TOPO_PI_LANES_16 (0x50) 882 883 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_MASK (0x0F) 884 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_UNKNOWN (0x00) 885 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_DISABLED (0x01) 886 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_2_5 (0x02) 887 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_5_0 (0x03) 888 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_8_0 (0x04) 889 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_16_0 (0x05) 890 #define MPI3_EVENT_PCIE_TOPO_PI_RATE_32_0 (0x06) 891 892 typedef struct _MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST 893 { 894 U16 EnclosureHandle; /* 0x00 */ 895 U16 SwitchDevHandle; /* 0x02 */ 896 U8 NumPorts; /* 0x04 */ 897 U8 Reserved05[3]; /* 0x05 */ 898 U8 NumEntries; /* 0x08 */ 899 U8 StartPortNum; /* 0x09 */ 900 U8 SwitchStatus; /* 0x0A */ 901 U8 IOUnitPort; /* 0x0B */ 902 U32 Reserved0C; /* 0x0C */ 903 MPI3_EVENT_PCIE_TOPO_PORT_ENTRY PortEntry[MPI3_EVENT_PCIE_TOPO_PORT_COUNT]; /* 0x10 */ 904 } MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, 905 Mpi3EventDataPcieTopologyChangeList_t, MPI3_POINTER pMpi3EventDataPcieTopologyChangeList_t; 906 907 /**** Defines for the SwitchStatus field ****/ 908 #define MPI3_EVENT_PCIE_TOPO_SS_NO_PCIE_SWITCH (0x00) 909 #define MPI3_EVENT_PCIE_TOPO_SS_NOT_RESPONDING (0x02) 910 #define MPI3_EVENT_PCIE_TOPO_SS_RESPONDING (0x03) 911 #define MPI3_EVENT_PCIE_TOPO_SS_DELAY_NOT_RESPONDING (0x04) 912 913 /***************************************************************************** 914 * PCIe Error Threshold Event * 915 ****************************************************************************/ 916 917 typedef struct _MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD 918 { 919 U64 Timestamp; /* 0x00 */ 920 U8 ReasonCode; /* 0x08 */ 921 U8 Port; /* 0x09 */ 922 U16 SwitchDevHandle; /* 0x0A */ 923 U8 Error; /* 0x0C */ 924 U8 Action; /* 0x0D */ 925 U16 ThresholdCount; /* 0x0E */ 926 U16 AttachedDevHandle; /* 0x10 */ 927 U16 Reserved12; /* 0x12 */ 928 U32 Reserved14; /* 0x14 */ 929 } MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, MPI3_POINTER PTR_MPI3_EVENT_DATA_PCIE_ERROR_THRESHOLD, 930 Mpi3EventDataPcieErrorThreshold_t, MPI3_POINTER pMpi3EventDataPcieErrorThreshold_t; 931 932 933 /**** Defines for the ReasonCode field ****/ 934 #define MPI3_EVENT_PCI_ERROR_RC_THRESHOLD_EXCEEDED (0x00) 935 #define MPI3_EVENT_PCI_ERROR_RC_ESCALATION (0x01) 936 937 /**** Defines for the Error field - use MPI3_PCIEIOUNIT3_ERROR_ values ****/ 938 939 /**** Defines for the Action field - use MPI3_PCIEIOUNIT3_ACTION_ values ****/ 940 941 /**************************************************************************** 942 * Enclosure Device Added Event * 943 ****************************************************************************/ 944 /* 945 * The Enclosure Device Added Event Data is exactly the same as Enclosure 946 * Page 0 data (including the Configuration Page header). So, please 947 * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Added 948 * Event data. 949 */ 950 951 /**************************************************************************** 952 * Enclosure Device Changed Event * 953 ****************************************************************************/ 954 /* 955 * The Enclosure Device Change Event Data is exactly the same as Enclosure 956 * Page 0 data (including the Configuration Page header). So, please 957 * use/refer to MPI3_ENCLOSURE_PAGE0 structure for Enclosure Device Change 958 * Event data. 959 */ 960 961 /***************************************************************************** 962 * SAS Initiator Device Status Change Event * 963 ****************************************************************************/ 964 typedef struct _MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 965 { 966 U8 ReasonCode; /* 0x00 */ 967 U8 IOUnitPort; /* 0x01 */ 968 U16 DevHandle; /* 0x02 */ 969 U32 Reserved04; /* 0x04 */ 970 U64 SASAddress; /* 0x08 */ 971 } MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 972 Mpi3EventDataSasInitDevStatusChange_t, MPI3_POINTER pMpi3EventDataSasInitDevStatusChange_t; 973 974 /**** Defines for the ReasonCode field ****/ 975 #define MPI3_EVENT_SAS_INIT_RC_ADDED (0x01) 976 #define MPI3_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) 977 978 979 /***************************************************************************** 980 * SAS Initiator Device Table Overflow Event * 981 ****************************************************************************/ 982 typedef struct _MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 983 { 984 U16 MaxInit; /* 0x00 */ 985 U16 CurrentInit; /* 0x02 */ 986 U32 Reserved04; /* 0x04 */ 987 U64 SASAddress; /* 0x08 */ 988 } MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, MPI3_POINTER PTR_MPI3_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 989 Mpi3EventDataSasInitTableOverflow_t, MPI3_POINTER pMpi3EventDataSasInitTableOverflow_t; 990 991 992 /***************************************************************************** 993 * Hard Reset Received Event * 994 ****************************************************************************/ 995 typedef struct _MPI3_EVENT_DATA_HARD_RESET_RECEIVED 996 { 997 U8 Reserved00; /* 0x00 */ 998 U8 IOUnitPort; /* 0x01 */ 999 U16 Reserved02; /* 0x02 */ 1000 } MPI3_EVENT_DATA_HARD_RESET_RECEIVED, MPI3_POINTER PTR_MPI3_EVENT_DATA_HARD_RESET_RECEIVED, 1001 Mpi3EventDataHardResetReceived_t, MPI3_POINTER pMpi3EventDataHardResetReceived_t; 1002 1003 1004 /***************************************************************************** 1005 * Diagnostic Tool Events * 1006 *****************************************************************************/ 1007 1008 /***************************************************************************** 1009 * Diagnostic Buffer Status Change Event * 1010 *****************************************************************************/ 1011 typedef struct _MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE 1012 { 1013 U8 Type; /* 0x00 */ 1014 U8 ReasonCode; /* 0x01 */ 1015 U16 Reserved02; /* 0x02 */ 1016 U32 Reserved04; /* 0x04 */ 1017 } MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, MPI3_POINTER PTR_MPI3_EVENT_DATA_DIAG_BUFFER_STATUS_CHANGE, 1018 Mpi3EventDataDiagBufferStatusChange_t, MPI3_POINTER pMpi3EventDataDiagBufferStatusChange_t; 1019 1020 /**** Defines for the Type field - use MPI3_DIAG_BUFFER_TYPE_ values ****/ 1021 1022 /**** Defines for the ReasonCode field ****/ 1023 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED (0x01) 1024 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED (0x02) 1025 #define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED (0x03) 1026 1027 /***************************************************************************** 1028 * Persistent Event Logs * 1029 ****************************************************************************/ 1030 1031 /**** Definitions for the Locale field ****/ 1032 #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200) 1033 #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100) 1034 #define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080) 1035 #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040) 1036 #define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020) 1037 #define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010) 1038 #define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008) 1039 #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004) 1040 #define MPI3_PEL_LOCALE_FLAGS_PD (0x0002) 1041 #define MPI3_PEL_LOCALE_FLAGS_VD (0x0001) 1042 1043 /**** Definitions for the Class field ****/ 1044 #define MPI3_PEL_CLASS_DEBUG (0x00) 1045 #define MPI3_PEL_CLASS_PROGRESS (0x01) 1046 #define MPI3_PEL_CLASS_INFORMATIONAL (0x02) 1047 #define MPI3_PEL_CLASS_WARNING (0x03) 1048 #define MPI3_PEL_CLASS_CRITICAL (0x04) 1049 #define MPI3_PEL_CLASS_FATAL (0x05) 1050 #define MPI3_PEL_CLASS_FAULT (0x06) 1051 1052 /**** Definitions for the ClearType field ****/ 1053 #define MPI3_PEL_CLEARTYPE_CLEAR (0x00) 1054 1055 /**** Definitions for the WaitTime field ****/ 1056 #define MPI3_PEL_WAITTIME_INFINITE_WAIT (0x00) 1057 1058 /**** Definitions for the Action field ****/ 1059 #define MPI3_PEL_ACTION_GET_SEQNUM (0x01) 1060 #define MPI3_PEL_ACTION_MARK_CLEAR (0x02) 1061 #define MPI3_PEL_ACTION_GET_LOG (0x03) 1062 #define MPI3_PEL_ACTION_GET_COUNT (0x04) 1063 #define MPI3_PEL_ACTION_WAIT (0x05) 1064 #define MPI3_PEL_ACTION_ABORT (0x06) 1065 #define MPI3_PEL_ACTION_GET_PRINT_STRINGS (0x07) 1066 #define MPI3_PEL_ACTION_ACKNOWLEDGE (0x08) 1067 1068 /**** Definitions for the LogStatus field ****/ 1069 #define MPI3_PEL_STATUS_SUCCESS (0x00) 1070 #define MPI3_PEL_STATUS_NOT_FOUND (0x01) 1071 #define MPI3_PEL_STATUS_ABORTED (0x02) 1072 #define MPI3_PEL_STATUS_NOT_READY (0x03) 1073 1074 /**************************************************************************** 1075 * PEL Sequence Numbers * 1076 ****************************************************************************/ 1077 typedef struct _MPI3_PEL_SEQ 1078 { 1079 U32 Newest; /* 0x00 */ 1080 U32 Oldest; /* 0x04 */ 1081 U32 Clear; /* 0x08 */ 1082 U32 Shutdown; /* 0x0C */ 1083 U32 Boot; /* 0x10 */ 1084 U32 LastAcknowledged; /* 0x14 */ 1085 } MPI3_PEL_SEQ, MPI3_POINTER PTR_MPI3_PEL_SEQ, 1086 Mpi3PELSeq_t, MPI3_POINTER pMpi3PELSeq_t; 1087 1088 /**************************************************************************** 1089 * PEL Entry * 1090 ****************************************************************************/ 1091 1092 typedef struct _MPI3_PEL_ENTRY 1093 { 1094 U64 TimeStamp; /* 0x00 */ 1095 U32 SequenceNumber; /* 0x08 */ 1096 U16 LogCode; /* 0x0C */ 1097 U16 ArgType; /* 0x0E */ 1098 U16 Locale; /* 0x10 */ 1099 U8 Class; /* 0x12 */ 1100 U8 Flags; /* 0x13 */ 1101 U8 ExtNum; /* 0x14 */ 1102 U8 NumExts; /* 0x15 */ 1103 U8 ArgDataSize; /* 0x16 */ 1104 U8 FixedFormatStringsSize; /* 0x17 */ 1105 U32 Reserved18[2]; /* 0x18 */ 1106 U32 PELInfo[24]; /* 0x20 - 0x7F */ 1107 } MPI3_PEL_ENTRY, MPI3_POINTER PTR_MPI3_PEL_ENTRY, 1108 Mpi3PELEntry_t, MPI3_POINTER pMpi3PELEntry_t; 1109 1110 1111 /**** Definitions for the Flags field ****/ 1112 1113 #define MPI3_PEL_FLAGS_COMPLETE_RESET_NEEDED (0x02) 1114 #define MPI3_PEL_FLAGS_ACK_NEEDED (0x01) 1115 1116 /**************************************************************************** 1117 * PEL Event List * 1118 ****************************************************************************/ 1119 typedef struct _MPI3_PEL_LIST 1120 { 1121 U32 LogCount; /* 0x00 */ 1122 U32 Reserved04; /* 0x04 */ 1123 MPI3_PEL_ENTRY Entry[1]; /* 0x08 */ /* variable length */ 1124 } MPI3_PEL_LIST, MPI3_POINTER PTR_MPI3_PEL_LIST, 1125 Mpi3PELList_t, MPI3_POINTER pMpi3PELList_t; 1126 1127 /**************************************************************************** 1128 * PEL Count Data * 1129 ****************************************************************************/ 1130 typedef U32 MPI3_PEL_LOG_COUNT, MPI3_POINTER PTR_MPI3_PEL_LOG_COUNT, 1131 Mpi3PELLogCount_t, MPI3_POINTER pMpi3PELLogCount_t; 1132 1133 /**************************************************************************** 1134 * PEL Arg Map * 1135 ****************************************************************************/ 1136 typedef struct _MPI3_PEL_ARG_MAP 1137 { 1138 U8 ArgType; /* 0x00 */ 1139 U8 Length; /* 0x01 */ 1140 U16 StartLocation; /* 0x02 */ 1141 } MPI3_PEL_ARG_MAP, MPI3_POINTER PTR_MPI3_PEL_ARG_MAP, 1142 Mpi3PELArgMap_t, MPI3_POINTER pMpi3PELArgMap_t; 1143 1144 /**** Definitions for the ArgType field ****/ 1145 #define MPI3_PEL_ARG_MAP_ARG_TYPE_APPEND_STRING (0x00) 1146 #define MPI3_PEL_ARG_MAP_ARG_TYPE_INTEGER (0x01) 1147 #define MPI3_PEL_ARG_MAP_ARG_TYPE_STRING (0x02) 1148 #define MPI3_PEL_ARG_MAP_ARG_TYPE_BIT_FIELD (0x03) 1149 1150 1151 /**************************************************************************** 1152 * PEL Print String * 1153 ****************************************************************************/ 1154 typedef struct _MPI3_PEL_PRINT_STRING 1155 { 1156 U16 LogCode; /* 0x00 */ 1157 U16 StringLength; /* 0x02 */ 1158 U8 NumArgMap; /* 0x04 */ 1159 U8 Reserved05[3]; /* 0x05 */ 1160 MPI3_PEL_ARG_MAP ArgMap[1]; /* 0x08 */ /* variable length */ 1161 /* FormatString - offset must be calculated */ /* variable length */ 1162 } MPI3_PEL_PRINT_STRING, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING, 1163 Mpi3PELPrintString_t, MPI3_POINTER pMpi3PELPrintString_t; 1164 1165 /**************************************************************************** 1166 * PEL Print String List * 1167 ****************************************************************************/ 1168 typedef struct _MPI3_PEL_PRINT_STRING_LIST 1169 { 1170 U32 NumPrintStrings; /* 0x00 */ 1171 U32 ResidualBytesRemain; /* 0x04 */ 1172 U32 Reserved08[2]; /* 0x08 */ 1173 MPI3_PEL_PRINT_STRING PrintString[1]; /* 0x10 */ /* variable length */ 1174 } MPI3_PEL_PRINT_STRING_LIST, MPI3_POINTER PTR_MPI3_PEL_PRINT_STRING_LIST, 1175 Mpi3PELPrintStringList_t, MPI3_POINTER pMpi3PELPrintStringList_t; 1176 1177 1178 /**************************************************************************** 1179 * PEL Request Msg - generic to allow header decoding * 1180 ****************************************************************************/ 1181 #ifndef MPI3_PEL_ACTION_SPECIFIC_MAX 1182 #define MPI3_PEL_ACTION_SPECIFIC_MAX (1) 1183 #endif /* MPI3_PEL_ACTION_SPECIFIC_MAX */ 1184 1185 typedef struct _MPI3_PEL_REQUEST 1186 { 1187 U16 HostTag; /* 0x00 */ 1188 U8 IOCUseOnly02; /* 0x02 */ 1189 U8 Function; /* 0x03 */ 1190 U16 IOCUseOnly04; /* 0x04 */ 1191 U8 IOCUseOnly06; /* 0x06 */ 1192 U8 MsgFlags; /* 0x07 */ 1193 U16 ChangeCount; /* 0x08 */ 1194 U8 Action; /* 0x0A */ 1195 U8 Reserved0B; /* 0x0B */ 1196 U32 ActionSpecific[MPI3_PEL_ACTION_SPECIFIC_MAX]; /* 0x0C */ /* variable length */ 1197 } MPI3_PEL_REQUEST, MPI3_POINTER PTR_MPI3_PEL_REQUEST, 1198 Mpi3PELRequest_t, MPI3_POINTER pMpi3PELRequest_t; 1199 1200 /**************************************************************************** 1201 * PEL ACTION Get Sequence Nembers * 1202 ****************************************************************************/ 1203 typedef struct _MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS 1204 { 1205 U16 HostTag; /* 0x00 */ 1206 U8 IOCUseOnly02; /* 0x02 */ 1207 U8 Function; /* 0x03 */ 1208 U16 IOCUseOnly04; /* 0x04 */ 1209 U8 IOCUseOnly06; /* 0x06 */ 1210 U8 MsgFlags; /* 0x07 */ 1211 U16 ChangeCount; /* 0x08 */ 1212 U8 Action; /* 0x0A */ 1213 U8 Reserved0B; /* 0x0B */ 1214 U32 Reserved0C[5]; /* 0x0C */ 1215 MPI3_SGE_UNION SGL; /* 0x20 */ 1216 } MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_SEQUENCE_NUMBERS, 1217 Mpi3PELReqActionGetSequenceNumbers_t, MPI3_POINTER pMpi3PELReqActionGetSequenceNumbers_t; 1218 1219 /**************************************************************************** 1220 * PEL ACTION Clear Log * 1221 ****************************************************************************/ 1222 typedef struct _MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER 1223 { 1224 U16 HostTag; /* 0x00 */ 1225 U8 IOCUseOnly02; /* 0x02 */ 1226 U8 Function; /* 0x03 */ 1227 U16 IOCUseOnly04; /* 0x04 */ 1228 U8 IOCUseOnly06; /* 0x06 */ 1229 U8 MsgFlags; /* 0x07 */ 1230 U16 ChangeCount; /* 0x08 */ 1231 U8 Action; /* 0x0A */ 1232 U8 Reserved0B; /* 0x0B */ 1233 U8 ClearType; /* 0x0C */ 1234 U8 Reserved0D[3]; /* 0x0D */ 1235 } MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_CLEAR_LOG_MARKER, 1236 Mpi3PELReqActionClearLogMMarker_t, MPI3_POINTER pMpi3PELReqActionClearLogMMarker_t; 1237 1238 /**************************************************************************** 1239 * PEL ACTION Get Log * 1240 ****************************************************************************/ 1241 typedef struct _MPI3_PEL_REQ_ACTION_GET_LOG 1242 { 1243 U16 HostTag; /* 0x00 */ 1244 U8 IOCUseOnly02; /* 0x02 */ 1245 U8 Function; /* 0x03 */ 1246 U16 IOCUseOnly04; /* 0x04 */ 1247 U8 IOCUseOnly06; /* 0x06 */ 1248 U8 MsgFlags; /* 0x07 */ 1249 U16 ChangeCount; /* 0x08 */ 1250 U8 Action; /* 0x0A */ 1251 U8 Reserved0B; /* 0x0B */ 1252 U32 StartingSequenceNumber; /* 0x0C */ 1253 U16 Locale; /* 0x10 */ 1254 U8 Class; /* 0x12 */ 1255 U8 Reserved13; /* 0x13 */ 1256 U32 Reserved14[3]; /* 0x14 */ 1257 MPI3_SGE_UNION SGL; /* 0x20 */ 1258 } MPI3_PEL_REQ_ACTION_GET_LOG, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_LOG, 1259 Mpi3PELReqActionGetLog_t, MPI3_POINTER pMpi3PELReqActionGetLog_t; 1260 1261 /**************************************************************************** 1262 * PEL ACTION Get Count * 1263 ****************************************************************************/ 1264 typedef struct _MPI3_PEL_REQ_ACTION_GET_COUNT 1265 { 1266 U16 HostTag; /* 0x00 */ 1267 U8 IOCUseOnly02; /* 0x02 */ 1268 U8 Function; /* 0x03 */ 1269 U16 IOCUseOnly04; /* 0x04 */ 1270 U8 IOCUseOnly06; /* 0x06 */ 1271 U8 MsgFlags; /* 0x07 */ 1272 U16 ChangeCount; /* 0x08 */ 1273 U8 Action; /* 0x0A */ 1274 U8 Reserved0B; /* 0x0B */ 1275 U32 StartingSequenceNumber; /* 0x0C */ 1276 U16 Locale; /* 0x10 */ 1277 U8 Class; /* 0x12 */ 1278 U8 Reserved13; /* 0x13 */ 1279 U32 Reserved14[3]; /* 0x14 */ 1280 MPI3_SGE_UNION SGL; /* 0x20 */ 1281 } MPI3_PEL_REQ_ACTION_GET_COUNT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_COUNT, 1282 Mpi3PELReqActionGetCount_t, MPI3_POINTER pMpi3PELReqActionGetCount_t; 1283 1284 /**************************************************************************** 1285 * PEL ACTION Wait * 1286 ****************************************************************************/ 1287 typedef struct _MPI3_PEL_REQ_ACTION_WAIT 1288 { 1289 U16 HostTag; /* 0x00 */ 1290 U8 IOCUseOnly02; /* 0x02 */ 1291 U8 Function; /* 0x03 */ 1292 U16 IOCUseOnly04; /* 0x04 */ 1293 U8 IOCUseOnly06; /* 0x06 */ 1294 U8 MsgFlags; /* 0x07 */ 1295 U16 ChangeCount; /* 0x08 */ 1296 U8 Action; /* 0x0A */ 1297 U8 Reserved0B; /* 0x0B */ 1298 U32 StartingSequenceNumber; /* 0x0C */ 1299 U16 Locale; /* 0x10 */ 1300 U8 Class; /* 0x12 */ 1301 U8 Reserved13; /* 0x13 */ 1302 U16 WaitTime; /* 0x14 */ 1303 U16 Reserved16; /* 0x16 */ 1304 U32 Reserved18[2]; /* 0x18 */ 1305 } MPI3_PEL_REQ_ACTION_WAIT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_WAIT, 1306 Mpi3PELReqActionWait_t, MPI3_POINTER pMpi3PELReqActionWait_t; 1307 1308 /**************************************************************************** 1309 * PEL ACTION Abort * 1310 ****************************************************************************/ 1311 typedef struct _MPI3_PEL_REQ_ACTION_ABORT 1312 { 1313 U16 HostTag; /* 0x00 */ 1314 U8 IOCUseOnly02; /* 0x02 */ 1315 U8 Function; /* 0x03 */ 1316 U16 IOCUseOnly04; /* 0x04 */ 1317 U8 IOCUseOnly06; /* 0x06 */ 1318 U8 MsgFlags; /* 0x07 */ 1319 U16 ChangeCount; /* 0x08 */ 1320 U8 Action; /* 0x0A */ 1321 U8 Reserved0B; /* 0x0B */ 1322 U32 Reserved0C; /* 0x0C */ 1323 U16 AbortHostTag; /* 0x10 */ 1324 U16 Reserved12; /* 0x12 */ 1325 U32 Reserved14; /* 0x14 */ 1326 } MPI3_PEL_REQ_ACTION_ABORT, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ABORT, 1327 Mpi3PELReqActionAbort_t, MPI3_POINTER pMpi3PELReqActionAbort_t; 1328 1329 /**************************************************************************** 1330 * PEL ACTION Get Print Strings * 1331 ****************************************************************************/ 1332 typedef struct _MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS 1333 { 1334 U16 HostTag; /* 0x00 */ 1335 U8 IOCUseOnly02; /* 0x02 */ 1336 U8 Function; /* 0x03 */ 1337 U16 IOCUseOnly04; /* 0x04 */ 1338 U8 IOCUseOnly06; /* 0x06 */ 1339 U8 MsgFlags; /* 0x07 */ 1340 U16 ChangeCount; /* 0x08 */ 1341 U8 Action; /* 0x0A */ 1342 U8 Reserved0B; /* 0x0B */ 1343 U32 Reserved0C; /* 0x0C */ 1344 U16 StartLogCode; /* 0x10 */ 1345 U16 Reserved12; /* 0x12 */ 1346 U32 Reserved14[3]; /* 0x14 */ 1347 MPI3_SGE_UNION SGL; /* 0x20 */ 1348 } MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_GET_PRINT_STRINGS, 1349 Mpi3PELReqActionGetPrintStrings_t, MPI3_POINTER pMpi3PELReqActionGetPrintStrings_t; 1350 1351 /**************************************************************************** 1352 * PEL ACTION Acknowledge * 1353 ****************************************************************************/ 1354 typedef struct _MPI3_PEL_REQ_ACTION_ACKNOWLEDGE 1355 { 1356 U16 HostTag; /* 0x00 */ 1357 U8 IOCUseOnly02; /* 0x02 */ 1358 U8 Function; /* 0x03 */ 1359 U16 IOCUseOnly04; /* 0x04 */ 1360 U8 IOCUseOnly06; /* 0x06 */ 1361 U8 MsgFlags; /* 0x07 */ 1362 U16 ChangeCount; /* 0x08 */ 1363 U8 Action; /* 0x0A */ 1364 U8 Reserved0B; /* 0x0B */ 1365 U32 SequenceNumber; /* 0x0C */ 1366 U32 Reserved10; /* 0x10 */ 1367 } MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, MPI3_POINTER PTR_MPI3_PEL_REQ_ACTION_ACKNOWLEDGE, 1368 Mpi3PELReqActionAcknowledge_t, MPI3_POINTER pMpi3PELReqActionAcknowledge_t; 1369 1370 /**** Definitions for the MsgFlags field ****/ 1371 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_MASK (0x03) 1372 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_NO_GUIDANCE (0x00) 1373 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_CONTINUE_OP (0x01) 1374 #define MPI3_PELACKNOWLEDGE_MSGFLAGS_SAFE_MODE_EXIT_TRANSITION_TO_FAULT (0x02) 1375 1376 /**************************************************************************** 1377 * PEL Reply * 1378 ****************************************************************************/ 1379 typedef struct _MPI3_PEL_REPLY 1380 { 1381 U16 HostTag; /* 0x00 */ 1382 U8 IOCUseOnly02; /* 0x02 */ 1383 U8 Function; /* 0x03 */ 1384 U16 IOCUseOnly04; /* 0x04 */ 1385 U8 IOCUseOnly06; /* 0x06 */ 1386 U8 MsgFlags; /* 0x07 */ 1387 U16 IOCUseOnly08; /* 0x08 */ 1388 U16 IOCStatus; /* 0x0A */ 1389 U32 IOCLogInfo; /* 0x0C */ 1390 U8 Action; /* 0x10 */ 1391 U8 Reserved11; /* 0x11 */ 1392 U16 Reserved12; /* 0x12 */ 1393 U16 PELogStatus; /* 0x14 */ 1394 U16 Reserved16; /* 0x16 */ 1395 U32 TransferLength; /* 0x18 */ 1396 } MPI3_PEL_REPLY, MPI3_POINTER PTR_MPI3_PEL_REPLY, 1397 Mpi3PELReply_t, MPI3_POINTER pMpi3PELReply_t; 1398 1399 1400 /***************************************************************************** 1401 * Component Image Download * 1402 ****************************************************************************/ 1403 typedef struct _MPI3_CI_DOWNLOAD_REQUEST 1404 { 1405 U16 HostTag; /* 0x00 */ 1406 U8 IOCUseOnly02; /* 0x02 */ 1407 U8 Function; /* 0x03 */ 1408 U16 IOCUseOnly04; /* 0x04 */ 1409 U8 IOCUseOnly06; /* 0x06 */ 1410 U8 MsgFlags; /* 0x07 */ 1411 U16 ChangeCount; /* 0x08 */ 1412 U8 Action; /* 0x0A */ 1413 U8 Reserved0B; /* 0x0B */ 1414 U32 Signature1; /* 0x0C */ 1415 U32 TotalImageSize; /* 0x10 */ 1416 U32 ImageOffset; /* 0x14 */ 1417 U32 SegmentSize; /* 0x18 */ 1418 U32 Reserved1C; /* 0x1C */ 1419 MPI3_SGE_UNION SGL; /* 0x20 */ 1420 } MPI3_CI_DOWNLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REQUEST, 1421 Mpi3CIDownloadRequest_t, MPI3_POINTER pMpi3CIDownloadRequest_t; 1422 1423 /**** Definitions for the MsgFlags field ****/ 1424 #define MPI3_CI_DOWNLOAD_MSGFLAGS_LAST_SEGMENT (0x80) 1425 #define MPI3_CI_DOWNLOAD_MSGFLAGS_FORCE_FMC_ENABLE (0x40) 1426 #define MPI3_CI_DOWNLOAD_MSGFLAGS_SIGNED_NVDATA (0x20) 1427 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MASK (0x03) 1428 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_FAST (0x00) 1429 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_MEDIUM (0x01) 1430 #define MPI3_CI_DOWNLOAD_MSGFLAGS_WRITE_CACHE_FLUSH_SLOW (0x02) 1431 1432 /**** Definitions for the Action field ****/ 1433 #define MPI3_CI_DOWNLOAD_ACTION_DOWNLOAD (0x01) 1434 #define MPI3_CI_DOWNLOAD_ACTION_ONLINE_ACTIVATION (0x02) 1435 #define MPI3_CI_DOWNLOAD_ACTION_OFFLINE_ACTIVATION (0x03) 1436 #define MPI3_CI_DOWNLOAD_ACTION_GET_STATUS (0x04) 1437 #define MPI3_CI_DOWNLOAD_ACTION_CANCEL_OFFLINE_ACTIVATION (0x05) 1438 1439 typedef struct _MPI3_CI_DOWNLOAD_REPLY 1440 { 1441 U16 HostTag; /* 0x00 */ 1442 U8 IOCUseOnly02; /* 0x02 */ 1443 U8 Function; /* 0x03 */ 1444 U16 IOCUseOnly04; /* 0x04 */ 1445 U8 IOCUseOnly06; /* 0x06 */ 1446 U8 MsgFlags; /* 0x07 */ 1447 U16 IOCUseOnly08; /* 0x08 */ 1448 U16 IOCStatus; /* 0x0A */ 1449 U32 IOCLogInfo; /* 0x0C */ 1450 U8 Flags; /* 0x10 */ 1451 U8 CacheDirty; /* 0x11 */ 1452 U8 PendingCount; /* 0x12 */ 1453 U8 Reserved13; /* 0x13 */ 1454 } MPI3_CI_DOWNLOAD_REPLY, MPI3_POINTER PTR_MPI3_CI_DOWNLOAD_REPLY, 1455 Mpi3CIDownloadReply_t, MPI3_POINTER pMpi3CIDownloadReply_t; 1456 1457 /**** Definitions for the Flags field ****/ 1458 #define MPI3_CI_DOWNLOAD_FLAGS_DOWNLOAD_IN_PROGRESS (0x80) 1459 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_FAILURE (0x40) 1460 #define MPI3_CI_DOWNLOAD_FLAGS_OFFLINE_ACTIVATION_REQUIRED (0x20) 1461 #define MPI3_CI_DOWNLOAD_FLAGS_KEY_UPDATE_PENDING (0x10) 1462 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_MASK (0x0E) 1463 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_NOT_NEEDED (0x00) 1464 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_AWAITING (0x02) 1465 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_ONLINE_PENDING (0x04) 1466 #define MPI3_CI_DOWNLOAD_FLAGS_ACTIVATION_STATUS_OFFLINE_PENDING (0x06) 1467 #define MPI3_CI_DOWNLOAD_FLAGS_COMPATIBLE (0x01) 1468 1469 /***************************************************************************** 1470 * Component Image Upload * 1471 ****************************************************************************/ 1472 typedef struct _MPI3_CI_UPLOAD_REQUEST 1473 { 1474 U16 HostTag; /* 0x00 */ 1475 U8 IOCUseOnly02; /* 0x02 */ 1476 U8 Function; /* 0x03 */ 1477 U16 IOCUseOnly04; /* 0x04 */ 1478 U8 IOCUseOnly06; /* 0x06 */ 1479 U8 MsgFlags; /* 0x07 */ 1480 U16 ChangeCount; /* 0x08 */ 1481 U16 Reserved0A; /* 0x0A */ 1482 U32 Signature1; /* 0x0C */ 1483 U32 Reserved10; /* 0x10 */ 1484 U32 ImageOffset; /* 0x14 */ 1485 U32 SegmentSize; /* 0x18 */ 1486 U32 Reserved1C; /* 0x1C */ 1487 MPI3_SGE_UNION SGL; /* 0x20 */ 1488 } MPI3_CI_UPLOAD_REQUEST, MPI3_POINTER PTR_MPI3_CI_UPLOAD_REQUEST, 1489 Mpi3CIUploadRequest_t, MPI3_POINTER pMpi3CIUploadRequest_t; 1490 1491 /**** Defines for the MsgFlags field ****/ 1492 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_MASK (0x01) 1493 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY (0x00) 1494 #define MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_SECONDARY (0x01) 1495 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_MASK (0x02) 1496 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_FLASH (0x00) 1497 #define MPI3_CI_UPLOAD_MSGFLAGS_FORMAT_EXECUTABLE (0x02) 1498 1499 /**** Defines for Signature1 field - use MPI3_IMAGE_HEADER_SIGNATURE1_ defines */ 1500 1501 /***************************************************************************** 1502 * IO Unit Control * 1503 ****************************************************************************/ 1504 1505 /**** Definitions for the Operation field ****/ 1506 #define MPI3_CTRL_OP_FORCE_FULL_DISCOVERY (0x01) 1507 #define MPI3_CTRL_OP_LOOKUP_MAPPING (0x02) 1508 #define MPI3_CTRL_OP_UPDATE_TIMESTAMP (0x04) 1509 #define MPI3_CTRL_OP_GET_TIMESTAMP (0x05) 1510 #define MPI3_CTRL_OP_GET_IOC_CHANGE_COUNT (0x06) 1511 #define MPI3_CTRL_OP_CHANGE_PROFILE (0x07) 1512 #define MPI3_CTRL_OP_REMOVE_DEVICE (0x10) 1513 #define MPI3_CTRL_OP_CLOSE_PERSISTENT_CONNECTION (0x11) 1514 #define MPI3_CTRL_OP_HIDDEN_ACK (0x12) 1515 #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS (0x13) 1516 #define MPI3_CTRL_OP_SEND_SAS_PRIMITIVE (0x20) 1517 #define MPI3_CTRL_OP_SAS_PHY_CONTROL (0x21) 1518 #define MPI3_CTRL_OP_READ_INTERNAL_BUS (0x23) 1519 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS (0x24) 1520 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL (0x30) 1521 1522 /**** Depending on the Operation selected, the various ParamX fields *****/ 1523 /**** contain defined data values. These indexes help identify those values *****/ 1524 #define MPI3_CTRL_OP_LOOKUP_MAPPING_PARAM8_LOOKUP_METHOD_INDEX (0x00) 1525 #define MPI3_CTRL_OP_UPDATE_TIMESTAMP_PARAM64_TIMESTAMP_INDEX (0x00) 1526 #define MPI3_CTRL_OP_CHANGE_PROFILE_PARAM8_PROFILE_ID_INDEX (0x00) 1527 #define MPI3_CTRL_OP_REMOVE_DEVICE_PARAM16_DEVHANDLE_INDEX (0x00) 1528 #define MPI3_CTRL_OP_CLOSE_PERSIST_CONN_PARAM16_DEVHANDLE_INDEX (0x00) 1529 #define MPI3_CTRL_OP_HIDDEN_ACK_PARAM16_DEVHANDLE_INDEX (0x00) 1530 #define MPI3_CTRL_OP_CLEAR_DEVICE_COUNTERS_PARAM16_DEVHANDLE_INDEX (0x00) 1531 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PHY_INDEX (0x00) 1532 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM8_PRIMSEQ_INDEX (0x01) 1533 #define MPI3_CTRL_OP_SEND_SAS_PRIM_PARAM32_PRIMITIVE_INDEX (0x00) 1534 #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_ACTION_INDEX (0x00) 1535 #define MPI3_CTRL_OP_SAS_PHY_CONTROL_PARAM8_PHY_INDEX (0x01) 1536 #define MPI3_CTRL_OP_READ_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 1537 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM64_ADDRESS_INDEX (0x00) 1538 #define MPI3_CTRL_OP_WRITE_INTERNAL_BUS_PARAM32_VALUE_INDEX (0x00) 1539 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_ACTION_INDEX (0x00) 1540 #define MPI3_CTRL_OP_PCIE_LINK_CONTROL_PARAM8_LINK_INDEX (0x01) 1541 1542 /**** Definitions for the LookupMethod field in LOOKUP_MAPPING reqs ****/ 1543 #define MPI3_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01) 1544 #define MPI3_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02) 1545 #define MPI3_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) 1546 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTENT_ID (0x04) 1547 1548 /**** Definitions for IoUnitControl Lookup Mapping Method Parameters ****/ 1549 #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM16_DEVH_INDEX (0) 1550 #define MPI3_CTRL_LOOKUP_METHOD_WWIDADDR_PARAM64_WWID_INDEX (0) 1551 #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM16_SLOTNUM_INDEX (0) 1552 #define MPI3_CTRL_LOOKUP_METHOD_ENCLSLOT_PARAM64_ENCLOSURELID_INDEX (0) 1553 #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM16_DEVH_INDEX (0) 1554 #define MPI3_CTRL_LOOKUP_METHOD_SASDEVNAME_PARAM64_DEVNAME_INDEX (0) 1555 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_DEVH_INDEX (0) 1556 #define MPI3_CTRL_LOOKUP_METHOD_PERSISTID_PARAM16_PERSISTENT_ID_INDEX (1) 1557 1558 /*** Definitions for IoUnitControl Reply fields ****/ 1559 #define MPI3_CTRL_LOOKUP_METHOD_VALUE16_DEVH_INDEX (0) 1560 #define MPI3_CTRL_GET_TIMESTAMP_VALUE64_TIMESTAMP_INDEX (0) 1561 #define MPI3_CTRL_GET_IOC_CHANGE_COUNT_VALUE16_CHANGECOUNT_INDEX (0) 1562 #define MPI3_CTRL_READ_INTERNAL_BUS_VALUE32_VALUE_INDEX (0) 1563 1564 /**** Definitions for the PrimSeq field in SEND_SAS_PRIMITIVE reqs ****/ 1565 #define MPI3_CTRL_PRIMFLAGS_SINGLE (0x01) 1566 #define MPI3_CTRL_PRIMFLAGS_TRIPLE (0x03) 1567 #define MPI3_CTRL_PRIMFLAGS_REDUNDANT (0x06) 1568 1569 /**** Definitions for the Action field in PCIE_LINK_CONTROL and SAS_PHY_CONTROL reqs ****/ 1570 #define MPI3_CTRL_ACTION_NOP (0x00) 1571 #define MPI3_CTRL_ACTION_LINK_RESET (0x01) 1572 #define MPI3_CTRL_ACTION_HARD_RESET (0x02) 1573 #define MPI3_CTRL_ACTION_CLEAR_ERROR_LOG (0x05) 1574 1575 typedef struct _MPI3_IOUNIT_CONTROL_REQUEST 1576 { 1577 U16 HostTag; /* 0x00 */ 1578 U8 IOCUseOnly02; /* 0x02 */ 1579 U8 Function; /* 0x03 */ 1580 U16 IOCUseOnly04; /* 0x04 */ 1581 U8 IOCUseOnly06; /* 0x06 */ 1582 U8 MsgFlags; /* 0x07 */ 1583 U16 ChangeCount; /* 0x08 */ 1584 U8 Reserved0A; /* 0x0A */ 1585 U8 Operation; /* 0x0B */ 1586 U32 Reserved0C; /* 0x0C */ 1587 U64 Param64[2]; /* 0x10 */ 1588 U32 Param32[4]; /* 0x20 */ 1589 U16 Param16[4]; /* 0x30 */ 1590 U8 Param8[8]; /* 0x38 */ 1591 } MPI3_IOUNIT_CONTROL_REQUEST, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REQUEST, 1592 Mpi3IoUnitControlRequest_t, MPI3_POINTER pMpi3IoUnitControlRequest_t; 1593 1594 1595 typedef struct _MPI3_IOUNIT_CONTROL_REPLY 1596 { 1597 U16 HostTag; /* 0x00 */ 1598 U8 IOCUseOnly02; /* 0x02 */ 1599 U8 Function; /* 0x03 */ 1600 U16 IOCUseOnly04; /* 0x04 */ 1601 U8 IOCUseOnly06; /* 0x06 */ 1602 U8 MsgFlags; /* 0x07 */ 1603 U16 IOCUseOnly08; /* 0x08 */ 1604 U16 IOCStatus; /* 0x0A */ 1605 U32 IOCLogInfo; /* 0x0C */ 1606 U64 Value64[2]; /* 0x10 */ 1607 U32 Value32[4]; /* 0x20 */ 1608 U16 Value16[4]; /* 0x30 */ 1609 U8 Value8[8]; /* 0x38 */ 1610 } MPI3_IOUNIT_CONTROL_REPLY, MPI3_POINTER PTR_MPI3_IOUNIT_CONTROL_REPLY, 1611 Mpi3IoUnitControlReply_t, MPI3_POINTER pMpi3IoUnitControlReply_t; 1612 1613 #endif /* MPI30_IOC_H */ 1614 1615 1616