1 /*- 2 * Principal Author: Parag Patel 3 * Copyright (c) 2001 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Additonal Copyright (c) 2001 by Traakan Software under same licence. 29 * Secondary Author: Matthew Jacob 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 37 */ 38 39 /* 40 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41 * 1000baseSX PHY. 42 * Nathan Binkert <nate@openbsd.org> 43 * Jung-uk Kim <jkim@niksun.com> 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/socket.h> 51 #include <sys/bus.h> 52 53 54 #include <net/if.h> 55 #include <net/if_media.h> 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 #include "miidevs.h" 60 61 #include <dev/mii/e1000phyreg.h> 62 /* XXX */ 63 #include <machine/bus.h> 64 #include <dev/msk/if_mskreg.h> 65 66 #include "miibus_if.h" 67 68 static int e1000phy_probe(device_t); 69 static int e1000phy_attach(device_t); 70 71 struct e1000phy_softc { 72 struct mii_softc mii_sc; 73 int mii_model; 74 struct msk_mii_data *mmd; 75 }; 76 77 static device_method_t e1000phy_methods[] = { 78 /* device interface */ 79 DEVMETHOD(device_probe, e1000phy_probe), 80 DEVMETHOD(device_attach, e1000phy_attach), 81 DEVMETHOD(device_detach, mii_phy_detach), 82 DEVMETHOD(device_shutdown, bus_generic_shutdown), 83 { 0, 0 } 84 }; 85 86 static devclass_t e1000phy_devclass; 87 static driver_t e1000phy_driver = { 88 "e1000phy", 89 e1000phy_methods, 90 sizeof(struct e1000phy_softc) 91 }; 92 93 DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 94 95 static int e1000phy_service(struct mii_softc *, struct mii_data *, int); 96 static void e1000phy_status(struct mii_softc *); 97 static void e1000phy_reset(struct mii_softc *); 98 static int e1000phy_mii_phy_auto(struct e1000phy_softc *); 99 100 static const struct mii_phydesc e1000phys[] = { 101 MII_PHY_DESC(MARVELL, E1000), 102 MII_PHY_DESC(MARVELL, E1011), 103 MII_PHY_DESC(MARVELL, E1000_3), 104 MII_PHY_DESC(MARVELL, E1000S), 105 MII_PHY_DESC(MARVELL, E1000_5), 106 MII_PHY_DESC(MARVELL, E1000_6), 107 MII_PHY_DESC(MARVELL, E3082), 108 MII_PHY_DESC(MARVELL, E1112), 109 MII_PHY_DESC(MARVELL, E1149), 110 MII_PHY_DESC(MARVELL, E1111), 111 MII_PHY_DESC(MARVELL, E1116), 112 MII_PHY_DESC(MARVELL, E1116R), 113 MII_PHY_DESC(MARVELL, E1118), 114 MII_PHY_DESC(MARVELL, E3016), 115 MII_PHY_DESC(xxMARVELL, E1000), 116 MII_PHY_DESC(xxMARVELL, E1011), 117 MII_PHY_DESC(xxMARVELL, E1000_3), 118 MII_PHY_DESC(xxMARVELL, E1000_5), 119 MII_PHY_DESC(xxMARVELL, E1111), 120 MII_PHY_END 121 }; 122 123 static int 124 e1000phy_probe(device_t dev) 125 { 126 127 return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 128 } 129 130 static int 131 e1000phy_attach(device_t dev) 132 { 133 struct e1000phy_softc *esc; 134 struct mii_softc *sc; 135 struct mii_attach_args *ma; 136 struct mii_data *mii; 137 struct ifnet *ifp; 138 139 esc = device_get_softc(dev); 140 sc = &esc->mii_sc; 141 ma = device_get_ivars(dev); 142 sc->mii_dev = device_get_parent(dev); 143 mii = device_get_softc(sc->mii_dev); 144 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 145 146 sc->mii_inst = mii->mii_instance; 147 sc->mii_phy = ma->mii_phyno; 148 sc->mii_service = e1000phy_service; 149 sc->mii_pdata = mii; 150 mii->mii_instance++; 151 152 esc->mii_model = MII_MODEL(ma->mii_id2); 153 ifp = sc->mii_pdata->mii_ifp; 154 if (strcmp(ifp->if_dname, "msk") == 0) { 155 /* XXX */ 156 esc->mmd = device_get_ivars( 157 device_get_parent(device_get_parent(dev))); 158 if (esc->mmd != NULL && 159 (esc->mmd->mii_flags & MIIF_HAVEFIBER) != 0) 160 sc->mii_flags |= MIIF_HAVEFIBER; 161 } 162 163 switch (esc->mii_model) { 164 case MII_MODEL_MARVELL_E1011: 165 case MII_MODEL_MARVELL_E1112: 166 if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 167 sc->mii_flags |= MIIF_HAVEFIBER; 168 break; 169 case MII_MODEL_MARVELL_E1149: 170 /* 171 * Some 88E1149 PHY's page select is initialized to 172 * point to other bank instead of copper/fiber bank 173 * which in turn resulted in wrong registers were 174 * accessed during PHY operation. It is believed that 175 * page 0 should be used for copper PHY so reinitialize 176 * E1000_EADR to select default copper PHY. If parent 177 * device know the type of PHY(either copper or fiber), 178 * that information should be used to select default 179 * type of PHY. 180 */ 181 PHY_WRITE(sc, E1000_EADR, 0); 182 break; 183 } 184 185 e1000phy_reset(sc); 186 187 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 188 if (sc->mii_capabilities & BMSR_EXTSTAT) 189 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 190 device_printf(dev, " "); 191 mii_phy_add_media(sc); 192 printf("\n"); 193 194 MIIBUS_MEDIAINIT(sc->mii_dev); 195 return (0); 196 } 197 198 static void 199 e1000phy_reset(struct mii_softc *sc) 200 { 201 struct e1000phy_softc *esc; 202 uint16_t reg, page; 203 204 esc = (struct e1000phy_softc *)sc; 205 reg = PHY_READ(sc, E1000_SCR); 206 if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 207 reg &= ~E1000_SCR_AUTO_X_MODE; 208 PHY_WRITE(sc, E1000_SCR, reg); 209 if (esc->mii_model == MII_MODEL_MARVELL_E1112) { 210 /* Select 1000BASE-X only mode. */ 211 page = PHY_READ(sc, E1000_EADR); 212 PHY_WRITE(sc, E1000_EADR, 2); 213 reg = PHY_READ(sc, E1000_SCR); 214 reg &= ~E1000_SCR_MODE_MASK; 215 reg |= E1000_SCR_MODE_1000BX; 216 PHY_WRITE(sc, E1000_SCR, reg); 217 if (esc->mmd != NULL && esc->mmd->pmd == 'P') { 218 /* Set SIGDET polarity low for SFP module. */ 219 PHY_WRITE(sc, E1000_EADR, 1); 220 reg = PHY_READ(sc, E1000_SCR); 221 reg |= E1000_SCR_FIB_SIGDET_POLARITY; 222 PHY_WRITE(sc, E1000_SCR, reg); 223 } 224 PHY_WRITE(sc, E1000_EADR, page); 225 } 226 } else { 227 switch (esc->mii_model) { 228 case MII_MODEL_MARVELL_E1111: 229 case MII_MODEL_MARVELL_E1112: 230 case MII_MODEL_MARVELL_E1116: 231 case MII_MODEL_MARVELL_E1118: 232 case MII_MODEL_MARVELL_E1149: 233 /* Disable energy detect mode. */ 234 reg &= ~E1000_SCR_EN_DETECT_MASK; 235 reg |= E1000_SCR_AUTO_X_MODE; 236 if (esc->mii_model == MII_MODEL_MARVELL_E1116) 237 reg &= ~E1000_SCR_POWER_DOWN; 238 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 239 break; 240 case MII_MODEL_MARVELL_E3082: 241 reg |= (E1000_SCR_AUTO_X_MODE >> 1); 242 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 243 break; 244 case MII_MODEL_MARVELL_E3016: 245 reg |= E1000_SCR_AUTO_MDIX; 246 reg &= ~(E1000_SCR_EN_DETECT | 247 E1000_SCR_SCRAMBLER_DISABLE); 248 reg |= E1000_SCR_LPNP; 249 /* XXX Enable class A driver for Yukon FE+ A0. */ 250 PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); 251 break; 252 default: 253 reg &= ~E1000_SCR_AUTO_X_MODE; 254 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 255 break; 256 } 257 if (esc->mii_model != MII_MODEL_MARVELL_E3016) { 258 /* Auto correction for reversed cable polarity. */ 259 reg &= ~E1000_SCR_POLARITY_REVERSAL; 260 } 261 PHY_WRITE(sc, E1000_SCR, reg); 262 263 if (esc->mii_model == MII_MODEL_MARVELL_E1116 || 264 esc->mii_model == MII_MODEL_MARVELL_E1149) { 265 PHY_WRITE(sc, E1000_EADR, 2); 266 reg = PHY_READ(sc, E1000_SCR); 267 reg |= E1000_SCR_RGMII_POWER_UP; 268 PHY_WRITE(sc, E1000_SCR, reg); 269 PHY_WRITE(sc, E1000_EADR, 0); 270 } 271 } 272 273 switch (esc->mii_model) { 274 case MII_MODEL_MARVELL_E3082: 275 case MII_MODEL_MARVELL_E1112: 276 case MII_MODEL_MARVELL_E1118: 277 break; 278 case MII_MODEL_MARVELL_E1116: 279 case MII_MODEL_MARVELL_E1149: 280 page = PHY_READ(sc, E1000_EADR); 281 /* Select page 3, LED control register. */ 282 PHY_WRITE(sc, E1000_EADR, 3); 283 PHY_WRITE(sc, E1000_SCR, 284 E1000_SCR_LED_LOS(1) | /* Link/Act */ 285 E1000_SCR_LED_INIT(8) | /* 10Mbps */ 286 E1000_SCR_LED_STAT1(7) | /* 100Mbps */ 287 E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ 288 /* Set blink rate. */ 289 PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | 290 E1000_BLINK_RATE(E1000_BLINK_84MS)); 291 PHY_WRITE(sc, E1000_EADR, page); 292 break; 293 case MII_MODEL_MARVELL_E3016: 294 /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ 295 PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); 296 /* Integrated register calibration workaround. */ 297 PHY_WRITE(sc, 0x1D, 17); 298 PHY_WRITE(sc, 0x1E, 0x3F60); 299 break; 300 default: 301 /* Force TX_CLK to 25MHz clock. */ 302 reg = PHY_READ(sc, E1000_ESCR); 303 reg |= E1000_ESCR_TX_CLK_25; 304 PHY_WRITE(sc, E1000_ESCR, reg); 305 break; 306 } 307 308 /* Reset the PHY so all changes take effect. */ 309 reg = PHY_READ(sc, E1000_CR); 310 reg |= E1000_CR_RESET; 311 PHY_WRITE(sc, E1000_CR, reg); 312 } 313 314 static int 315 e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 316 { 317 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 318 struct e1000phy_softc *esc = (struct e1000phy_softc *)sc; 319 uint16_t speed, gig; 320 int reg; 321 322 switch (cmd) { 323 case MII_POLLSTAT: 324 /* 325 * If we're not polling our PHY instance, just return. 326 */ 327 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 328 return (0); 329 break; 330 331 case MII_MEDIACHG: 332 /* 333 * If the media indicates a different PHY instance, 334 * isolate ourselves. 335 */ 336 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 337 reg = PHY_READ(sc, E1000_CR); 338 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_ISOLATE); 339 return (0); 340 } 341 342 /* 343 * If the interface is not up, don't do anything. 344 */ 345 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 346 break; 347 348 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 349 e1000phy_mii_phy_auto(esc); 350 break; 351 } 352 353 speed = 0; 354 switch (IFM_SUBTYPE(ife->ifm_media)) { 355 case IFM_1000_T: 356 if ((sc->mii_extcapabilities & 357 (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0) 358 return (EINVAL); 359 speed = E1000_CR_SPEED_1000; 360 break; 361 case IFM_1000_SX: 362 if ((sc->mii_extcapabilities & 363 (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) 364 return (EINVAL); 365 speed = E1000_CR_SPEED_1000; 366 break; 367 case IFM_100_TX: 368 speed = E1000_CR_SPEED_100; 369 break; 370 case IFM_10_T: 371 speed = E1000_CR_SPEED_10; 372 break; 373 case IFM_NONE: 374 reg = PHY_READ(sc, E1000_CR); 375 PHY_WRITE(sc, E1000_CR, 376 reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 377 goto done; 378 default: 379 return (EINVAL); 380 } 381 382 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 383 speed |= E1000_CR_FULL_DUPLEX; 384 gig = E1000_1GCR_1000T_FD; 385 } else 386 gig = E1000_1GCR_1000T; 387 388 reg = PHY_READ(sc, E1000_CR); 389 reg &= ~E1000_CR_AUTO_NEG_ENABLE; 390 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 391 392 /* 393 * When setting the link manually, one side must 394 * be the master and the other the slave. However 395 * ifmedia doesn't give us a good way to specify 396 * this, so we fake it by using one of the LINK 397 * flags. If LINK0 is set, we program the PHY to 398 * be a master, otherwise it's a slave. 399 */ 400 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T || 401 (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_SX)) { 402 if ((mii->mii_ifp->if_flags & IFF_LINK0)) 403 PHY_WRITE(sc, E1000_1GCR, gig | 404 E1000_1GCR_MS_ENABLE | E1000_1GCR_MS_VALUE); 405 else 406 PHY_WRITE(sc, E1000_1GCR, gig | 407 E1000_1GCR_MS_ENABLE); 408 } else { 409 if ((sc->mii_extcapabilities & 410 (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 411 PHY_WRITE(sc, E1000_1GCR, 0); 412 } 413 PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 414 PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 415 done: 416 break; 417 case MII_TICK: 418 /* 419 * If we're not currently selected, just return. 420 */ 421 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 422 return (0); 423 424 /* 425 * Is the interface even up? 426 */ 427 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 428 return (0); 429 430 /* 431 * Only used for autonegotiation. 432 */ 433 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 434 sc->mii_ticks = 0; 435 break; 436 } 437 438 /* 439 * check for link. 440 * Read the status register twice; BMSR_LINK is latch-low. 441 */ 442 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 443 if (reg & BMSR_LINK) { 444 sc->mii_ticks = 0; 445 break; 446 } 447 448 /* Announce link loss right after it happens. */ 449 if (sc->mii_ticks++ == 0) 450 break; 451 if (sc->mii_ticks <= sc->mii_anegticks) 452 break; 453 454 sc->mii_ticks = 0; 455 e1000phy_reset(sc); 456 e1000phy_mii_phy_auto(esc); 457 break; 458 } 459 460 /* Update the media status. */ 461 e1000phy_status(sc); 462 463 /* Callback if something changed. */ 464 mii_phy_update(sc, cmd); 465 return (0); 466 } 467 468 static void 469 e1000phy_status(struct mii_softc *sc) 470 { 471 struct mii_data *mii = sc->mii_pdata; 472 int bmcr, bmsr, gsr, ssr, ar, lpar; 473 474 mii->mii_media_status = IFM_AVALID; 475 mii->mii_media_active = IFM_ETHER; 476 477 bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 478 bmcr = PHY_READ(sc, E1000_CR); 479 ssr = PHY_READ(sc, E1000_SSR); 480 481 if (bmsr & E1000_SR_LINK_STATUS) 482 mii->mii_media_status |= IFM_ACTIVE; 483 484 if (bmcr & E1000_CR_LOOPBACK) 485 mii->mii_media_active |= IFM_LOOP; 486 487 if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && 488 (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { 489 /* Erg, still trying, I guess... */ 490 mii->mii_media_active |= IFM_NONE; 491 return; 492 } 493 494 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 495 switch (ssr & E1000_SSR_SPEED) { 496 case E1000_SSR_1000MBS: 497 mii->mii_media_active |= IFM_1000_T; 498 break; 499 case E1000_SSR_100MBS: 500 mii->mii_media_active |= IFM_100_TX; 501 break; 502 case E1000_SSR_10MBS: 503 mii->mii_media_active |= IFM_10_T; 504 break; 505 default: 506 mii->mii_media_active |= IFM_NONE; 507 return; 508 } 509 } else { 510 /* 511 * Some fiber PHY(88E1112) does not seem to set resolved 512 * speed so always assume we've got IFM_1000_SX. 513 */ 514 mii->mii_media_active |= IFM_1000_SX; 515 } 516 517 if (ssr & E1000_SSR_DUPLEX) 518 mii->mii_media_active |= IFM_FDX; 519 else 520 mii->mii_media_active |= IFM_HDX; 521 522 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 523 ar = PHY_READ(sc, E1000_AR); 524 lpar = PHY_READ(sc, E1000_LPAR); 525 /* FLAG0==rx-flow-control FLAG1==tx-flow-control */ 526 if ((ar & E1000_AR_PAUSE) && (lpar & E1000_LPAR_PAUSE)) { 527 mii->mii_media_active |= IFM_FLAG0 | IFM_FLAG1; 528 } else if (!(ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 529 (lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 530 mii->mii_media_active |= IFM_FLAG1; 531 } else if ((ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 532 !(lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 533 mii->mii_media_active |= IFM_FLAG0; 534 } 535 } 536 537 /* FLAG2 : local PHY resolved to MASTER */ 538 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) || 539 (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX)) { 540 PHY_READ(sc, E1000_1GSR); 541 gsr = PHY_READ(sc, E1000_1GSR); 542 if ((gsr & E1000_1GSR_MS_CONFIG_RES) != 0) 543 mii->mii_media_active |= IFM_FLAG2; 544 } 545 } 546 547 static int 548 e1000phy_mii_phy_auto(struct e1000phy_softc *esc) 549 { 550 struct mii_softc *sc; 551 uint16_t reg; 552 553 sc = &esc->mii_sc; 554 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 555 reg = PHY_READ(sc, E1000_AR); 556 reg |= E1000_AR_10T | E1000_AR_10T_FD | 557 E1000_AR_100TX | E1000_AR_100TX_FD | 558 E1000_AR_PAUSE | E1000_AR_ASM_DIR; 559 PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); 560 } else 561 PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X | 562 E1000_FA_SYM_PAUSE | E1000_FA_ASYM_PAUSE); 563 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 564 PHY_WRITE(sc, E1000_1GCR, 565 E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 566 PHY_WRITE(sc, E1000_CR, 567 E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 568 569 return (EJUSTRETURN); 570 } 571