1 /*- 2 * Principal Author: Parag Patel 3 * Copyright (c) 2001 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Additonal Copyright (c) 2001 by Traakan Software under same licence. 29 * Secondary Author: Matthew Jacob 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 37 */ 38 39 /* 40 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41 * 1000baseSX PHY. 42 * Nathan Binkert <nate@openbsd.org> 43 * Jung-uk Kim <jkim@niksun.com> 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/socket.h> 51 #include <sys/bus.h> 52 53 #include <machine/clock.h> 54 55 #include <net/if.h> 56 #include <net/if_media.h> 57 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 #include "miidevs.h" 61 62 #include <dev/mii/e1000phyreg.h> 63 64 #include "miibus_if.h" 65 66 static int e1000phy_probe(device_t); 67 static int e1000phy_attach(device_t); 68 69 static device_method_t e1000phy_methods[] = { 70 /* device interface */ 71 DEVMETHOD(device_probe, e1000phy_probe), 72 DEVMETHOD(device_attach, e1000phy_attach), 73 DEVMETHOD(device_detach, mii_phy_detach), 74 DEVMETHOD(device_shutdown, bus_generic_shutdown), 75 { 0, 0 } 76 }; 77 78 static devclass_t e1000phy_devclass; 79 static driver_t e1000phy_driver = { 80 "e1000phy", e1000phy_methods, sizeof (struct mii_softc) 81 }; 82 DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 83 84 static int e1000phy_service(struct mii_softc *, struct mii_data *, int); 85 static void e1000phy_status(struct mii_softc *); 86 static void e1000phy_reset(struct mii_softc *); 87 static int e1000phy_mii_phy_auto(struct mii_softc *); 88 89 static int e1000phy_debug = 0; 90 91 static int 92 e1000phy_probe(device_t dev) 93 { 94 struct mii_attach_args *ma; 95 u_int32_t id; 96 97 ma = device_get_ivars(dev); 98 id = ((ma->mii_id1 << 16) | ma->mii_id2) & E1000_ID_MASK; 99 if (id != E1000_ID_88E1000 100 && id != E1000_ID_88E1000S 101 && id != E1000_ID_88E1011) { 102 return ENXIO; 103 } 104 105 device_set_desc(dev, MII_STR_MARVELL_E1000); 106 return 0; 107 } 108 109 static int 110 e1000phy_attach(device_t dev) 111 { 112 struct mii_softc *sc; 113 struct mii_attach_args *ma; 114 struct mii_data *mii; 115 u_int32_t id; 116 117 getenv_int("e1000phy_debug", &e1000phy_debug); 118 119 sc = device_get_softc(dev); 120 ma = device_get_ivars(dev); 121 sc->mii_dev = device_get_parent(dev); 122 mii = device_get_softc(sc->mii_dev); 123 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 124 125 sc->mii_inst = mii->mii_instance; 126 sc->mii_phy = ma->mii_phyno; 127 sc->mii_service = e1000phy_service; 128 sc->mii_pdata = mii; 129 sc->mii_flags |= MIIF_NOISOLATE; 130 131 id = ((ma->mii_id1 << 16) | ma->mii_id2) & E1000_ID_MASK; 132 if (id == E1000_ID_88E1011 133 && (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK)) 134 sc->mii_flags |= MIIF_HAVEFIBER; 135 mii->mii_instance++; 136 e1000phy_reset(sc); 137 138 device_printf(dev, " "); 139 140 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 141 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 142 #if 0 143 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 144 E1000_CR_ISOLATE); 145 #endif 146 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 147 E1000_CR_SPEED_10); 148 printf("10baseT, "); 149 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 150 E1000_CR_SPEED_10 | E1000_CR_FULL_DUPLEX); 151 printf("10baseT-FDX, "); 152 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 153 E1000_CR_SPEED_100); 154 printf("100baseTX, "); 155 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 156 E1000_CR_SPEED_100 | E1000_CR_FULL_DUPLEX); 157 printf("100baseTX-FDX, "); 158 /* 159 * 1000BT-simplex not supported; driver must ignore this entry, 160 * but it must be present in order to manually set full-duplex. 161 */ 162 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst), 163 E1000_CR_SPEED_1000); 164 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 165 E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); 166 printf("1000baseTX-FDX, "); 167 } else { 168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), 169 E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); 170 printf("1000baseSX-FDX, "); 171 } 172 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 173 printf("auto\n"); 174 #undef ADD 175 176 MIIBUS_MEDIAINIT(sc->mii_dev); 177 return(0); 178 } 179 180 static void 181 e1000phy_reset(struct mii_softc *sc) 182 { 183 u_int32_t reg; 184 int i; 185 186 /* initialize custom E1000 registers to magic values */ 187 reg = PHY_READ(sc, E1000_SCR); 188 reg &= ~E1000_SCR_AUTO_X_MODE; 189 PHY_WRITE(sc, E1000_SCR, reg); 190 191 /* normal PHY reset */ 192 /*mii_phy_reset(sc);*/ 193 reg = PHY_READ(sc, E1000_CR); 194 reg |= E1000_CR_RESET; 195 PHY_WRITE(sc, E1000_CR, reg); 196 197 for (i = 0; i < 500; i++) { 198 DELAY(1); 199 reg = PHY_READ(sc, E1000_CR); 200 if (!(reg & E1000_CR_RESET)) 201 break; 202 } 203 204 /* set more custom E1000 registers to magic values */ 205 reg = PHY_READ(sc, E1000_SCR); 206 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 207 PHY_WRITE(sc, E1000_SCR, reg); 208 209 reg = PHY_READ(sc, E1000_ESCR); 210 reg |= E1000_ESCR_TX_CLK_25; 211 PHY_WRITE(sc, E1000_ESCR, reg); 212 213 /* even more magic to reset DSP? */ 214 PHY_WRITE(sc, 29, 0x1d); 215 PHY_WRITE(sc, 30, 0xc1); 216 PHY_WRITE(sc, 30, 0x00); 217 } 218 219 static int 220 e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 221 { 222 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 223 int reg; 224 225 switch (cmd) { 226 case MII_POLLSTAT: 227 /* 228 * If we're not polling our PHY instance, just return. 229 */ 230 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 231 return (0); 232 break; 233 234 case MII_MEDIACHG: 235 /* 236 * If the media indicates a different PHY instance, 237 * isolate ourselves. 238 */ 239 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 240 reg = PHY_READ(sc, E1000_CR); 241 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_ISOLATE); 242 return (0); 243 } 244 245 /* 246 * If the interface is not up, don't do anything. 247 */ 248 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) { 249 break; 250 } 251 252 switch (IFM_SUBTYPE(ife->ifm_media)) { 253 case IFM_AUTO: 254 e1000phy_reset(sc); 255 (void)e1000phy_mii_phy_auto(sc); 256 break; 257 258 case IFM_1000_T: 259 e1000phy_reset(sc); 260 261 /* TODO - any other way to force 1000BT? */ 262 (void)e1000phy_mii_phy_auto(sc); 263 break; 264 265 case IFM_1000_SX: 266 e1000phy_reset(sc); 267 268 PHY_WRITE(sc, E1000_CR, 269 E1000_CR_FULL_DUPLEX | E1000_CR_SPEED_1000); 270 PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD); 271 break; 272 273 case IFM_100_TX: 274 e1000phy_reset(sc); 275 276 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 277 PHY_WRITE(sc, E1000_CR, 278 E1000_CR_FULL_DUPLEX | E1000_CR_SPEED_100); 279 PHY_WRITE(sc, E1000_AR, E1000_AR_100TX_FD); 280 } else { 281 PHY_WRITE(sc, E1000_CR, E1000_CR_SPEED_100); 282 PHY_WRITE(sc, E1000_AR, E1000_AR_100TX); 283 } 284 break; 285 286 case IFM_10_T: 287 e1000phy_reset(sc); 288 289 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 290 PHY_WRITE(sc, E1000_CR, 291 E1000_CR_FULL_DUPLEX | E1000_CR_SPEED_10); 292 PHY_WRITE(sc, E1000_AR, E1000_AR_10T_FD); 293 } else { 294 PHY_WRITE(sc, E1000_CR, E1000_CR_SPEED_10); 295 PHY_WRITE(sc, E1000_AR, E1000_AR_10T); 296 } 297 298 break; 299 300 default: 301 return (EINVAL); 302 } 303 304 break; 305 306 case MII_TICK: 307 /* 308 * If we're not currently selected, just return. 309 */ 310 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 311 return (0); 312 } 313 314 /* 315 * Is the interface even up? 316 */ 317 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 318 return (0); 319 320 /* 321 * Only used for autonegotiation. 322 */ 323 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 324 break; 325 326 /* 327 * check for link. 328 * Read the status register twice; BMSR_LINK is latch-low. 329 */ 330 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 331 if (reg & BMSR_LINK) 332 break; 333 334 /* 335 * Only retry autonegotiation every 5 seconds. 336 */ 337 if (++sc->mii_ticks <= 5) 338 break; 339 340 sc->mii_ticks = 0; 341 e1000phy_reset(sc); 342 e1000phy_mii_phy_auto(sc); 343 return (0); 344 } 345 346 /* Update the media status. */ 347 e1000phy_status(sc); 348 349 /* Callback if something changed. */ 350 mii_phy_update(sc, cmd); 351 return (0); 352 } 353 354 static void 355 e1000phy_status(struct mii_softc *sc) 356 { 357 struct mii_data *mii = sc->mii_pdata; 358 int bmsr, bmcr, esr, ssr, isr, ar, lpar; 359 360 mii->mii_media_status = IFM_AVALID; 361 mii->mii_media_active = IFM_ETHER; 362 363 bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 364 esr = PHY_READ(sc, E1000_ESR); 365 bmcr = PHY_READ(sc, E1000_CR); 366 ssr = PHY_READ(sc, E1000_SSR); 367 isr = PHY_READ(sc, E1000_ISR); 368 ar = PHY_READ(sc, E1000_AR); 369 lpar = PHY_READ(sc, E1000_LPAR); 370 371 if (bmsr & E1000_SR_LINK_STATUS) 372 mii->mii_media_status |= IFM_ACTIVE; 373 374 if (bmcr & E1000_CR_LOOPBACK) 375 mii->mii_media_active |= IFM_LOOP; 376 377 if ((!(bmsr & E1000_SR_AUTO_NEG_COMPLETE) || !(ssr & E1000_SSR_LINK) || 378 !(ssr & E1000_SSR_SPD_DPLX_RESOLVED))) { 379 /* Erg, still trying, I guess... */ 380 mii->mii_media_active |= IFM_NONE; 381 return; 382 } 383 384 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 385 if (ssr & E1000_SSR_1000MBS) 386 mii->mii_media_active |= IFM_1000_T; 387 else if (ssr & E1000_SSR_100MBS) 388 mii->mii_media_active |= IFM_100_TX; 389 else 390 mii->mii_media_active |= IFM_10_T; 391 } else { 392 if (ssr & E1000_SSR_1000MBS) 393 mii->mii_media_active |= IFM_1000_SX; 394 } 395 396 if (ssr & E1000_SSR_DUPLEX) 397 mii->mii_media_active |= IFM_FDX; 398 else 399 mii->mii_media_active |= IFM_HDX; 400 401 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 402 /* FLAG0==rx-flow-control FLAG1==tx-flow-control */ 403 if ((ar & E1000_AR_PAUSE) && (lpar & E1000_LPAR_PAUSE)) { 404 mii->mii_media_active |= IFM_FLAG0 | IFM_FLAG1; 405 } else if (!(ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 406 (lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 407 mii->mii_media_active |= IFM_FLAG1; 408 } else if ((ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 409 !(lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 410 mii->mii_media_active |= IFM_FLAG0; 411 } 412 } 413 } 414 415 static int 416 e1000phy_mii_phy_auto(struct mii_softc *mii) 417 { 418 419 if ((mii->mii_flags & MIIF_HAVEFIBER) == 0) { 420 PHY_WRITE(mii, E1000_AR, E1000_AR_10T | E1000_AR_10T_FD | 421 E1000_AR_100TX | E1000_AR_100TX_FD | 422 E1000_AR_PAUSE | E1000_AR_ASM_DIR); 423 PHY_WRITE(mii, E1000_1GCR, E1000_1GCR_1000T_FD); 424 PHY_WRITE(mii, E1000_CR, 425 E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 426 } 427 428 return (EJUSTRETURN); 429 } 430