1 /*- 2 * Principal Author: Parag Patel 3 * Copyright (c) 2001 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Additonal Copyright (c) 2001 by Traakan Software under same licence. 29 * Secondary Author: Matthew Jacob 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 37 */ 38 39 /* 40 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41 * 1000baseSX PHY. 42 * Nathan Binkert <nate@openbsd.org> 43 * Jung-uk Kim <jkim@niksun.com> 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/socket.h> 51 #include <sys/bus.h> 52 53 54 #include <net/if.h> 55 #include <net/if_media.h> 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 #include "miidevs.h" 60 61 #include <dev/mii/e1000phyreg.h> 62 /* XXX */ 63 #include <machine/bus.h> 64 #include <dev/msk/if_mskreg.h> 65 66 #include "miibus_if.h" 67 68 static int e1000phy_probe(device_t); 69 static int e1000phy_attach(device_t); 70 71 struct e1000phy_softc { 72 struct mii_softc mii_sc; 73 int mii_model; 74 struct msk_mii_data *mmd; 75 }; 76 77 static device_method_t e1000phy_methods[] = { 78 /* device interface */ 79 DEVMETHOD(device_probe, e1000phy_probe), 80 DEVMETHOD(device_attach, e1000phy_attach), 81 DEVMETHOD(device_detach, mii_phy_detach), 82 DEVMETHOD(device_shutdown, bus_generic_shutdown), 83 { 0, 0 } 84 }; 85 86 static devclass_t e1000phy_devclass; 87 static driver_t e1000phy_driver = { 88 "e1000phy", 89 e1000phy_methods, 90 sizeof(struct e1000phy_softc) 91 }; 92 93 DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 94 95 static int e1000phy_service(struct mii_softc *, struct mii_data *, int); 96 static void e1000phy_status(struct mii_softc *); 97 static void e1000phy_reset(struct mii_softc *); 98 static int e1000phy_mii_phy_auto(struct e1000phy_softc *); 99 100 static const struct mii_phydesc e1000phys[] = { 101 MII_PHY_DESC(MARVELL, E1000), 102 MII_PHY_DESC(MARVELL, E1011), 103 MII_PHY_DESC(MARVELL, E1000_3), 104 MII_PHY_DESC(MARVELL, E1000S), 105 MII_PHY_DESC(MARVELL, E1000_5), 106 MII_PHY_DESC(MARVELL, E1101), 107 MII_PHY_DESC(MARVELL, E3082), 108 MII_PHY_DESC(MARVELL, E1112), 109 MII_PHY_DESC(MARVELL, E1149), 110 MII_PHY_DESC(MARVELL, E1111), 111 MII_PHY_DESC(MARVELL, E1116), 112 MII_PHY_DESC(MARVELL, E1116R), 113 MII_PHY_DESC(MARVELL, E1118), 114 MII_PHY_DESC(MARVELL, E3016), 115 MII_PHY_DESC(MARVELL, PHYG65G), 116 MII_PHY_DESC(xxMARVELL, E1000), 117 MII_PHY_DESC(xxMARVELL, E1011), 118 MII_PHY_DESC(xxMARVELL, E1000_3), 119 MII_PHY_DESC(xxMARVELL, E1000_5), 120 MII_PHY_DESC(xxMARVELL, E1111), 121 MII_PHY_END 122 }; 123 124 static int 125 e1000phy_probe(device_t dev) 126 { 127 128 return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 129 } 130 131 static int 132 e1000phy_attach(device_t dev) 133 { 134 struct e1000phy_softc *esc; 135 struct mii_softc *sc; 136 struct mii_attach_args *ma; 137 struct mii_data *mii; 138 struct ifnet *ifp; 139 140 esc = device_get_softc(dev); 141 sc = &esc->mii_sc; 142 ma = device_get_ivars(dev); 143 sc->mii_dev = device_get_parent(dev); 144 mii = device_get_softc(sc->mii_dev); 145 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 146 147 sc->mii_inst = mii->mii_instance; 148 sc->mii_phy = ma->mii_phyno; 149 sc->mii_service = e1000phy_service; 150 sc->mii_pdata = mii; 151 mii->mii_instance++; 152 153 esc->mii_model = MII_MODEL(ma->mii_id2); 154 ifp = sc->mii_pdata->mii_ifp; 155 if (strcmp(ifp->if_dname, "msk") == 0) { 156 /* XXX */ 157 esc->mmd = device_get_ivars( 158 device_get_parent(device_get_parent(dev))); 159 if (esc->mmd != NULL && 160 (esc->mmd->mii_flags & MIIF_HAVEFIBER) != 0) 161 sc->mii_flags |= MIIF_HAVEFIBER; 162 } 163 164 switch (esc->mii_model) { 165 case MII_MODEL_MARVELL_E1011: 166 case MII_MODEL_MARVELL_E1112: 167 if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 168 sc->mii_flags |= MIIF_HAVEFIBER; 169 break; 170 case MII_MODEL_MARVELL_E1149: 171 /* 172 * Some 88E1149 PHY's page select is initialized to 173 * point to other bank instead of copper/fiber bank 174 * which in turn resulted in wrong registers were 175 * accessed during PHY operation. It is believed that 176 * page 0 should be used for copper PHY so reinitialize 177 * E1000_EADR to select default copper PHY. If parent 178 * device know the type of PHY(either copper or fiber), 179 * that information should be used to select default 180 * type of PHY. 181 */ 182 PHY_WRITE(sc, E1000_EADR, 0); 183 break; 184 } 185 186 e1000phy_reset(sc); 187 188 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 189 if (sc->mii_capabilities & BMSR_EXTSTAT) 190 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 191 device_printf(dev, " "); 192 mii_phy_add_media(sc); 193 printf("\n"); 194 195 MIIBUS_MEDIAINIT(sc->mii_dev); 196 return (0); 197 } 198 199 static void 200 e1000phy_reset(struct mii_softc *sc) 201 { 202 struct e1000phy_softc *esc; 203 uint16_t reg, page; 204 205 esc = (struct e1000phy_softc *)sc; 206 reg = PHY_READ(sc, E1000_SCR); 207 if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 208 reg &= ~E1000_SCR_AUTO_X_MODE; 209 PHY_WRITE(sc, E1000_SCR, reg); 210 if (esc->mii_model == MII_MODEL_MARVELL_E1112) { 211 /* Select 1000BASE-X only mode. */ 212 page = PHY_READ(sc, E1000_EADR); 213 PHY_WRITE(sc, E1000_EADR, 2); 214 reg = PHY_READ(sc, E1000_SCR); 215 reg &= ~E1000_SCR_MODE_MASK; 216 reg |= E1000_SCR_MODE_1000BX; 217 PHY_WRITE(sc, E1000_SCR, reg); 218 if (esc->mmd != NULL && esc->mmd->pmd == 'P') { 219 /* Set SIGDET polarity low for SFP module. */ 220 PHY_WRITE(sc, E1000_EADR, 1); 221 reg = PHY_READ(sc, E1000_SCR); 222 reg |= E1000_SCR_FIB_SIGDET_POLARITY; 223 PHY_WRITE(sc, E1000_SCR, reg); 224 } 225 PHY_WRITE(sc, E1000_EADR, page); 226 } 227 } else { 228 switch (esc->mii_model) { 229 case MII_MODEL_MARVELL_E1111: 230 case MII_MODEL_MARVELL_E1112: 231 case MII_MODEL_MARVELL_E1116: 232 case MII_MODEL_MARVELL_E1118: 233 case MII_MODEL_MARVELL_E1149: 234 case MII_MODEL_MARVELL_PHYG65G: 235 /* Disable energy detect mode. */ 236 reg &= ~E1000_SCR_EN_DETECT_MASK; 237 reg |= E1000_SCR_AUTO_X_MODE; 238 if (esc->mii_model == MII_MODEL_MARVELL_E1116) 239 reg &= ~E1000_SCR_POWER_DOWN; 240 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 241 break; 242 case MII_MODEL_MARVELL_E3082: 243 reg |= (E1000_SCR_AUTO_X_MODE >> 1); 244 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 245 break; 246 case MII_MODEL_MARVELL_E3016: 247 reg |= E1000_SCR_AUTO_MDIX; 248 reg &= ~(E1000_SCR_EN_DETECT | 249 E1000_SCR_SCRAMBLER_DISABLE); 250 reg |= E1000_SCR_LPNP; 251 /* XXX Enable class A driver for Yukon FE+ A0. */ 252 PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); 253 break; 254 default: 255 reg &= ~E1000_SCR_AUTO_X_MODE; 256 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 257 break; 258 } 259 if (esc->mii_model != MII_MODEL_MARVELL_E3016) { 260 /* Auto correction for reversed cable polarity. */ 261 reg &= ~E1000_SCR_POLARITY_REVERSAL; 262 } 263 PHY_WRITE(sc, E1000_SCR, reg); 264 265 if (esc->mii_model == MII_MODEL_MARVELL_E1116 || 266 esc->mii_model == MII_MODEL_MARVELL_E1149) { 267 PHY_WRITE(sc, E1000_EADR, 2); 268 reg = PHY_READ(sc, E1000_SCR); 269 reg |= E1000_SCR_RGMII_POWER_UP; 270 PHY_WRITE(sc, E1000_SCR, reg); 271 PHY_WRITE(sc, E1000_EADR, 0); 272 } 273 } 274 275 switch (esc->mii_model) { 276 case MII_MODEL_MARVELL_E3082: 277 case MII_MODEL_MARVELL_E1112: 278 case MII_MODEL_MARVELL_E1118: 279 break; 280 case MII_MODEL_MARVELL_E1116: 281 page = PHY_READ(sc, E1000_EADR); 282 /* Select page 3, LED control register. */ 283 PHY_WRITE(sc, E1000_EADR, 3); 284 PHY_WRITE(sc, E1000_SCR, 285 E1000_SCR_LED_LOS(1) | /* Link/Act */ 286 E1000_SCR_LED_INIT(8) | /* 10Mbps */ 287 E1000_SCR_LED_STAT1(7) | /* 100Mbps */ 288 E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ 289 /* Set blink rate. */ 290 PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | 291 E1000_BLINK_RATE(E1000_BLINK_84MS)); 292 PHY_WRITE(sc, E1000_EADR, page); 293 break; 294 case MII_MODEL_MARVELL_E3016: 295 /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ 296 PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); 297 /* Integrated register calibration workaround. */ 298 PHY_WRITE(sc, 0x1D, 17); 299 PHY_WRITE(sc, 0x1E, 0x3F60); 300 break; 301 default: 302 /* Force TX_CLK to 25MHz clock. */ 303 reg = PHY_READ(sc, E1000_ESCR); 304 reg |= E1000_ESCR_TX_CLK_25; 305 PHY_WRITE(sc, E1000_ESCR, reg); 306 break; 307 } 308 309 /* Reset the PHY so all changes take effect. */ 310 reg = PHY_READ(sc, E1000_CR); 311 reg |= E1000_CR_RESET; 312 PHY_WRITE(sc, E1000_CR, reg); 313 } 314 315 static int 316 e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 317 { 318 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 319 struct e1000phy_softc *esc = (struct e1000phy_softc *)sc; 320 uint16_t speed, gig; 321 int reg; 322 323 switch (cmd) { 324 case MII_POLLSTAT: 325 /* 326 * If we're not polling our PHY instance, just return. 327 */ 328 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 329 return (0); 330 break; 331 332 case MII_MEDIACHG: 333 /* 334 * If the media indicates a different PHY instance, 335 * isolate ourselves. 336 */ 337 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 338 reg = PHY_READ(sc, E1000_CR); 339 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_ISOLATE); 340 return (0); 341 } 342 343 /* 344 * If the interface is not up, don't do anything. 345 */ 346 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 347 break; 348 349 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 350 e1000phy_mii_phy_auto(esc); 351 break; 352 } 353 354 speed = 0; 355 switch (IFM_SUBTYPE(ife->ifm_media)) { 356 case IFM_1000_T: 357 if ((sc->mii_extcapabilities & 358 (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0) 359 return (EINVAL); 360 speed = E1000_CR_SPEED_1000; 361 break; 362 case IFM_1000_SX: 363 if ((sc->mii_extcapabilities & 364 (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) 365 return (EINVAL); 366 speed = E1000_CR_SPEED_1000; 367 break; 368 case IFM_100_TX: 369 speed = E1000_CR_SPEED_100; 370 break; 371 case IFM_10_T: 372 speed = E1000_CR_SPEED_10; 373 break; 374 case IFM_NONE: 375 reg = PHY_READ(sc, E1000_CR); 376 PHY_WRITE(sc, E1000_CR, 377 reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 378 goto done; 379 default: 380 return (EINVAL); 381 } 382 383 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 384 speed |= E1000_CR_FULL_DUPLEX; 385 gig = E1000_1GCR_1000T_FD; 386 } else 387 gig = E1000_1GCR_1000T; 388 389 reg = PHY_READ(sc, E1000_CR); 390 reg &= ~E1000_CR_AUTO_NEG_ENABLE; 391 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 392 393 /* 394 * When setting the link manually, one side must 395 * be the master and the other the slave. However 396 * ifmedia doesn't give us a good way to specify 397 * this, so we fake it by using one of the LINK 398 * flags. If LINK0 is set, we program the PHY to 399 * be a master, otherwise it's a slave. 400 */ 401 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T || 402 (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_SX)) { 403 if ((mii->mii_ifp->if_flags & IFF_LINK0)) 404 PHY_WRITE(sc, E1000_1GCR, gig | 405 E1000_1GCR_MS_ENABLE | E1000_1GCR_MS_VALUE); 406 else 407 PHY_WRITE(sc, E1000_1GCR, gig | 408 E1000_1GCR_MS_ENABLE); 409 } else { 410 if ((sc->mii_extcapabilities & 411 (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 412 PHY_WRITE(sc, E1000_1GCR, 0); 413 } 414 PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 415 PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 416 done: 417 break; 418 case MII_TICK: 419 /* 420 * If we're not currently selected, just return. 421 */ 422 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 423 return (0); 424 425 /* 426 * Is the interface even up? 427 */ 428 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 429 return (0); 430 431 /* 432 * Only used for autonegotiation. 433 */ 434 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 435 sc->mii_ticks = 0; 436 break; 437 } 438 439 /* 440 * check for link. 441 * Read the status register twice; BMSR_LINK is latch-low. 442 */ 443 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 444 if (reg & BMSR_LINK) { 445 sc->mii_ticks = 0; 446 break; 447 } 448 449 /* Announce link loss right after it happens. */ 450 if (sc->mii_ticks++ == 0) 451 break; 452 if (sc->mii_ticks <= sc->mii_anegticks) 453 break; 454 455 sc->mii_ticks = 0; 456 e1000phy_reset(sc); 457 e1000phy_mii_phy_auto(esc); 458 break; 459 } 460 461 /* Update the media status. */ 462 e1000phy_status(sc); 463 464 /* Callback if something changed. */ 465 mii_phy_update(sc, cmd); 466 return (0); 467 } 468 469 static void 470 e1000phy_status(struct mii_softc *sc) 471 { 472 struct mii_data *mii = sc->mii_pdata; 473 int bmcr, bmsr, gsr, ssr, ar, lpar; 474 475 mii->mii_media_status = IFM_AVALID; 476 mii->mii_media_active = IFM_ETHER; 477 478 bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 479 bmcr = PHY_READ(sc, E1000_CR); 480 ssr = PHY_READ(sc, E1000_SSR); 481 482 if (bmsr & E1000_SR_LINK_STATUS) 483 mii->mii_media_status |= IFM_ACTIVE; 484 485 if (bmcr & E1000_CR_LOOPBACK) 486 mii->mii_media_active |= IFM_LOOP; 487 488 if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && 489 (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { 490 /* Erg, still trying, I guess... */ 491 mii->mii_media_active |= IFM_NONE; 492 return; 493 } 494 495 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 496 switch (ssr & E1000_SSR_SPEED) { 497 case E1000_SSR_1000MBS: 498 mii->mii_media_active |= IFM_1000_T; 499 break; 500 case E1000_SSR_100MBS: 501 mii->mii_media_active |= IFM_100_TX; 502 break; 503 case E1000_SSR_10MBS: 504 mii->mii_media_active |= IFM_10_T; 505 break; 506 default: 507 mii->mii_media_active |= IFM_NONE; 508 return; 509 } 510 } else { 511 /* 512 * Some fiber PHY(88E1112) does not seem to set resolved 513 * speed so always assume we've got IFM_1000_SX. 514 */ 515 mii->mii_media_active |= IFM_1000_SX; 516 } 517 518 if (ssr & E1000_SSR_DUPLEX) 519 mii->mii_media_active |= IFM_FDX; 520 else 521 mii->mii_media_active |= IFM_HDX; 522 523 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 524 ar = PHY_READ(sc, E1000_AR); 525 lpar = PHY_READ(sc, E1000_LPAR); 526 /* FLAG0==rx-flow-control FLAG1==tx-flow-control */ 527 if ((ar & E1000_AR_PAUSE) && (lpar & E1000_LPAR_PAUSE)) { 528 mii->mii_media_active |= IFM_FLAG0 | IFM_FLAG1; 529 } else if (!(ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 530 (lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 531 mii->mii_media_active |= IFM_FLAG1; 532 } else if ((ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 533 !(lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 534 mii->mii_media_active |= IFM_FLAG0; 535 } 536 } 537 538 /* FLAG2 : local PHY resolved to MASTER */ 539 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) || 540 (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX)) { 541 PHY_READ(sc, E1000_1GSR); 542 gsr = PHY_READ(sc, E1000_1GSR); 543 if ((gsr & E1000_1GSR_MS_CONFIG_RES) != 0) 544 mii->mii_media_active |= IFM_FLAG2; 545 } 546 } 547 548 static int 549 e1000phy_mii_phy_auto(struct e1000phy_softc *esc) 550 { 551 struct mii_softc *sc; 552 uint16_t reg; 553 554 sc = &esc->mii_sc; 555 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 556 reg = PHY_READ(sc, E1000_AR); 557 reg |= E1000_AR_10T | E1000_AR_10T_FD | 558 E1000_AR_100TX | E1000_AR_100TX_FD | 559 E1000_AR_PAUSE | E1000_AR_ASM_DIR; 560 PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); 561 } else 562 PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X | 563 E1000_FA_SYM_PAUSE | E1000_FA_ASYM_PAUSE); 564 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 565 PHY_WRITE(sc, E1000_1GCR, 566 E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 567 PHY_WRITE(sc, E1000_CR, 568 E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 569 570 return (EJUSTRETURN); 571 } 572