1 /*- 2 * Principal Author: Parag Patel 3 * Copyright (c) 2001 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Additonal Copyright (c) 2001 by Traakan Software under same licence. 29 * Secondary Author: Matthew Jacob 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 37 */ 38 39 /* 40 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41 * 1000baseSX PHY. 42 * Nathan Binkert <nate@openbsd.org> 43 * Jung-uk Kim <jkim@niksun.com> 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/socket.h> 51 #include <sys/bus.h> 52 53 54 #include <net/if.h> 55 #include <net/if_media.h> 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 #include "miidevs.h" 60 61 #include <dev/mii/e1000phyreg.h> 62 63 #include "miibus_if.h" 64 65 static int e1000phy_probe(device_t); 66 static int e1000phy_attach(device_t); 67 68 struct e1000phy_softc { 69 struct mii_softc mii_sc; 70 int mii_model; 71 }; 72 73 static device_method_t e1000phy_methods[] = { 74 /* device interface */ 75 DEVMETHOD(device_probe, e1000phy_probe), 76 DEVMETHOD(device_attach, e1000phy_attach), 77 DEVMETHOD(device_detach, mii_phy_detach), 78 DEVMETHOD(device_shutdown, bus_generic_shutdown), 79 { 0, 0 } 80 }; 81 82 static devclass_t e1000phy_devclass; 83 static driver_t e1000phy_driver = { 84 "e1000phy", 85 e1000phy_methods, 86 sizeof(struct e1000phy_softc) 87 }; 88 89 DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 90 91 static int e1000phy_service(struct mii_softc *, struct mii_data *, int); 92 static void e1000phy_status(struct mii_softc *); 93 static void e1000phy_reset(struct mii_softc *); 94 static int e1000phy_mii_phy_auto(struct e1000phy_softc *); 95 96 static const struct mii_phydesc e1000phys[] = { 97 MII_PHY_DESC(MARVELL, E1000), 98 MII_PHY_DESC(MARVELL, E1011), 99 MII_PHY_DESC(MARVELL, E1000_3), 100 MII_PHY_DESC(MARVELL, E1000S), 101 MII_PHY_DESC(MARVELL, E1000_5), 102 MII_PHY_DESC(MARVELL, E1000_6), 103 MII_PHY_DESC(MARVELL, E3082), 104 MII_PHY_DESC(MARVELL, E1112), 105 MII_PHY_DESC(MARVELL, E1149), 106 MII_PHY_DESC(MARVELL, E1111), 107 MII_PHY_DESC(MARVELL, E1116), 108 MII_PHY_DESC(MARVELL, E1116R), 109 MII_PHY_DESC(MARVELL, E1118), 110 MII_PHY_DESC(xxMARVELL, E1000), 111 MII_PHY_DESC(xxMARVELL, E1011), 112 MII_PHY_DESC(xxMARVELL, E1000_3), 113 MII_PHY_DESC(xxMARVELL, E1000_5), 114 MII_PHY_DESC(xxMARVELL, E1111), 115 MII_PHY_END 116 }; 117 118 static int 119 e1000phy_probe(device_t dev) 120 { 121 122 return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 123 } 124 125 static int 126 e1000phy_attach(device_t dev) 127 { 128 struct e1000phy_softc *esc; 129 struct mii_softc *sc; 130 struct mii_attach_args *ma; 131 struct mii_data *mii; 132 int fast_ether; 133 134 esc = device_get_softc(dev); 135 sc = &esc->mii_sc; 136 ma = device_get_ivars(dev); 137 sc->mii_dev = device_get_parent(dev); 138 mii = device_get_softc(sc->mii_dev); 139 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 140 141 sc->mii_inst = mii->mii_instance; 142 sc->mii_phy = ma->mii_phyno; 143 sc->mii_service = e1000phy_service; 144 sc->mii_pdata = mii; 145 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 146 mii->mii_instance++; 147 148 fast_ether = 0; 149 esc->mii_model = MII_MODEL(ma->mii_id2); 150 switch (esc->mii_model) { 151 case MII_MODEL_MARVELL_E1011: 152 case MII_MODEL_MARVELL_E1112: 153 if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 154 sc->mii_flags |= MIIF_HAVEFIBER; 155 break; 156 case MII_MODEL_MARVELL_E3082: 157 /* 88E3082 10/100 Fast Ethernet PHY. */ 158 sc->mii_anegticks = MII_ANEGTICKS; 159 fast_ether = 1; 160 break; 161 } 162 163 e1000phy_reset(sc); 164 165 device_printf(dev, " "); 166 167 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 169 E1000_CR_ISOLATE); 170 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 171 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 172 E1000_CR_SPEED_10); 173 printf("10baseT, "); 174 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 175 E1000_CR_SPEED_10 | E1000_CR_FULL_DUPLEX); 176 printf("10baseT-FDX, "); 177 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 178 E1000_CR_SPEED_100); 179 printf("100baseTX, "); 180 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 181 E1000_CR_SPEED_100 | E1000_CR_FULL_DUPLEX); 182 printf("100baseTX-FDX, "); 183 if (fast_ether == 0) { 184 /* 185 * 1000BT-simplex not supported; driver must ignore 186 * this entry, but it must be present in order to 187 * manually set full-duplex. 188 */ 189 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 190 sc->mii_inst), E1000_CR_SPEED_1000); 191 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 192 sc->mii_inst), 193 E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); 194 printf("1000baseTX-FDX, "); 195 } 196 } else { 197 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), 198 E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); 199 printf("1000baseSX-FDX, "); 200 } 201 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 202 printf("auto\n"); 203 #undef ADD 204 205 MIIBUS_MEDIAINIT(sc->mii_dev); 206 return (0); 207 } 208 209 static void 210 e1000phy_reset(struct mii_softc *sc) 211 { 212 struct e1000phy_softc *esc; 213 uint16_t reg, page; 214 215 esc = (struct e1000phy_softc *)sc; 216 reg = PHY_READ(sc, E1000_SCR); 217 if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 218 reg &= ~E1000_SCR_AUTO_X_MODE; 219 PHY_WRITE(sc, E1000_SCR, reg); 220 if (esc->mii_model == MII_MODEL_MARVELL_E1112) { 221 /* Select 1000BASE-X only mode. */ 222 page = PHY_READ(sc, E1000_EADR); 223 PHY_WRITE(sc, E1000_EADR, 2); 224 reg = PHY_READ(sc, E1000_SCR); 225 reg &= ~E1000_SCR_MODE_MASK; 226 reg |= E1000_SCR_MODE_1000BX; 227 PHY_WRITE(sc, E1000_SCR, reg); 228 PHY_WRITE(sc, E1000_EADR, page); 229 } 230 } else { 231 switch (esc->mii_model) { 232 case MII_MODEL_MARVELL_E1111: 233 case MII_MODEL_MARVELL_E1112: 234 case MII_MODEL_MARVELL_E1116: 235 case MII_MODEL_MARVELL_E1118: 236 case MII_MODEL_MARVELL_E1149: 237 /* Disable energy detect mode. */ 238 reg &= ~E1000_SCR_EN_DETECT_MASK; 239 reg |= E1000_SCR_AUTO_X_MODE; 240 if (esc->mii_model == MII_MODEL_MARVELL_E1116) 241 reg &= ~E1000_SCR_POWER_DOWN; 242 break; 243 case MII_MODEL_MARVELL_E3082: 244 reg |= (E1000_SCR_AUTO_X_MODE >> 1); 245 break; 246 default: 247 reg &= ~E1000_SCR_AUTO_X_MODE; 248 break; 249 } 250 /* Enable CRS on TX. */ 251 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 252 /* Auto correction for reversed cable polarity. */ 253 reg &= ~E1000_SCR_POLARITY_REVERSAL; 254 PHY_WRITE(sc, E1000_SCR, reg); 255 256 if (esc->mii_model == MII_MODEL_MARVELL_E1116) { 257 PHY_WRITE(sc, E1000_EADR, 2); 258 reg = PHY_READ(sc, E1000_SCR); 259 reg |= E1000_SCR_RGMII_POWER_UP; 260 PHY_WRITE(sc, E1000_SCR, reg); 261 PHY_WRITE(sc, E1000_EADR, 0); 262 } 263 } 264 265 switch (MII_MODEL(esc->mii_model)) { 266 case MII_MODEL_MARVELL_E3082: 267 case MII_MODEL_MARVELL_E1112: 268 case MII_MODEL_MARVELL_E1116: 269 case MII_MODEL_MARVELL_E1118: 270 case MII_MODEL_MARVELL_E1149: 271 break; 272 default: 273 /* Force TX_CLK to 25MHz clock. */ 274 reg = PHY_READ(sc, E1000_ESCR); 275 reg |= E1000_ESCR_TX_CLK_25; 276 PHY_WRITE(sc, E1000_ESCR, reg); 277 break; 278 } 279 280 /* Reset the PHY so all changes take effect. */ 281 reg = PHY_READ(sc, E1000_CR); 282 reg |= E1000_CR_RESET; 283 PHY_WRITE(sc, E1000_CR, reg); 284 } 285 286 static int 287 e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 288 { 289 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 290 struct e1000phy_softc *esc = (struct e1000phy_softc *)sc; 291 uint16_t speed, gig; 292 int reg; 293 294 switch (cmd) { 295 case MII_POLLSTAT: 296 /* 297 * If we're not polling our PHY instance, just return. 298 */ 299 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 300 return (0); 301 break; 302 303 case MII_MEDIACHG: 304 /* 305 * If the media indicates a different PHY instance, 306 * isolate ourselves. 307 */ 308 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 309 reg = PHY_READ(sc, E1000_CR); 310 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_ISOLATE); 311 return (0); 312 } 313 314 /* 315 * If the interface is not up, don't do anything. 316 */ 317 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 318 break; 319 320 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 321 e1000phy_mii_phy_auto(esc); 322 break; 323 } 324 325 speed = 0; 326 switch (IFM_SUBTYPE(ife->ifm_media)) { 327 case IFM_1000_T: 328 if (esc->mii_model == MII_MODEL_MARVELL_E3082) 329 return (EINVAL); 330 speed = E1000_CR_SPEED_1000; 331 break; 332 case IFM_1000_SX: 333 if (esc->mii_model == MII_MODEL_MARVELL_E3082) 334 return (EINVAL); 335 speed = E1000_CR_SPEED_1000; 336 break; 337 case IFM_100_TX: 338 speed = E1000_CR_SPEED_100; 339 break; 340 case IFM_10_T: 341 speed = E1000_CR_SPEED_10; 342 break; 343 case IFM_NONE: 344 reg = PHY_READ(sc, E1000_CR); 345 PHY_WRITE(sc, E1000_CR, 346 reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 347 goto done; 348 default: 349 return (EINVAL); 350 } 351 352 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 353 speed |= E1000_CR_FULL_DUPLEX; 354 gig = E1000_1GCR_1000T_FD; 355 } else 356 gig = E1000_1GCR_1000T; 357 358 reg = PHY_READ(sc, E1000_CR); 359 reg &= ~E1000_CR_AUTO_NEG_ENABLE; 360 PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 361 362 /* 363 * When setting the link manually, one side must 364 * be the master and the other the slave. However 365 * ifmedia doesn't give us a good way to specify 366 * this, so we fake it by using one of the LINK 367 * flags. If LINK0 is set, we program the PHY to 368 * be a master, otherwise it's a slave. 369 */ 370 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T || 371 (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_SX)) { 372 if ((mii->mii_ifp->if_flags & IFF_LINK0)) 373 PHY_WRITE(sc, E1000_1GCR, gig | 374 E1000_1GCR_MS_ENABLE | E1000_1GCR_MS_VALUE); 375 else 376 PHY_WRITE(sc, E1000_1GCR, gig | 377 E1000_1GCR_MS_ENABLE); 378 } else { 379 if (esc->mii_model != MII_MODEL_MARVELL_E3082) 380 PHY_WRITE(sc, E1000_1GCR, 0); 381 } 382 PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 383 PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 384 done: 385 break; 386 case MII_TICK: 387 /* 388 * If we're not currently selected, just return. 389 */ 390 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 391 return (0); 392 393 /* 394 * Is the interface even up? 395 */ 396 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 397 return (0); 398 399 /* 400 * Only used for autonegotiation. 401 */ 402 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 403 sc->mii_ticks = 0; 404 break; 405 } 406 407 /* 408 * check for link. 409 * Read the status register twice; BMSR_LINK is latch-low. 410 */ 411 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 412 if (reg & BMSR_LINK) { 413 sc->mii_ticks = 0; 414 break; 415 } 416 417 /* Announce link loss right after it happens. */ 418 if (sc->mii_ticks++ == 0) 419 break; 420 if (sc->mii_ticks <= sc->mii_anegticks) 421 return (0); 422 423 sc->mii_ticks = 0; 424 e1000phy_reset(sc); 425 e1000phy_mii_phy_auto(esc); 426 break; 427 } 428 429 /* Update the media status. */ 430 e1000phy_status(sc); 431 432 /* Callback if something changed. */ 433 mii_phy_update(sc, cmd); 434 return (0); 435 } 436 437 static void 438 e1000phy_status(struct mii_softc *sc) 439 { 440 struct mii_data *mii = sc->mii_pdata; 441 int bmsr, bmcr, esr, gsr, ssr, isr, ar, lpar; 442 443 mii->mii_media_status = IFM_AVALID; 444 mii->mii_media_active = IFM_ETHER; 445 446 bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 447 esr = PHY_READ(sc, E1000_ESR); 448 bmcr = PHY_READ(sc, E1000_CR); 449 ssr = PHY_READ(sc, E1000_SSR); 450 isr = PHY_READ(sc, E1000_ISR); 451 ar = PHY_READ(sc, E1000_AR); 452 lpar = PHY_READ(sc, E1000_LPAR); 453 454 if (bmsr & E1000_SR_LINK_STATUS) 455 mii->mii_media_status |= IFM_ACTIVE; 456 457 if (bmcr & E1000_CR_LOOPBACK) 458 mii->mii_media_active |= IFM_LOOP; 459 460 if ((((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0) && 461 ((bmsr & E1000_SR_AUTO_NEG_COMPLETE) == 0)) || 462 ((ssr & E1000_SSR_LINK) == 0) || 463 ((ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0)) { 464 /* Erg, still trying, I guess... */ 465 mii->mii_media_active |= IFM_NONE; 466 return; 467 } 468 469 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 470 if (ssr & E1000_SSR_1000MBS) 471 mii->mii_media_active |= IFM_1000_T; 472 else if (ssr & E1000_SSR_100MBS) 473 mii->mii_media_active |= IFM_100_TX; 474 else 475 mii->mii_media_active |= IFM_10_T; 476 } else { 477 if (ssr & E1000_SSR_1000MBS) 478 mii->mii_media_active |= IFM_1000_SX; 479 } 480 481 if (ssr & E1000_SSR_DUPLEX) 482 mii->mii_media_active |= IFM_FDX; 483 else 484 mii->mii_media_active |= IFM_HDX; 485 486 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 487 /* FLAG0==rx-flow-control FLAG1==tx-flow-control */ 488 if ((ar & E1000_AR_PAUSE) && (lpar & E1000_LPAR_PAUSE)) { 489 mii->mii_media_active |= IFM_FLAG0 | IFM_FLAG1; 490 } else if (!(ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 491 (lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 492 mii->mii_media_active |= IFM_FLAG1; 493 } else if ((ar & E1000_AR_PAUSE) && (ar & E1000_AR_ASM_DIR) && 494 !(lpar & E1000_LPAR_PAUSE) && (lpar & E1000_LPAR_ASM_DIR)) { 495 mii->mii_media_active |= IFM_FLAG0; 496 } 497 } 498 499 /* FLAG2 : local PHY resolved to MASTER */ 500 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) || 501 (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX)) { 502 PHY_READ(sc, E1000_1GSR); 503 gsr = PHY_READ(sc, E1000_1GSR); 504 if ((gsr & E1000_1GSR_MS_CONFIG_RES) != 0) 505 mii->mii_media_active |= IFM_FLAG2; 506 } 507 } 508 509 static int 510 e1000phy_mii_phy_auto(struct e1000phy_softc *esc) 511 { 512 struct mii_softc *sc; 513 514 sc = &esc->mii_sc; 515 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) 516 PHY_WRITE(sc, E1000_AR, E1000_AR_10T | E1000_AR_10T_FD | 517 E1000_AR_100TX | E1000_AR_100TX_FD | 518 E1000_AR_PAUSE | E1000_AR_ASM_DIR); 519 else 520 PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X | 521 E1000_FA_SYM_PAUSE | E1000_FA_ASYM_PAUSE); 522 if (esc->mii_model != MII_MODEL_MARVELL_E3082) 523 PHY_WRITE(sc, E1000_1GCR, 524 E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 525 PHY_WRITE(sc, E1000_CR, 526 E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 527 528 return (EJUSTRETURN); 529 } 530