1 /****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #ifndef _I40E_LAN_HMC_H_ 36 #define _I40E_LAN_HMC_H_ 37 38 /* forward-declare the HW struct for the compiler */ 39 struct i40e_hw; 40 41 /* HMC element context information */ 42 43 /* Rx queue context data 44 * 45 * The sizes of the variables may be larger than needed due to crossing byte 46 * boundaries. If we do not have the width of the variable set to the correct 47 * size then we could end up shifting bits off the top of the variable when the 48 * variable is at the top of a byte and crosses over into the next byte. 49 */ 50 struct i40e_hmc_obj_rxq { 51 u16 head; 52 u16 cpuid; /* bigger than needed, see above for reason */ 53 u64 base; 54 u16 qlen; 55 #define I40E_RXQ_CTX_DBUFF_SHIFT 7 56 u16 dbuff; /* bigger than needed, see above for reason */ 57 #define I40E_RXQ_CTX_HBUFF_SHIFT 6 58 u16 hbuff; /* bigger than needed, see above for reason */ 59 u8 dtype; 60 u8 dsize; 61 u8 crcstrip; 62 u8 fc_ena; 63 u8 l2tsel; 64 u8 hsplit_0; 65 u8 hsplit_1; 66 u8 showiv; 67 u32 rxmax; /* bigger than needed, see above for reason */ 68 u8 tphrdesc_ena; 69 u8 tphwdesc_ena; 70 u8 tphdata_ena; 71 u8 tphhead_ena; 72 u16 lrxqthresh; /* bigger than needed, see above for reason */ 73 u8 prefena; /* NOTE: normally must be set to 1 at init */ 74 }; 75 76 /* Tx queue context data 77 * 78 * The sizes of the variables may be larger than needed due to crossing byte 79 * boundaries. If we do not have the width of the variable set to the correct 80 * size then we could end up shifting bits off the top of the variable when the 81 * variable is at the top of a byte and crosses over into the next byte. 82 */ 83 struct i40e_hmc_obj_txq { 84 u16 head; 85 u8 new_context; 86 u64 base; 87 u8 fc_ena; 88 u8 timesync_ena; 89 u8 fd_ena; 90 u8 alt_vlan_ena; 91 u16 thead_wb; 92 u8 cpuid; 93 u8 head_wb_ena; 94 u16 qlen; 95 u8 tphrdesc_ena; 96 u8 tphrpacket_ena; 97 u8 tphwdesc_ena; 98 u64 head_wb_addr; 99 u32 crc; 100 u16 rdylist; 101 u8 rdylist_act; 102 }; 103 104 /* for hsplit_0 field of Rx HMC context */ 105 enum i40e_hmc_obj_rx_hsplit_0 { 106 I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0, 107 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1, 108 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2, 109 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4, 110 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8, 111 }; 112 113 /* fcoe_cntx and fcoe_filt are for debugging purpose only */ 114 struct i40e_hmc_obj_fcoe_cntx { 115 u32 rsv[32]; 116 }; 117 118 struct i40e_hmc_obj_fcoe_filt { 119 u32 rsv[8]; 120 }; 121 122 /* Context sizes for LAN objects */ 123 enum i40e_hmc_lan_object_size { 124 I40E_HMC_LAN_OBJ_SZ_8 = 0x3, 125 I40E_HMC_LAN_OBJ_SZ_16 = 0x4, 126 I40E_HMC_LAN_OBJ_SZ_32 = 0x5, 127 I40E_HMC_LAN_OBJ_SZ_64 = 0x6, 128 I40E_HMC_LAN_OBJ_SZ_128 = 0x7, 129 I40E_HMC_LAN_OBJ_SZ_256 = 0x8, 130 I40E_HMC_LAN_OBJ_SZ_512 = 0x9, 131 }; 132 133 #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512 134 #define I40E_HMC_OBJ_SIZE_TXQ 128 135 #define I40E_HMC_OBJ_SIZE_RXQ 32 136 #define I40E_HMC_OBJ_SIZE_FCOE_CNTX 64 137 #define I40E_HMC_OBJ_SIZE_FCOE_FILT 64 138 139 enum i40e_hmc_lan_rsrc_type { 140 I40E_HMC_LAN_FULL = 0, 141 I40E_HMC_LAN_TX = 1, 142 I40E_HMC_LAN_RX = 2, 143 I40E_HMC_FCOE_CTX = 3, 144 I40E_HMC_FCOE_FILT = 4, 145 I40E_HMC_LAN_MAX = 5 146 }; 147 148 enum i40e_hmc_model { 149 I40E_HMC_MODEL_DIRECT_PREFERRED = 0, 150 I40E_HMC_MODEL_DIRECT_ONLY = 1, 151 I40E_HMC_MODEL_PAGED_ONLY = 2, 152 I40E_HMC_MODEL_UNKNOWN, 153 }; 154 155 struct i40e_hmc_lan_create_obj_info { 156 struct i40e_hmc_info *hmc_info; 157 u32 rsrc_type; 158 u32 start_idx; 159 u32 count; 160 enum i40e_sd_entry_type entry_type; 161 u64 direct_mode_sz; 162 }; 163 164 struct i40e_hmc_lan_delete_obj_info { 165 struct i40e_hmc_info *hmc_info; 166 u32 rsrc_type; 167 u32 start_idx; 168 u32 count; 169 }; 170 171 enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, 172 u32 rxq_num, u32 fcoe_cntx_num, 173 u32 fcoe_filt_num); 174 enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw, 175 enum i40e_hmc_model model); 176 enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw); 177 178 u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num, 179 u32 fcoe_cntx_num, u32 fcoe_filt_num); 180 enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw, 181 u16 queue, 182 struct i40e_hmc_obj_txq *s); 183 enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, 184 u16 queue); 185 enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw, 186 u16 queue, 187 struct i40e_hmc_obj_txq *s); 188 enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw, 189 u16 queue, 190 struct i40e_hmc_obj_rxq *s); 191 enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, 192 u16 queue); 193 enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw, 194 u16 queue, 195 struct i40e_hmc_obj_rxq *s); 196 enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw, 197 struct i40e_hmc_lan_create_obj_info *info); 198 enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw, 199 struct i40e_hmc_lan_delete_obj_info *info); 200 201 #endif /* _I40E_LAN_HMC_H_ */ 202