1 /****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 34 #ifndef _I40E_LAN_HMC_H_ 35 #define _I40E_LAN_HMC_H_ 36 37 /* forward-declare the HW struct for the compiler */ 38 struct i40e_hw; 39 40 /* HMC element context information */ 41 42 /* Rx queue context data 43 * 44 * The sizes of the variables may be larger than needed due to crossing byte 45 * boundaries. If we do not have the width of the variable set to the correct 46 * size then we could end up shifting bits off the top of the variable when the 47 * variable is at the top of a byte and crosses over into the next byte. 48 */ 49 struct i40e_hmc_obj_rxq { 50 u16 head; 51 u16 cpuid; /* bigger than needed, see above for reason */ 52 u64 base; 53 u16 qlen; 54 #define I40E_RXQ_CTX_DBUFF_SHIFT 7 55 u16 dbuff; /* bigger than needed, see above for reason */ 56 #define I40E_RXQ_CTX_HBUFF_SHIFT 6 57 u16 hbuff; /* bigger than needed, see above for reason */ 58 u8 dtype; 59 u8 dsize; 60 u8 crcstrip; 61 u8 fc_ena; 62 u8 l2tsel; 63 u8 hsplit_0; 64 u8 hsplit_1; 65 u8 showiv; 66 u32 rxmax; /* bigger than needed, see above for reason */ 67 u8 tphrdesc_ena; 68 u8 tphwdesc_ena; 69 u8 tphdata_ena; 70 u8 tphhead_ena; 71 u16 lrxqthresh; /* bigger than needed, see above for reason */ 72 u8 prefena; /* NOTE: normally must be set to 1 at init */ 73 }; 74 75 /* Tx queue context data 76 * 77 * The sizes of the variables may be larger than needed due to crossing byte 78 * boundaries. If we do not have the width of the variable set to the correct 79 * size then we could end up shifting bits off the top of the variable when the 80 * variable is at the top of a byte and crosses over into the next byte. 81 */ 82 struct i40e_hmc_obj_txq { 83 u16 head; 84 u8 new_context; 85 u64 base; 86 u8 fc_ena; 87 u8 timesync_ena; 88 u8 fd_ena; 89 u8 alt_vlan_ena; 90 u16 thead_wb; 91 u8 cpuid; 92 u8 head_wb_ena; 93 u16 qlen; 94 u8 tphrdesc_ena; 95 u8 tphrpacket_ena; 96 u8 tphwdesc_ena; 97 u64 head_wb_addr; 98 u32 crc; 99 u16 rdylist; 100 u8 rdylist_act; 101 }; 102 103 /* for hsplit_0 field of Rx HMC context */ 104 enum i40e_hmc_obj_rx_hsplit_0 { 105 I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0, 106 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1, 107 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2, 108 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4, 109 I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8, 110 }; 111 112 /* fcoe_cntx and fcoe_filt are for debugging purpose only */ 113 struct i40e_hmc_obj_fcoe_cntx { 114 u32 rsv[32]; 115 }; 116 117 struct i40e_hmc_obj_fcoe_filt { 118 u32 rsv[8]; 119 }; 120 121 /* Context sizes for LAN objects */ 122 enum i40e_hmc_lan_object_size { 123 I40E_HMC_LAN_OBJ_SZ_8 = 0x3, 124 I40E_HMC_LAN_OBJ_SZ_16 = 0x4, 125 I40E_HMC_LAN_OBJ_SZ_32 = 0x5, 126 I40E_HMC_LAN_OBJ_SZ_64 = 0x6, 127 I40E_HMC_LAN_OBJ_SZ_128 = 0x7, 128 I40E_HMC_LAN_OBJ_SZ_256 = 0x8, 129 I40E_HMC_LAN_OBJ_SZ_512 = 0x9, 130 }; 131 132 #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512 133 #define I40E_HMC_OBJ_SIZE_TXQ 128 134 #define I40E_HMC_OBJ_SIZE_RXQ 32 135 #define I40E_HMC_OBJ_SIZE_FCOE_CNTX 64 136 #define I40E_HMC_OBJ_SIZE_FCOE_FILT 64 137 138 enum i40e_hmc_lan_rsrc_type { 139 I40E_HMC_LAN_FULL = 0, 140 I40E_HMC_LAN_TX = 1, 141 I40E_HMC_LAN_RX = 2, 142 I40E_HMC_FCOE_CTX = 3, 143 I40E_HMC_FCOE_FILT = 4, 144 I40E_HMC_LAN_MAX = 5 145 }; 146 147 enum i40e_hmc_model { 148 I40E_HMC_MODEL_DIRECT_PREFERRED = 0, 149 I40E_HMC_MODEL_DIRECT_ONLY = 1, 150 I40E_HMC_MODEL_PAGED_ONLY = 2, 151 I40E_HMC_MODEL_UNKNOWN, 152 }; 153 154 struct i40e_hmc_lan_create_obj_info { 155 struct i40e_hmc_info *hmc_info; 156 u32 rsrc_type; 157 u32 start_idx; 158 u32 count; 159 enum i40e_sd_entry_type entry_type; 160 u64 direct_mode_sz; 161 }; 162 163 struct i40e_hmc_lan_delete_obj_info { 164 struct i40e_hmc_info *hmc_info; 165 u32 rsrc_type; 166 u32 start_idx; 167 u32 count; 168 }; 169 170 enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, 171 u32 rxq_num, u32 fcoe_cntx_num, 172 u32 fcoe_filt_num); 173 enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw, 174 enum i40e_hmc_model model); 175 enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw); 176 177 u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num, 178 u32 fcoe_cntx_num, u32 fcoe_filt_num); 179 enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw, 180 u16 queue, 181 struct i40e_hmc_obj_txq *s); 182 enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, 183 u16 queue); 184 enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw, 185 u16 queue, 186 struct i40e_hmc_obj_txq *s); 187 enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw, 188 u16 queue, 189 struct i40e_hmc_obj_rxq *s); 190 enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, 191 u16 queue); 192 enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw, 193 u16 queue, 194 struct i40e_hmc_obj_rxq *s); 195 enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw, 196 struct i40e_hmc_lan_create_obj_info *info); 197 enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw, 198 struct i40e_hmc_lan_delete_obj_info *info); 199 200 #endif /* _I40E_LAN_HMC_H_ */ 201