1*61ae650dSJack F Vogel /****************************************************************************** 2*61ae650dSJack F Vogel 3*61ae650dSJack F Vogel Copyright (c) 2013-2014, Intel Corporation 4*61ae650dSJack F Vogel All rights reserved. 5*61ae650dSJack F Vogel 6*61ae650dSJack F Vogel Redistribution and use in source and binary forms, with or without 7*61ae650dSJack F Vogel modification, are permitted provided that the following conditions are met: 8*61ae650dSJack F Vogel 9*61ae650dSJack F Vogel 1. Redistributions of source code must retain the above copyright notice, 10*61ae650dSJack F Vogel this list of conditions and the following disclaimer. 11*61ae650dSJack F Vogel 12*61ae650dSJack F Vogel 2. Redistributions in binary form must reproduce the above copyright 13*61ae650dSJack F Vogel notice, this list of conditions and the following disclaimer in the 14*61ae650dSJack F Vogel documentation and/or other materials provided with the distribution. 15*61ae650dSJack F Vogel 16*61ae650dSJack F Vogel 3. Neither the name of the Intel Corporation nor the names of its 17*61ae650dSJack F Vogel contributors may be used to endorse or promote products derived from 18*61ae650dSJack F Vogel this software without specific prior written permission. 19*61ae650dSJack F Vogel 20*61ae650dSJack F Vogel THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21*61ae650dSJack F Vogel AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22*61ae650dSJack F Vogel IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23*61ae650dSJack F Vogel ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24*61ae650dSJack F Vogel LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25*61ae650dSJack F Vogel CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26*61ae650dSJack F Vogel SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27*61ae650dSJack F Vogel INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28*61ae650dSJack F Vogel CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29*61ae650dSJack F Vogel ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30*61ae650dSJack F Vogel POSSIBILITY OF SUCH DAMAGE. 31*61ae650dSJack F Vogel 32*61ae650dSJack F Vogel ******************************************************************************/ 33*61ae650dSJack F Vogel /*$FreeBSD$*/ 34*61ae650dSJack F Vogel 35*61ae650dSJack F Vogel #ifndef _I40E_LAN_HMC_H_ 36*61ae650dSJack F Vogel #define _I40E_LAN_HMC_H_ 37*61ae650dSJack F Vogel 38*61ae650dSJack F Vogel /* forward-declare the HW struct for the compiler */ 39*61ae650dSJack F Vogel struct i40e_hw; 40*61ae650dSJack F Vogel 41*61ae650dSJack F Vogel /* HMC element context information */ 42*61ae650dSJack F Vogel 43*61ae650dSJack F Vogel /* Rx queue context data 44*61ae650dSJack F Vogel * 45*61ae650dSJack F Vogel * The sizes of the variables may be larger than needed due to crossing byte 46*61ae650dSJack F Vogel * boundaries. If we do not have the width of the variable set to the correct 47*61ae650dSJack F Vogel * size then we could end up shifting bits off the top of the variable when the 48*61ae650dSJack F Vogel * variable is at the top of a byte and crosses over into the next byte. 49*61ae650dSJack F Vogel */ 50*61ae650dSJack F Vogel struct i40e_hmc_obj_rxq { 51*61ae650dSJack F Vogel u16 head; 52*61ae650dSJack F Vogel u16 cpuid; /* bigger than needed, see above for reason */ 53*61ae650dSJack F Vogel u64 base; 54*61ae650dSJack F Vogel u16 qlen; 55*61ae650dSJack F Vogel #define I40E_RXQ_CTX_DBUFF_SHIFT 7 56*61ae650dSJack F Vogel u16 dbuff; /* bigger than needed, see above for reason */ 57*61ae650dSJack F Vogel #define I40E_RXQ_CTX_HBUFF_SHIFT 6 58*61ae650dSJack F Vogel u16 hbuff; /* bigger than needed, see above for reason */ 59*61ae650dSJack F Vogel u8 dtype; 60*61ae650dSJack F Vogel u8 dsize; 61*61ae650dSJack F Vogel u8 crcstrip; 62*61ae650dSJack F Vogel u8 fc_ena; 63*61ae650dSJack F Vogel u8 l2tsel; 64*61ae650dSJack F Vogel u8 hsplit_0; 65*61ae650dSJack F Vogel u8 hsplit_1; 66*61ae650dSJack F Vogel u8 showiv; 67*61ae650dSJack F Vogel u32 rxmax; /* bigger than needed, see above for reason */ 68*61ae650dSJack F Vogel u8 tphrdesc_ena; 69*61ae650dSJack F Vogel u8 tphwdesc_ena; 70*61ae650dSJack F Vogel u8 tphdata_ena; 71*61ae650dSJack F Vogel u8 tphhead_ena; 72*61ae650dSJack F Vogel u16 lrxqthresh; /* bigger than needed, see above for reason */ 73*61ae650dSJack F Vogel u8 prefena; /* NOTE: normally must be set to 1 at init */ 74*61ae650dSJack F Vogel }; 75*61ae650dSJack F Vogel 76*61ae650dSJack F Vogel /* Tx queue context data 77*61ae650dSJack F Vogel * 78*61ae650dSJack F Vogel * The sizes of the variables may be larger than needed due to crossing byte 79*61ae650dSJack F Vogel * boundaries. If we do not have the width of the variable set to the correct 80*61ae650dSJack F Vogel * size then we could end up shifting bits off the top of the variable when the 81*61ae650dSJack F Vogel * variable is at the top of a byte and crosses over into the next byte. 82*61ae650dSJack F Vogel */ 83*61ae650dSJack F Vogel struct i40e_hmc_obj_txq { 84*61ae650dSJack F Vogel u16 head; 85*61ae650dSJack F Vogel u8 new_context; 86*61ae650dSJack F Vogel u64 base; 87*61ae650dSJack F Vogel u8 fc_ena; 88*61ae650dSJack F Vogel u8 timesync_ena; 89*61ae650dSJack F Vogel u8 fd_ena; 90*61ae650dSJack F Vogel u8 alt_vlan_ena; 91*61ae650dSJack F Vogel u16 thead_wb; 92*61ae650dSJack F Vogel u8 cpuid; 93*61ae650dSJack F Vogel u8 head_wb_ena; 94*61ae650dSJack F Vogel u16 qlen; 95*61ae650dSJack F Vogel u8 tphrdesc_ena; 96*61ae650dSJack F Vogel u8 tphrpacket_ena; 97*61ae650dSJack F Vogel u8 tphwdesc_ena; 98*61ae650dSJack F Vogel u64 head_wb_addr; 99*61ae650dSJack F Vogel u32 crc; 100*61ae650dSJack F Vogel u16 rdylist; 101*61ae650dSJack F Vogel u8 rdylist_act; 102*61ae650dSJack F Vogel }; 103*61ae650dSJack F Vogel 104*61ae650dSJack F Vogel /* for hsplit_0 field of Rx HMC context */ 105*61ae650dSJack F Vogel enum i40e_hmc_obj_rx_hsplit_0 { 106*61ae650dSJack F Vogel I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0, 107*61ae650dSJack F Vogel I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1, 108*61ae650dSJack F Vogel I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2, 109*61ae650dSJack F Vogel I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4, 110*61ae650dSJack F Vogel I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8, 111*61ae650dSJack F Vogel }; 112*61ae650dSJack F Vogel 113*61ae650dSJack F Vogel /* fcoe_cntx and fcoe_filt are for debugging purpose only */ 114*61ae650dSJack F Vogel struct i40e_hmc_obj_fcoe_cntx { 115*61ae650dSJack F Vogel u32 rsv[32]; 116*61ae650dSJack F Vogel }; 117*61ae650dSJack F Vogel 118*61ae650dSJack F Vogel struct i40e_hmc_obj_fcoe_filt { 119*61ae650dSJack F Vogel u32 rsv[8]; 120*61ae650dSJack F Vogel }; 121*61ae650dSJack F Vogel 122*61ae650dSJack F Vogel /* Context sizes for LAN objects */ 123*61ae650dSJack F Vogel enum i40e_hmc_lan_object_size { 124*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_8 = 0x3, 125*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_16 = 0x4, 126*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_32 = 0x5, 127*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_64 = 0x6, 128*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_128 = 0x7, 129*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_256 = 0x8, 130*61ae650dSJack F Vogel I40E_HMC_LAN_OBJ_SZ_512 = 0x9, 131*61ae650dSJack F Vogel }; 132*61ae650dSJack F Vogel 133*61ae650dSJack F Vogel #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512 134*61ae650dSJack F Vogel #define I40E_HMC_OBJ_SIZE_TXQ 128 135*61ae650dSJack F Vogel #define I40E_HMC_OBJ_SIZE_RXQ 32 136*61ae650dSJack F Vogel #define I40E_HMC_OBJ_SIZE_FCOE_CNTX 64 137*61ae650dSJack F Vogel #define I40E_HMC_OBJ_SIZE_FCOE_FILT 64 138*61ae650dSJack F Vogel 139*61ae650dSJack F Vogel enum i40e_hmc_lan_rsrc_type { 140*61ae650dSJack F Vogel I40E_HMC_LAN_FULL = 0, 141*61ae650dSJack F Vogel I40E_HMC_LAN_TX = 1, 142*61ae650dSJack F Vogel I40E_HMC_LAN_RX = 2, 143*61ae650dSJack F Vogel I40E_HMC_FCOE_CTX = 3, 144*61ae650dSJack F Vogel I40E_HMC_FCOE_FILT = 4, 145*61ae650dSJack F Vogel I40E_HMC_LAN_MAX = 5 146*61ae650dSJack F Vogel }; 147*61ae650dSJack F Vogel 148*61ae650dSJack F Vogel enum i40e_hmc_model { 149*61ae650dSJack F Vogel I40E_HMC_MODEL_DIRECT_PREFERRED = 0, 150*61ae650dSJack F Vogel I40E_HMC_MODEL_DIRECT_ONLY = 1, 151*61ae650dSJack F Vogel I40E_HMC_MODEL_PAGED_ONLY = 2, 152*61ae650dSJack F Vogel I40E_HMC_MODEL_UNKNOWN, 153*61ae650dSJack F Vogel }; 154*61ae650dSJack F Vogel 155*61ae650dSJack F Vogel struct i40e_hmc_lan_create_obj_info { 156*61ae650dSJack F Vogel struct i40e_hmc_info *hmc_info; 157*61ae650dSJack F Vogel u32 rsrc_type; 158*61ae650dSJack F Vogel u32 start_idx; 159*61ae650dSJack F Vogel u32 count; 160*61ae650dSJack F Vogel enum i40e_sd_entry_type entry_type; 161*61ae650dSJack F Vogel u64 direct_mode_sz; 162*61ae650dSJack F Vogel }; 163*61ae650dSJack F Vogel 164*61ae650dSJack F Vogel struct i40e_hmc_lan_delete_obj_info { 165*61ae650dSJack F Vogel struct i40e_hmc_info *hmc_info; 166*61ae650dSJack F Vogel u32 rsrc_type; 167*61ae650dSJack F Vogel u32 start_idx; 168*61ae650dSJack F Vogel u32 count; 169*61ae650dSJack F Vogel }; 170*61ae650dSJack F Vogel 171*61ae650dSJack F Vogel enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, 172*61ae650dSJack F Vogel u32 rxq_num, u32 fcoe_cntx_num, 173*61ae650dSJack F Vogel u32 fcoe_filt_num); 174*61ae650dSJack F Vogel enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw, 175*61ae650dSJack F Vogel enum i40e_hmc_model model); 176*61ae650dSJack F Vogel enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw); 177*61ae650dSJack F Vogel 178*61ae650dSJack F Vogel u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num, 179*61ae650dSJack F Vogel u32 fcoe_cntx_num, u32 fcoe_filt_num); 180*61ae650dSJack F Vogel enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw, 181*61ae650dSJack F Vogel u16 queue, 182*61ae650dSJack F Vogel struct i40e_hmc_obj_txq *s); 183*61ae650dSJack F Vogel enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, 184*61ae650dSJack F Vogel u16 queue); 185*61ae650dSJack F Vogel enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw, 186*61ae650dSJack F Vogel u16 queue, 187*61ae650dSJack F Vogel struct i40e_hmc_obj_txq *s); 188*61ae650dSJack F Vogel enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw, 189*61ae650dSJack F Vogel u16 queue, 190*61ae650dSJack F Vogel struct i40e_hmc_obj_rxq *s); 191*61ae650dSJack F Vogel enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, 192*61ae650dSJack F Vogel u16 queue); 193*61ae650dSJack F Vogel enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw, 194*61ae650dSJack F Vogel u16 queue, 195*61ae650dSJack F Vogel struct i40e_hmc_obj_rxq *s); 196*61ae650dSJack F Vogel enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw, 197*61ae650dSJack F Vogel struct i40e_hmc_lan_create_obj_info *info); 198*61ae650dSJack F Vogel enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw, 199*61ae650dSJack F Vogel struct i40e_hmc_lan_delete_obj_info *info); 200*61ae650dSJack F Vogel 201*61ae650dSJack F Vogel #endif /* _I40E_LAN_HMC_H_ */ 202