1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2020, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 35 36 #include "ixgbe.h" 37 38 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 39 #define IXGBE_VFREAD_REG IXGBE_READ_REG 40 41 /** 42 * ixgbe_init_ops_vf - Initialize the pointers for vf 43 * @hw: pointer to hardware structure 44 * 45 * This will assign function pointers, adapter-specific functions can 46 * override the assignment of generic function pointers by assigning 47 * their own adapter-specific function pointers. 48 * Does not touch the hardware. 49 **/ 50 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 51 { 52 u16 i; 53 54 /* MAC */ 55 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 56 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 57 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 58 /* Cannot clear stats on VF */ 59 hw->mac.ops.clear_hw_cntrs = NULL; 60 hw->mac.ops.get_media_type = NULL; 61 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 62 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 63 hw->mac.ops.get_bus_info = NULL; 64 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 65 66 /* Link */ 67 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 68 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 69 hw->mac.ops.get_link_capabilities = NULL; 70 71 /* RAR, Multicast, VLAN */ 72 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 73 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 74 hw->mac.ops.init_rx_addrs = NULL; 75 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 76 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 77 hw->mac.ops.get_link_state = ixgbe_get_link_state_vf; 78 hw->mac.ops.enable_mc = NULL; 79 hw->mac.ops.disable_mc = NULL; 80 hw->mac.ops.clear_vfta = NULL; 81 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 82 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 83 84 hw->mac.max_tx_queues = 1; 85 hw->mac.max_rx_queues = 1; 86 87 for (i = 0; i < 64; i++) 88 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf; 89 90 return IXGBE_SUCCESS; 91 } 92 93 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 94 * @hw: pointer to hardware structure 95 */ 96 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 97 { 98 int i; 99 u32 vfsrrctl; 100 u32 vfdca_rxctrl; 101 u32 vfdca_txctrl; 102 103 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 104 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 105 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 106 107 /* DCA_RXCTRL default value */ 108 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 109 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 110 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 111 112 /* DCA_TXCTRL default value */ 113 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 114 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 115 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 116 117 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 118 119 for (i = 0; i < 8; i++) { 120 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 121 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 122 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 123 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 124 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 125 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 131 } 132 133 IXGBE_WRITE_FLUSH(hw); 134 } 135 136 /** 137 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 138 * @hw: pointer to hardware structure 139 * 140 * Starts the hardware by filling the bus info structure and media type, clears 141 * all on chip counters, initializes receive address registers, multicast 142 * table, VLAN filter table, calls routine to set up link and flow control 143 * settings, and leaves transmit and receive units disabled and uninitialized 144 **/ 145 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 146 { 147 /* Clear adapter stopped flag */ 148 hw->adapter_stopped = false; 149 150 return IXGBE_SUCCESS; 151 } 152 153 /** 154 * ixgbe_init_hw_vf - virtual function hardware initialization 155 * @hw: pointer to hardware structure 156 * 157 * Initialize the hardware by resetting the hardware and then starting 158 * the hardware 159 **/ 160 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 161 { 162 s32 status = hw->mac.ops.start_hw(hw); 163 164 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 165 166 return status; 167 } 168 169 /** 170 * ixgbe_reset_hw_vf - Performs hardware reset 171 * @hw: pointer to hardware structure 172 * 173 * Resets the hardware by resetting the transmit and receive units, masks and 174 * clears all interrupts. 175 **/ 176 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 177 { 178 struct ixgbe_mbx_info *mbx = &hw->mbx; 179 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 180 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 181 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 182 u8 *addr = (u8 *)(&msgbuf[1]); 183 184 DEBUGFUNC("ixgbevf_reset_hw_vf"); 185 186 /* Call adapter stop to disable tx/rx and clear interrupts */ 187 hw->mac.ops.stop_adapter(hw); 188 189 /* reset the api version */ 190 hw->api_version = ixgbe_mbox_api_10; 191 ixgbe_init_mbx_params_vf(hw); 192 193 DEBUGOUT("Issuing a function level reset to MAC\n"); 194 195 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 196 IXGBE_WRITE_FLUSH(hw); 197 198 msec_delay(50); 199 200 /* we cannot reset while the RSTI / RSTD bits are asserted */ 201 while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) { 202 timeout--; 203 usec_delay(5); 204 } 205 206 if (!timeout) 207 return IXGBE_ERR_RESET_FAILED; 208 209 /* Reset VF registers to initial values */ 210 ixgbe_virt_clr_reg(hw); 211 212 /* 213 * Some devices do not clear VFMAILBOX.VFU on VFLR. Drop stale 214 * ownership and cached read-to-clear status. 215 */ 216 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, 0); 217 hw->mbx.vf_mailbox = 0; 218 219 /* mailbox timeout can now become active */ 220 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 221 222 msgbuf[0] = IXGBE_VF_RESET; 223 ixgbe_write_mbx(hw, msgbuf, 1, 0); 224 225 msec_delay(10); 226 227 /* 228 * set our "perm_addr" based on info provided by PF 229 * also set up the mc_filter_type which is piggy backed 230 * on the mac address in word 3 231 */ 232 ret_val = ixgbe_poll_mbx(hw, msgbuf, 233 IXGBE_VF_PERMADDR_MSG_LEN, 0); 234 if (ret_val) 235 return ret_val; 236 237 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) && 238 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE)) 239 return IXGBE_ERR_INVALID_MAC_ADDR; 240 241 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS)) 242 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 243 244 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 245 246 return ret_val; 247 } 248 249 /** 250 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 251 * @hw: pointer to hardware structure 252 * 253 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 254 * disables transmit and receive units. The adapter_stopped flag is used by 255 * the shared code and drivers to determine if the adapter is in a stopped 256 * state and should not touch the hardware. 257 **/ 258 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 259 { 260 u32 reg_val; 261 u16 i; 262 263 /* 264 * Set the adapter_stopped flag so other driver functions stop touching 265 * the hardware 266 */ 267 hw->adapter_stopped = true; 268 269 /* Clear interrupt mask to stop from interrupts being generated */ 270 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 271 272 /* Clear any pending interrupts, flush previous writes */ 273 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 274 275 /* Disable the transmit unit. Each queue must be disabled. */ 276 for (i = 0; i < hw->mac.max_tx_queues; i++) 277 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 278 279 /* Disable the receive unit by stopping each queue */ 280 for (i = 0; i < hw->mac.max_rx_queues; i++) { 281 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 282 reg_val &= ~IXGBE_RXDCTL_ENABLE; 283 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 284 } 285 /* Clear packet split and pool config */ 286 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 287 288 /* flush all queues disables */ 289 IXGBE_WRITE_FLUSH(hw); 290 msec_delay(2); 291 292 return IXGBE_SUCCESS; 293 } 294 295 /** 296 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 297 * @hw: pointer to hardware structure 298 * @mc_addr: the multicast address 299 * 300 * Extracts the 12 bits, from a multicast address, to determine which 301 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 302 * incoming rx multicast addresses, to determine the bit-vector to check in 303 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 304 * by the MO field of the MCSTCTRL. The MO field is set during initialization 305 * to mc_filter_type. 306 **/ 307 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 308 { 309 u32 vector = 0; 310 311 switch (hw->mac.mc_filter_type) { 312 case 0: /* use bits [47:36] of the address */ 313 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 314 break; 315 case 1: /* use bits [46:35] of the address */ 316 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 317 break; 318 case 2: /* use bits [45:34] of the address */ 319 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 320 break; 321 case 3: /* use bits [43:32] of the address */ 322 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 323 break; 324 default: /* Invalid mc_filter_type */ 325 DEBUGOUT("MC filter type param set incorrectly\n"); 326 ASSERT(0); 327 break; 328 } 329 330 /* vector can only be 12-bits or boundary will be exceeded */ 331 vector &= 0xFFF; 332 return vector; 333 } 334 335 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 336 u32 *retmsg, u16 size) 337 { 338 s32 retval = ixgbe_write_mbx(hw, msg, size, 0); 339 340 if (retval) 341 return retval; 342 343 return ixgbe_poll_mbx(hw, retmsg, size, 0); 344 } 345 346 /** 347 * ixgbe_set_rar_vf - set device MAC address 348 * @hw: pointer to hardware structure 349 * @index: Receive address register to write 350 * @addr: Address to put into receive address register 351 * @vmdq: VMDq "set" or "pool" index 352 * @enable_addr: set flag that address is active 353 **/ 354 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 355 u32 enable_addr) 356 { 357 u32 msgbuf[3]; 358 u8 *msg_addr = (u8 *)(&msgbuf[1]); 359 s32 ret_val; 360 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 361 362 memset(msgbuf, 0, 12); 363 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 364 memcpy(msg_addr, addr, 6); 365 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 366 367 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 368 369 /* if we had failure, the address was rejected, use "perm_addr" */ 370 if (!ret_val && 371 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) { 372 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 373 return IXGBE_ERR_MBX; 374 } 375 376 return ret_val; 377 } 378 379 /** 380 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 381 * @hw: pointer to the HW structure 382 * @mc_addr_list: array of multicast addresses to program 383 * @mc_addr_count: number of multicast addresses to program 384 * @next: caller supplied function to return next address in list 385 * @clear: unused 386 * 387 * Updates the Multicast Table Array. 388 **/ 389 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 390 u32 mc_addr_count, ixgbe_mc_addr_itr next, 391 bool clear) 392 { 393 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 394 u16 *vector_list = (u16 *)&msgbuf[1]; 395 u32 vector; 396 u32 cnt, i; 397 u32 vmdq; 398 399 UNREFERENCED_1PARAMETER(clear); 400 401 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 402 403 /* Each entry in the list uses 1 16 bit word. We have 30 404 * 16 bit words available in our HW msg buffer (minus 1 for the 405 * msg type). That's 30 hash values if we pack 'em right. If 406 * there are more than 30 MC addresses to add then punt the 407 * extras for now and then add code to handle more than 30 later. 408 * It would be unusual for a server to request that many multi-cast 409 * addresses except for in large enterprise network environments. 410 */ 411 412 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 413 414 cnt = min(mc_addr_count, IXGBE_MAX_VF_MC); 415 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 416 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 417 418 for (i = 0; i < cnt; i++) { 419 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 420 DEBUGOUT1("Hash value = 0x%03X\n", vector); 421 vector_list[i] = (u16)vector; 422 } 423 424 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE); 425 } 426 427 /** 428 * ixgbevf_update_xcast_mode - Update Multicast mode 429 * @hw: pointer to the HW structure 430 * @xcast_mode: new multicast mode 431 * 432 * Updates the Multicast Mode of VF. 433 **/ 434 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 435 { 436 u32 msgbuf[2]; 437 s32 err; 438 439 switch (hw->api_version) { 440 case ixgbe_mbox_api_12: 441 /* New modes were introduced in 1.3 version */ 442 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 443 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 444 /* Fall through */ 445 case ixgbe_mbox_api_13: 446 case ixgbe_mbox_api_15: 447 break; 448 default: 449 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 450 } 451 452 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 453 msgbuf[1] = xcast_mode; 454 455 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 456 if (err) 457 return err; 458 459 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 460 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE)) 461 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 462 return IXGBE_SUCCESS; 463 } 464 465 /** 466 * ixgbe_get_link_state_vf - Get VF link state from PF 467 * @hw: pointer to the HW structure 468 * @link_state: link state storage 469 * 470 * Returns state of the operation error or success. 471 **/ 472 s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state) 473 { 474 u32 msgbuf[2]; 475 s32 err; 476 s32 ret_val; 477 478 msgbuf[0] = IXGBE_VF_GET_LINK_STATE; 479 msgbuf[1] = 0x0; 480 481 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 482 483 if (err || (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) { 484 ret_val = IXGBE_ERR_MBX; 485 } else { 486 ret_val = IXGBE_SUCCESS; 487 *link_state = msgbuf[1]; 488 } 489 490 return ret_val; 491 } 492 493 /** 494 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 495 * @hw: pointer to the HW structure 496 * @vlan: 12 bit VLAN ID 497 * @vind: unused by VF drivers 498 * @vlan_on: if true then set bit, else clear bit 499 * @vlvf_bypass: boolean flag indicating updating default pool is okay 500 * 501 * Turn on/off specified VLAN in the VLAN filter table. 502 **/ 503 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 504 bool vlan_on, bool vlvf_bypass) 505 { 506 u32 msgbuf[2]; 507 s32 ret_val; 508 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 509 510 msgbuf[0] = IXGBE_VF_SET_VLAN; 511 msgbuf[1] = vlan; 512 /* Setting the 8 bit field MSG INFO to true indicates "add" */ 513 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 514 515 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 516 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS)) 517 return IXGBE_SUCCESS; 518 519 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE); 520 } 521 522 /** 523 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 524 * @hw: pointer to hardware structure 525 * 526 * Returns the number of transmit queues for the given adapter. 527 **/ 528 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 529 { 530 UNREFERENCED_1PARAMETER(hw); 531 return IXGBE_VF_MAX_TX_QUEUES; 532 } 533 534 /** 535 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 536 * @hw: pointer to hardware structure 537 * 538 * Returns the number of receive queues for the given adapter. 539 **/ 540 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 541 { 542 UNREFERENCED_1PARAMETER(hw); 543 return IXGBE_VF_MAX_RX_QUEUES; 544 } 545 546 /** 547 * ixgbe_get_mac_addr_vf - Read device MAC address 548 * @hw: pointer to the HW structure 549 * @mac_addr: the MAC address 550 **/ 551 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 552 { 553 int i; 554 555 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 556 mac_addr[i] = hw->mac.perm_addr[i]; 557 558 return IXGBE_SUCCESS; 559 } 560 561 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 562 { 563 u32 msgbuf[3], msgbuf_chk; 564 u8 *msg_addr = (u8 *)(&msgbuf[1]); 565 s32 ret_val; 566 567 memset(msgbuf, 0, sizeof(msgbuf)); 568 /* 569 * If index is one then this is the start of a new list and needs 570 * indication to the PF so it can do it's own list management. 571 * If it is zero then that tells the PF to just clear all of 572 * this VF's macvlans and there is no new list. 573 */ 574 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 575 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 576 msgbuf_chk = msgbuf[0]; 577 if (addr) 578 memcpy(msg_addr, addr, 6); 579 580 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 581 if (!ret_val) { 582 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 583 584 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE)) 585 return IXGBE_ERR_OUT_OF_MEM; 586 } 587 588 return ret_val; 589 } 590 591 /** 592 * ixgbe_setup_mac_link_vf - Setup MAC link settings 593 * @hw: pointer to hardware structure 594 * @speed: new link speed 595 * @autoneg_wait_to_complete: true when waiting for completion is needed 596 * 597 * Set the link speed in the AUTOC register and restarts link. 598 **/ 599 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 600 bool autoneg_wait_to_complete) 601 { 602 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 603 return IXGBE_SUCCESS; 604 } 605 606 /** 607 * ixgbe_check_mac_link_vf - Get link/speed status 608 * @hw: pointer to hardware structure 609 * @speed: pointer to link speed 610 * @link_up: true is link is up, false otherwise 611 * @autoneg_wait_to_complete: true when waiting for completion is needed 612 * 613 * Reads the links register to determine if link is up and the current speed 614 **/ 615 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 616 bool *link_up, bool autoneg_wait_to_complete) 617 { 618 struct ixgbe_mbx_info *mbx = &hw->mbx; 619 struct ixgbe_mac_info *mac = &hw->mac; 620 s32 ret_val = IXGBE_SUCCESS; 621 u32 in_msg = 0; 622 u32 links_reg; 623 624 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 625 626 /* If we were hit with a reset drop the link */ 627 if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout) 628 mac->get_link_status = true; 629 630 if (!mac->get_link_status) 631 goto out; 632 633 /* if link status is down no point in checking to see if pf is up */ 634 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 635 if (!(links_reg & IXGBE_LINKS_UP)) 636 goto out; 637 638 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 639 * before the link status is correct 640 */ 641 if (mac->type == ixgbe_mac_82599_vf) { 642 int i; 643 644 for (i = 0; i < 5; i++) { 645 usec_delay(100); 646 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 647 648 if (!(links_reg & IXGBE_LINKS_UP)) 649 goto out; 650 } 651 } 652 653 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 654 case IXGBE_LINKS_SPEED_10G_82599: 655 *speed = IXGBE_LINK_SPEED_10GB_FULL; 656 if (hw->mac.type >= ixgbe_mac_X550_vf) { 657 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 658 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 659 } 660 break; 661 case IXGBE_LINKS_SPEED_1G_82599: 662 *speed = IXGBE_LINK_SPEED_1GB_FULL; 663 break; 664 case IXGBE_LINKS_SPEED_100_82599: 665 *speed = IXGBE_LINK_SPEED_100_FULL; 666 if (hw->mac.type == ixgbe_mac_X550_vf || 667 hw->mac.type == ixgbe_mac_E610_vf) { 668 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 669 *speed = IXGBE_LINK_SPEED_5GB_FULL; 670 } 671 break; 672 case IXGBE_LINKS_SPEED_10_X550EM_A: 673 *speed = IXGBE_LINK_SPEED_UNKNOWN; 674 /* Since Reserved in older MAC's */ 675 if (hw->mac.type >= ixgbe_mac_X550_vf) 676 *speed = IXGBE_LINK_SPEED_10_FULL; 677 break; 678 default: 679 *speed = IXGBE_LINK_SPEED_UNKNOWN; 680 } 681 682 /* if the read failed it could just be a mailbox collision, best wait 683 * until we are called again and don't report an error 684 */ 685 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) { 686 if (hw->api_version >= ixgbe_mbox_api_15) 687 mac->get_link_status = false; 688 goto out; 689 } 690 691 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 692 /* msg is not CTS and is FAILURE we must have lost CTS status */ 693 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE) 694 ret_val = IXGBE_ERR_MBX; 695 goto out; 696 } 697 698 /* the pf is talking, if we timed out in the past we reinit */ 699 if (!mbx->timeout) { 700 ret_val = IXGBE_ERR_TIMEOUT; 701 goto out; 702 } 703 704 /* if we passed all the tests above then the link is up and we no 705 * longer need to check for link 706 */ 707 mac->get_link_status = false; 708 709 out: 710 *link_up = !mac->get_link_status; 711 return ret_val; 712 } 713 714 /** 715 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 716 * @hw: pointer to the HW structure 717 * @max_size: value to assign to max frame size 718 **/ 719 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 720 { 721 u32 msgbuf[2]; 722 s32 retval; 723 724 msgbuf[0] = IXGBE_VF_SET_LPE; 725 msgbuf[1] = max_size; 726 727 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 728 if (retval) 729 return retval; 730 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 731 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) 732 return IXGBE_ERR_MBX; 733 734 return 0; 735 } 736 737 /** 738 * ixgbevf_negotiate_api_version - Negotiate supported API version 739 * @hw: pointer to the HW structure 740 * @api: integer containing requested API version 741 **/ 742 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 743 { 744 int err; 745 u32 msg[3]; 746 747 /* Negotiate the mailbox API version */ 748 msg[0] = IXGBE_VF_API_NEGOTIATE; 749 msg[1] = api; 750 msg[2] = 0; 751 752 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 753 if (!err) { 754 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 755 756 /* Store value and return 0 on success */ 757 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) { 758 hw->api_version = api; 759 return 0; 760 } 761 762 err = IXGBE_ERR_INVALID_ARGUMENT; 763 } 764 765 return err; 766 } 767 768 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 769 unsigned int *default_tc) 770 { 771 int err; 772 u32 msg[5]; 773 774 /* do nothing if API doesn't support ixgbevf_get_queues */ 775 switch (hw->api_version) { 776 case ixgbe_mbox_api_11: 777 case ixgbe_mbox_api_12: 778 case ixgbe_mbox_api_13: 779 case ixgbe_mbox_api_15: 780 break; 781 default: 782 return 0; 783 } 784 785 /* Fetch queue configuration from the PF */ 786 msg[0] = IXGBE_VF_GET_QUEUES; 787 msg[1] = msg[2] = msg[3] = msg[4] = 0; 788 789 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 790 if (!err) { 791 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 792 793 /* 794 * if we we didn't get a SUCCESS there must have been 795 * some sort of mailbox error so we should treat it 796 * as such 797 */ 798 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS)) 799 return IXGBE_ERR_MBX; 800 801 /* record and validate values from message */ 802 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 803 if (hw->mac.max_tx_queues == 0 || 804 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 805 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 806 807 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 808 if (hw->mac.max_rx_queues == 0 || 809 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 810 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 811 812 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 813 /* in case of unknown state assume we cannot tag frames */ 814 if (*num_tcs > hw->mac.max_rx_queues) 815 *num_tcs = 1; 816 817 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 818 /* default to queue 0 on out-of-bounds queue number */ 819 if (*default_tc >= hw->mac.max_tx_queues) 820 *default_tc = 0; 821 } 822 823 return err; 824 } 825