1 /******************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
3
4 Copyright (c) 2001-2020, Intel Corporation
5 All rights reserved.
6
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
9
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12
13 2. Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
15 documentation and/or other materials provided with the distribution.
16
17 3. Neither the name of the Intel Corporation nor the names of its
18 contributors may be used to endorse or promote products derived from
19 this software without specific prior written permission.
20
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32
33 ******************************************************************************/
34
35
36 #include "ixgbe.h"
37
38 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
39 #define IXGBE_VFREAD_REG IXGBE_READ_REG
40
41 /**
42 * ixgbe_init_ops_vf - Initialize the pointers for vf
43 * @hw: pointer to hardware structure
44 *
45 * This will assign function pointers, adapter-specific functions can
46 * override the assignment of generic function pointers by assigning
47 * their own adapter-specific function pointers.
48 * Does not touch the hardware.
49 **/
ixgbe_init_ops_vf(struct ixgbe_hw * hw)50 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
51 {
52 u16 i;
53
54 /* MAC */
55 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
56 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
57 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
58 /* Cannot clear stats on VF */
59 hw->mac.ops.clear_hw_cntrs = NULL;
60 hw->mac.ops.get_media_type = NULL;
61 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
62 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
63 hw->mac.ops.get_bus_info = NULL;
64 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
65
66 /* Link */
67 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
68 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
69 hw->mac.ops.get_link_capabilities = NULL;
70
71 /* RAR, Multicast, VLAN */
72 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
73 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
74 hw->mac.ops.init_rx_addrs = NULL;
75 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
76 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
77 hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;
78 hw->mac.ops.enable_mc = NULL;
79 hw->mac.ops.disable_mc = NULL;
80 hw->mac.ops.clear_vfta = NULL;
81 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
82 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
83
84 hw->mac.max_tx_queues = 1;
85 hw->mac.max_rx_queues = 1;
86
87 for (i = 0; i < 64; i++)
88 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf;
89
90 return IXGBE_SUCCESS;
91 }
92
93 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
94 * @hw: pointer to hardware structure
95 */
ixgbe_virt_clr_reg(struct ixgbe_hw * hw)96 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
97 {
98 int i;
99 u32 vfsrrctl;
100 u32 vfdca_rxctrl;
101 u32 vfdca_txctrl;
102
103 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
104 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
105 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
106
107 /* DCA_RXCTRL default value */
108 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
109 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
110 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
111
112 /* DCA_TXCTRL default value */
113 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
114 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
115 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
116
117 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
118
119 for (i = 0; i < 8; i++) {
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
123 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
131 }
132
133 IXGBE_WRITE_FLUSH(hw);
134 }
135
136 /**
137 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
138 * @hw: pointer to hardware structure
139 *
140 * Starts the hardware by filling the bus info structure and media type, clears
141 * all on chip counters, initializes receive address registers, multicast
142 * table, VLAN filter table, calls routine to set up link and flow control
143 * settings, and leaves transmit and receive units disabled and uninitialized
144 **/
ixgbe_start_hw_vf(struct ixgbe_hw * hw)145 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
146 {
147 /* Clear adapter stopped flag */
148 hw->adapter_stopped = false;
149
150 return IXGBE_SUCCESS;
151 }
152
153 /**
154 * ixgbe_init_hw_vf - virtual function hardware initialization
155 * @hw: pointer to hardware structure
156 *
157 * Initialize the hardware by resetting the hardware and then starting
158 * the hardware
159 **/
ixgbe_init_hw_vf(struct ixgbe_hw * hw)160 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
161 {
162 s32 status = hw->mac.ops.start_hw(hw);
163
164 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
165
166 return status;
167 }
168
169 /**
170 * ixgbe_reset_hw_vf - Performs hardware reset
171 * @hw: pointer to hardware structure
172 *
173 * Resets the hardware by resetting the transmit and receive units, masks and
174 * clears all interrupts.
175 **/
ixgbe_reset_hw_vf(struct ixgbe_hw * hw)176 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
177 {
178 struct ixgbe_mbx_info *mbx = &hw->mbx;
179 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
180 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
181 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
182 u8 *addr = (u8 *)(&msgbuf[1]);
183
184 DEBUGFUNC("ixgbevf_reset_hw_vf");
185
186 /* Call adapter stop to disable tx/rx and clear interrupts */
187 hw->mac.ops.stop_adapter(hw);
188
189 /* reset the api version */
190 hw->api_version = ixgbe_mbox_api_10;
191 ixgbe_init_mbx_params_vf(hw);
192
193 DEBUGOUT("Issuing a function level reset to MAC\n");
194
195 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
196 IXGBE_WRITE_FLUSH(hw);
197
198 msec_delay(50);
199
200 /* we cannot reset while the RSTI / RSTD bits are asserted */
201 while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) {
202 timeout--;
203 usec_delay(5);
204 }
205
206 if (!timeout)
207 return IXGBE_ERR_RESET_FAILED;
208
209 /* Reset VF registers to initial values */
210 ixgbe_virt_clr_reg(hw);
211
212 /* mailbox timeout can now become active */
213 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
214
215 msgbuf[0] = IXGBE_VF_RESET;
216 ixgbe_write_mbx(hw, msgbuf, 1, 0);
217
218 msec_delay(10);
219
220 /*
221 * set our "perm_addr" based on info provided by PF
222 * also set up the mc_filter_type which is piggy backed
223 * on the mac address in word 3
224 */
225 ret_val = ixgbe_poll_mbx(hw, msgbuf,
226 IXGBE_VF_PERMADDR_MSG_LEN, 0);
227 if (ret_val)
228 return ret_val;
229
230 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) &&
231 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE))
232 return IXGBE_ERR_INVALID_MAC_ADDR;
233
234 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS))
235 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
236
237 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
238
239 return ret_val;
240 }
241
242 /**
243 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
244 * @hw: pointer to hardware structure
245 *
246 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
247 * disables transmit and receive units. The adapter_stopped flag is used by
248 * the shared code and drivers to determine if the adapter is in a stopped
249 * state and should not touch the hardware.
250 **/
ixgbe_stop_adapter_vf(struct ixgbe_hw * hw)251 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
252 {
253 u32 reg_val;
254 u16 i;
255
256 /*
257 * Set the adapter_stopped flag so other driver functions stop touching
258 * the hardware
259 */
260 hw->adapter_stopped = true;
261
262 /* Clear interrupt mask to stop from interrupts being generated */
263 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
264
265 /* Clear any pending interrupts, flush previous writes */
266 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
267
268 /* Disable the transmit unit. Each queue must be disabled. */
269 for (i = 0; i < hw->mac.max_tx_queues; i++)
270 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
271
272 /* Disable the receive unit by stopping each queue */
273 for (i = 0; i < hw->mac.max_rx_queues; i++) {
274 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
275 reg_val &= ~IXGBE_RXDCTL_ENABLE;
276 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
277 }
278 /* Clear packet split and pool config */
279 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
280
281 /* flush all queues disables */
282 IXGBE_WRITE_FLUSH(hw);
283 msec_delay(2);
284
285 return IXGBE_SUCCESS;
286 }
287
288 /**
289 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
290 * @hw: pointer to hardware structure
291 * @mc_addr: the multicast address
292 *
293 * Extracts the 12 bits, from a multicast address, to determine which
294 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
295 * incoming rx multicast addresses, to determine the bit-vector to check in
296 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
297 * by the MO field of the MCSTCTRL. The MO field is set during initialization
298 * to mc_filter_type.
299 **/
ixgbe_mta_vector(struct ixgbe_hw * hw,u8 * mc_addr)300 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
301 {
302 u32 vector = 0;
303
304 switch (hw->mac.mc_filter_type) {
305 case 0: /* use bits [47:36] of the address */
306 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
307 break;
308 case 1: /* use bits [46:35] of the address */
309 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
310 break;
311 case 2: /* use bits [45:34] of the address */
312 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
313 break;
314 case 3: /* use bits [43:32] of the address */
315 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
316 break;
317 default: /* Invalid mc_filter_type */
318 DEBUGOUT("MC filter type param set incorrectly\n");
319 ASSERT(0);
320 break;
321 }
322
323 /* vector can only be 12-bits or boundary will be exceeded */
324 vector &= 0xFFF;
325 return vector;
326 }
327
ixgbevf_write_msg_read_ack(struct ixgbe_hw * hw,u32 * msg,u32 * retmsg,u16 size)328 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
329 u32 *retmsg, u16 size)
330 {
331 s32 retval = ixgbe_write_mbx(hw, msg, size, 0);
332
333 if (retval)
334 return retval;
335
336 return ixgbe_poll_mbx(hw, retmsg, size, 0);
337 }
338
339 /**
340 * ixgbe_set_rar_vf - set device MAC address
341 * @hw: pointer to hardware structure
342 * @index: Receive address register to write
343 * @addr: Address to put into receive address register
344 * @vmdq: VMDq "set" or "pool" index
345 * @enable_addr: set flag that address is active
346 **/
ixgbe_set_rar_vf(struct ixgbe_hw * hw,u32 index,u8 * addr,u32 vmdq,u32 enable_addr)347 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
348 u32 enable_addr)
349 {
350 u32 msgbuf[3];
351 u8 *msg_addr = (u8 *)(&msgbuf[1]);
352 s32 ret_val;
353 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
354
355 memset(msgbuf, 0, 12);
356 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
357 memcpy(msg_addr, addr, 6);
358 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
359
360 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
361
362 /* if we had failure, the address was rejected, use "perm_addr" */
363 if (!ret_val &&
364 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) {
365 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
366 return IXGBE_ERR_MBX;
367 }
368
369 return ret_val;
370 }
371
372 /**
373 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
374 * @hw: pointer to the HW structure
375 * @mc_addr_list: array of multicast addresses to program
376 * @mc_addr_count: number of multicast addresses to program
377 * @next: caller supplied function to return next address in list
378 * @clear: unused
379 *
380 * Updates the Multicast Table Array.
381 **/
ixgbe_update_mc_addr_list_vf(struct ixgbe_hw * hw,u8 * mc_addr_list,u32 mc_addr_count,ixgbe_mc_addr_itr next,bool clear)382 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
383 u32 mc_addr_count, ixgbe_mc_addr_itr next,
384 bool clear)
385 {
386 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
387 u16 *vector_list = (u16 *)&msgbuf[1];
388 u32 vector;
389 u32 cnt, i;
390 u32 vmdq;
391
392 UNREFERENCED_1PARAMETER(clear);
393
394 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
395
396 /* Each entry in the list uses 1 16 bit word. We have 30
397 * 16 bit words available in our HW msg buffer (minus 1 for the
398 * msg type). That's 30 hash values if we pack 'em right. If
399 * there are more than 30 MC addresses to add then punt the
400 * extras for now and then add code to handle more than 30 later.
401 * It would be unusual for a server to request that many multi-cast
402 * addresses except for in large enterprise network environments.
403 */
404
405 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
406
407 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
408 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
409 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
410
411 for (i = 0; i < cnt; i++) {
412 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
413 DEBUGOUT1("Hash value = 0x%03X\n", vector);
414 vector_list[i] = (u16)vector;
415 }
416
417 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE);
418 }
419
420 /**
421 * ixgbevf_update_xcast_mode - Update Multicast mode
422 * @hw: pointer to the HW structure
423 * @xcast_mode: new multicast mode
424 *
425 * Updates the Multicast Mode of VF.
426 **/
ixgbevf_update_xcast_mode(struct ixgbe_hw * hw,int xcast_mode)427 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
428 {
429 u32 msgbuf[2];
430 s32 err;
431
432 switch (hw->api_version) {
433 case ixgbe_mbox_api_12:
434 /* New modes were introduced in 1.3 version */
435 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
436 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
437 /* Fall through */
438 case ixgbe_mbox_api_13:
439 case ixgbe_mbox_api_15:
440 break;
441 default:
442 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
443 }
444
445 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
446 msgbuf[1] = xcast_mode;
447
448 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
449 if (err)
450 return err;
451
452 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
453 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE))
454 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
455 return IXGBE_SUCCESS;
456 }
457
458 /**
459 * ixgbe_get_link_state_vf - Get VF link state from PF
460 * @hw: pointer to the HW structure
461 * @link_state: link state storage
462 *
463 * Returns state of the operation error or success.
464 **/
ixgbe_get_link_state_vf(struct ixgbe_hw * hw,bool * link_state)465 s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)
466 {
467 u32 msgbuf[2];
468 s32 err;
469 s32 ret_val;
470
471 msgbuf[0] = IXGBE_VF_GET_LINK_STATE;
472 msgbuf[1] = 0x0;
473
474 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
475
476 if (err || (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) {
477 ret_val = IXGBE_ERR_MBX;
478 } else {
479 ret_val = IXGBE_SUCCESS;
480 *link_state = msgbuf[1];
481 }
482
483 return ret_val;
484 }
485
486 /**
487 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
488 * @hw: pointer to the HW structure
489 * @vlan: 12 bit VLAN ID
490 * @vind: unused by VF drivers
491 * @vlan_on: if true then set bit, else clear bit
492 * @vlvf_bypass: boolean flag indicating updating default pool is okay
493 *
494 * Turn on/off specified VLAN in the VLAN filter table.
495 **/
ixgbe_set_vfta_vf(struct ixgbe_hw * hw,u32 vlan,u32 vind,bool vlan_on,bool vlvf_bypass)496 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
497 bool vlan_on, bool vlvf_bypass)
498 {
499 u32 msgbuf[2];
500 s32 ret_val;
501 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
502
503 msgbuf[0] = IXGBE_VF_SET_VLAN;
504 msgbuf[1] = vlan;
505 /* Setting the 8 bit field MSG INFO to true indicates "add" */
506 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
507
508 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
509 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS))
510 return IXGBE_SUCCESS;
511
512 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE);
513 }
514
515 /**
516 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
517 * @hw: pointer to hardware structure
518 *
519 * Returns the number of transmit queues for the given adapter.
520 **/
ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw * hw)521 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
522 {
523 UNREFERENCED_1PARAMETER(hw);
524 return IXGBE_VF_MAX_TX_QUEUES;
525 }
526
527 /**
528 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
529 * @hw: pointer to hardware structure
530 *
531 * Returns the number of receive queues for the given adapter.
532 **/
ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw * hw)533 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
534 {
535 UNREFERENCED_1PARAMETER(hw);
536 return IXGBE_VF_MAX_RX_QUEUES;
537 }
538
539 /**
540 * ixgbe_get_mac_addr_vf - Read device MAC address
541 * @hw: pointer to the HW structure
542 * @mac_addr: the MAC address
543 **/
ixgbe_get_mac_addr_vf(struct ixgbe_hw * hw,u8 * mac_addr)544 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
545 {
546 int i;
547
548 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
549 mac_addr[i] = hw->mac.perm_addr[i];
550
551 return IXGBE_SUCCESS;
552 }
553
ixgbevf_set_uc_addr_vf(struct ixgbe_hw * hw,u32 index,u8 * addr)554 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
555 {
556 u32 msgbuf[3], msgbuf_chk;
557 u8 *msg_addr = (u8 *)(&msgbuf[1]);
558 s32 ret_val;
559
560 memset(msgbuf, 0, sizeof(msgbuf));
561 /*
562 * If index is one then this is the start of a new list and needs
563 * indication to the PF so it can do it's own list management.
564 * If it is zero then that tells the PF to just clear all of
565 * this VF's macvlans and there is no new list.
566 */
567 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
568 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
569 msgbuf_chk = msgbuf[0];
570 if (addr)
571 memcpy(msg_addr, addr, 6);
572
573 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
574 if (!ret_val) {
575 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
576
577 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE))
578 return IXGBE_ERR_OUT_OF_MEM;
579 }
580
581 return ret_val;
582 }
583
584 /**
585 * ixgbe_setup_mac_link_vf - Setup MAC link settings
586 * @hw: pointer to hardware structure
587 * @speed: new link speed
588 * @autoneg_wait_to_complete: true when waiting for completion is needed
589 *
590 * Set the link speed in the AUTOC register and restarts link.
591 **/
ixgbe_setup_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed speed,bool autoneg_wait_to_complete)592 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
593 bool autoneg_wait_to_complete)
594 {
595 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
596 return IXGBE_SUCCESS;
597 }
598
599 /**
600 * ixgbe_check_mac_link_vf - Get link/speed status
601 * @hw: pointer to hardware structure
602 * @speed: pointer to link speed
603 * @link_up: true is link is up, false otherwise
604 * @autoneg_wait_to_complete: true when waiting for completion is needed
605 *
606 * Reads the links register to determine if link is up and the current speed
607 **/
ixgbe_check_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed * speed,bool * link_up,bool autoneg_wait_to_complete)608 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
609 bool *link_up, bool autoneg_wait_to_complete)
610 {
611 struct ixgbe_mbx_info *mbx = &hw->mbx;
612 struct ixgbe_mac_info *mac = &hw->mac;
613 s32 ret_val = IXGBE_SUCCESS;
614 u32 in_msg = 0;
615 u32 links_reg;
616
617 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
618
619 /* If we were hit with a reset drop the link */
620 if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout)
621 mac->get_link_status = true;
622
623 if (!mac->get_link_status)
624 goto out;
625
626 /* if link status is down no point in checking to see if pf is up */
627 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
628 if (!(links_reg & IXGBE_LINKS_UP))
629 goto out;
630
631 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
632 * before the link status is correct
633 */
634 if (mac->type == ixgbe_mac_82599_vf) {
635 int i;
636
637 for (i = 0; i < 5; i++) {
638 usec_delay(100);
639 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
640
641 if (!(links_reg & IXGBE_LINKS_UP))
642 goto out;
643 }
644 }
645
646 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
647 case IXGBE_LINKS_SPEED_10G_82599:
648 *speed = IXGBE_LINK_SPEED_10GB_FULL;
649 if (hw->mac.type >= ixgbe_mac_X550_vf) {
650 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
651 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
652 }
653 break;
654 case IXGBE_LINKS_SPEED_1G_82599:
655 *speed = IXGBE_LINK_SPEED_1GB_FULL;
656 break;
657 case IXGBE_LINKS_SPEED_100_82599:
658 *speed = IXGBE_LINK_SPEED_100_FULL;
659 if (hw->mac.type == ixgbe_mac_X550_vf) {
660 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
661 *speed = IXGBE_LINK_SPEED_5GB_FULL;
662 }
663 break;
664 case IXGBE_LINKS_SPEED_10_X550EM_A:
665 *speed = IXGBE_LINK_SPEED_UNKNOWN;
666 /* Since Reserved in older MAC's */
667 if (hw->mac.type >= ixgbe_mac_X550_vf)
668 *speed = IXGBE_LINK_SPEED_10_FULL;
669 break;
670 default:
671 *speed = IXGBE_LINK_SPEED_UNKNOWN;
672 }
673
674 /* if the read failed it could just be a mailbox collision, best wait
675 * until we are called again and don't report an error
676 */
677 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) {
678 if (hw->api_version >= ixgbe_mbox_api_15)
679 mac->get_link_status = false;
680 goto out;
681 }
682
683 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
684 /* msg is not CTS and is FAILURE we must have lost CTS status */
685 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE)
686 ret_val = IXGBE_ERR_MBX;
687 goto out;
688 }
689
690 /* the pf is talking, if we timed out in the past we reinit */
691 if (!mbx->timeout) {
692 ret_val = IXGBE_ERR_TIMEOUT;
693 goto out;
694 }
695
696 /* if we passed all the tests above then the link is up and we no
697 * longer need to check for link
698 */
699 mac->get_link_status = false;
700
701 out:
702 *link_up = !mac->get_link_status;
703 return ret_val;
704 }
705
706 /**
707 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
708 * @hw: pointer to the HW structure
709 * @max_size: value to assign to max frame size
710 **/
ixgbevf_rlpml_set_vf(struct ixgbe_hw * hw,u16 max_size)711 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
712 {
713 u32 msgbuf[2];
714 s32 retval;
715
716 msgbuf[0] = IXGBE_VF_SET_LPE;
717 msgbuf[1] = max_size;
718
719 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
720 if (retval)
721 return retval;
722 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
723 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE))
724 return IXGBE_ERR_MBX;
725
726 return 0;
727 }
728
729 /**
730 * ixgbevf_negotiate_api_version - Negotiate supported API version
731 * @hw: pointer to the HW structure
732 * @api: integer containing requested API version
733 **/
ixgbevf_negotiate_api_version(struct ixgbe_hw * hw,int api)734 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
735 {
736 int err;
737 u32 msg[3];
738
739 /* Negotiate the mailbox API version */
740 msg[0] = IXGBE_VF_API_NEGOTIATE;
741 msg[1] = api;
742 msg[2] = 0;
743
744 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
745 if (!err) {
746 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
747
748 /* Store value and return 0 on success */
749 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) {
750 hw->api_version = api;
751 return 0;
752 }
753
754 err = IXGBE_ERR_INVALID_ARGUMENT;
755 }
756
757 return err;
758 }
759
ixgbevf_get_queues(struct ixgbe_hw * hw,unsigned int * num_tcs,unsigned int * default_tc)760 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
761 unsigned int *default_tc)
762 {
763 int err;
764 u32 msg[5];
765
766 /* do nothing if API doesn't support ixgbevf_get_queues */
767 switch (hw->api_version) {
768 case ixgbe_mbox_api_11:
769 case ixgbe_mbox_api_12:
770 case ixgbe_mbox_api_13:
771 case ixgbe_mbox_api_15:
772 break;
773 default:
774 return 0;
775 }
776
777 /* Fetch queue configuration from the PF */
778 msg[0] = IXGBE_VF_GET_QUEUES;
779 msg[1] = msg[2] = msg[3] = msg[4] = 0;
780
781 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
782 if (!err) {
783 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
784
785 /*
786 * if we we didn't get a SUCCESS there must have been
787 * some sort of mailbox error so we should treat it
788 * as such
789 */
790 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS))
791 return IXGBE_ERR_MBX;
792
793 /* record and validate values from message */
794 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
795 if (hw->mac.max_tx_queues == 0 ||
796 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
797 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
798
799 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
800 if (hw->mac.max_rx_queues == 0 ||
801 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
802 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
803
804 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
805 /* in case of unknown state assume we cannot tag frames */
806 if (*num_tcs > hw->mac.max_rx_queues)
807 *num_tcs = 1;
808
809 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
810 /* default to queue 0 on out-of-bounds queue number */
811 if (*default_tc >= hw->mac.max_tx_queues)
812 *default_tc = 0;
813 }
814
815 return err;
816 }
817