1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2020, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 /*$FreeBSD$*/ 35 36 37 #include "ixgbe.h" 38 39 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 40 #define IXGBE_VFREAD_REG IXGBE_READ_REG 41 42 /** 43 * ixgbe_init_ops_vf - Initialize the pointers for vf 44 * @hw: pointer to hardware structure 45 * 46 * This will assign function pointers, adapter-specific functions can 47 * override the assignment of generic function pointers by assigning 48 * their own adapter-specific function pointers. 49 * Does not touch the hardware. 50 **/ 51 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 52 { 53 /* MAC */ 54 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 55 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 56 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 57 /* Cannot clear stats on VF */ 58 hw->mac.ops.clear_hw_cntrs = NULL; 59 hw->mac.ops.get_media_type = NULL; 60 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 61 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 62 hw->mac.ops.get_bus_info = NULL; 63 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 64 65 /* Link */ 66 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 67 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 68 hw->mac.ops.get_link_capabilities = NULL; 69 70 /* RAR, Multicast, VLAN */ 71 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 72 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 73 hw->mac.ops.init_rx_addrs = NULL; 74 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 75 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 76 hw->mac.ops.enable_mc = NULL; 77 hw->mac.ops.disable_mc = NULL; 78 hw->mac.ops.clear_vfta = NULL; 79 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 80 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 81 82 hw->mac.max_tx_queues = 1; 83 hw->mac.max_rx_queues = 1; 84 85 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 86 87 return IXGBE_SUCCESS; 88 } 89 90 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 91 * @hw: pointer to hardware structure 92 */ 93 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 94 { 95 int i; 96 u32 vfsrrctl; 97 u32 vfdca_rxctrl; 98 u32 vfdca_txctrl; 99 100 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 101 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 102 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 103 104 /* DCA_RXCTRL default value */ 105 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 106 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 107 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 108 109 /* DCA_TXCTRL default value */ 110 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 111 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 112 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 113 114 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 115 116 for (i = 0; i < 8; i++) { 117 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 118 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 119 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 120 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 121 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 122 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 123 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 124 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 125 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 127 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 128 } 129 130 IXGBE_WRITE_FLUSH(hw); 131 } 132 133 /** 134 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 135 * @hw: pointer to hardware structure 136 * 137 * Starts the hardware by filling the bus info structure and media type, clears 138 * all on chip counters, initializes receive address registers, multicast 139 * table, VLAN filter table, calls routine to set up link and flow control 140 * settings, and leaves transmit and receive units disabled and uninitialized 141 **/ 142 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 143 { 144 /* Clear adapter stopped flag */ 145 hw->adapter_stopped = false; 146 147 return IXGBE_SUCCESS; 148 } 149 150 /** 151 * ixgbe_init_hw_vf - virtual function hardware initialization 152 * @hw: pointer to hardware structure 153 * 154 * Initialize the hardware by resetting the hardware and then starting 155 * the hardware 156 **/ 157 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 158 { 159 s32 status = hw->mac.ops.start_hw(hw); 160 161 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 162 163 return status; 164 } 165 166 /** 167 * ixgbe_reset_hw_vf - Performs hardware reset 168 * @hw: pointer to hardware structure 169 * 170 * Resets the hardware by resetting the transmit and receive units, masks and 171 * clears all interrupts. 172 **/ 173 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 174 { 175 struct ixgbe_mbx_info *mbx = &hw->mbx; 176 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 177 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 178 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 179 u8 *addr = (u8 *)(&msgbuf[1]); 180 181 DEBUGFUNC("ixgbevf_reset_hw_vf"); 182 183 /* Call adapter stop to disable tx/rx and clear interrupts */ 184 hw->mac.ops.stop_adapter(hw); 185 186 /* reset the api version */ 187 hw->api_version = ixgbe_mbox_api_10; 188 189 DEBUGOUT("Issuing a function level reset to MAC\n"); 190 191 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 192 IXGBE_WRITE_FLUSH(hw); 193 194 msec_delay(50); 195 196 /* we cannot reset while the RSTI / RSTD bits are asserted */ 197 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 198 timeout--; 199 usec_delay(5); 200 } 201 202 if (!timeout) 203 return IXGBE_ERR_RESET_FAILED; 204 205 /* Reset VF registers to initial values */ 206 ixgbe_virt_clr_reg(hw); 207 208 /* mailbox timeout can now become active */ 209 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 210 211 msgbuf[0] = IXGBE_VF_RESET; 212 mbx->ops.write_posted(hw, msgbuf, 1, 0); 213 214 msec_delay(10); 215 216 /* 217 * set our "perm_addr" based on info provided by PF 218 * also set up the mc_filter_type which is piggy backed 219 * on the mac address in word 3 220 */ 221 ret_val = mbx->ops.read_posted(hw, msgbuf, 222 IXGBE_VF_PERMADDR_MSG_LEN, 0); 223 if (ret_val) 224 return ret_val; 225 226 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 227 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 228 return IXGBE_ERR_INVALID_MAC_ADDR; 229 230 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) 231 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 232 233 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 234 235 return ret_val; 236 } 237 238 /** 239 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 240 * @hw: pointer to hardware structure 241 * 242 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 243 * disables transmit and receive units. The adapter_stopped flag is used by 244 * the shared code and drivers to determine if the adapter is in a stopped 245 * state and should not touch the hardware. 246 **/ 247 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 248 { 249 u32 reg_val; 250 u16 i; 251 252 /* 253 * Set the adapter_stopped flag so other driver functions stop touching 254 * the hardware 255 */ 256 hw->adapter_stopped = true; 257 258 /* Clear interrupt mask to stop from interrupts being generated */ 259 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 260 261 /* Clear any pending interrupts, flush previous writes */ 262 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 263 264 /* Disable the transmit unit. Each queue must be disabled. */ 265 for (i = 0; i < hw->mac.max_tx_queues; i++) 266 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 267 268 /* Disable the receive unit by stopping each queue */ 269 for (i = 0; i < hw->mac.max_rx_queues; i++) { 270 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 271 reg_val &= ~IXGBE_RXDCTL_ENABLE; 272 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 273 } 274 /* Clear packet split and pool config */ 275 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 276 277 /* flush all queues disables */ 278 IXGBE_WRITE_FLUSH(hw); 279 msec_delay(2); 280 281 return IXGBE_SUCCESS; 282 } 283 284 /** 285 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 286 * @hw: pointer to hardware structure 287 * @mc_addr: the multicast address 288 * 289 * Extracts the 12 bits, from a multicast address, to determine which 290 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 291 * incoming rx multicast addresses, to determine the bit-vector to check in 292 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 293 * by the MO field of the MCSTCTRL. The MO field is set during initialization 294 * to mc_filter_type. 295 **/ 296 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 297 { 298 u32 vector = 0; 299 300 switch (hw->mac.mc_filter_type) { 301 case 0: /* use bits [47:36] of the address */ 302 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 303 break; 304 case 1: /* use bits [46:35] of the address */ 305 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 306 break; 307 case 2: /* use bits [45:34] of the address */ 308 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 309 break; 310 case 3: /* use bits [43:32] of the address */ 311 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 312 break; 313 default: /* Invalid mc_filter_type */ 314 DEBUGOUT("MC filter type param set incorrectly\n"); 315 ASSERT(0); 316 break; 317 } 318 319 /* vector can only be 12-bits or boundary will be exceeded */ 320 vector &= 0xFFF; 321 return vector; 322 } 323 324 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 325 u32 *retmsg, u16 size) 326 { 327 struct ixgbe_mbx_info *mbx = &hw->mbx; 328 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 329 330 if (retval) 331 return retval; 332 333 return mbx->ops.read_posted(hw, retmsg, size, 0); 334 } 335 336 /** 337 * ixgbe_set_rar_vf - set device MAC address 338 * @hw: pointer to hardware structure 339 * @index: Receive address register to write 340 * @addr: Address to put into receive address register 341 * @vmdq: VMDq "set" or "pool" index 342 * @enable_addr: set flag that address is active 343 **/ 344 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 345 u32 enable_addr) 346 { 347 u32 msgbuf[3]; 348 u8 *msg_addr = (u8 *)(&msgbuf[1]); 349 s32 ret_val; 350 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 351 352 memset(msgbuf, 0, 12); 353 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 354 memcpy(msg_addr, addr, 6); 355 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 356 357 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 358 359 /* if nacked the address was rejected, use "perm_addr" */ 360 if (!ret_val && 361 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { 362 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 363 return IXGBE_ERR_MBX; 364 } 365 366 return ret_val; 367 } 368 369 /** 370 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 371 * @hw: pointer to the HW structure 372 * @mc_addr_list: array of multicast addresses to program 373 * @mc_addr_count: number of multicast addresses to program 374 * @next: caller supplied function to return next address in list 375 * @clear: unused 376 * 377 * Updates the Multicast Table Array. 378 **/ 379 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 380 u32 mc_addr_count, ixgbe_mc_addr_itr next, 381 bool clear) 382 { 383 struct ixgbe_mbx_info *mbx = &hw->mbx; 384 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 385 u16 *vector_list = (u16 *)&msgbuf[1]; 386 u32 vector; 387 u32 cnt, i; 388 u32 vmdq; 389 390 UNREFERENCED_1PARAMETER(clear); 391 392 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 393 394 /* Each entry in the list uses 1 16 bit word. We have 30 395 * 16 bit words available in our HW msg buffer (minus 1 for the 396 * msg type). That's 30 hash values if we pack 'em right. If 397 * there are more than 30 MC addresses to add then punt the 398 * extras for now and then add code to handle more than 30 later. 399 * It would be unusual for a server to request that many multi-cast 400 * addresses except for in large enterprise network environments. 401 */ 402 403 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 404 405 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 406 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 407 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 408 409 for (i = 0; i < cnt; i++) { 410 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 411 DEBUGOUT1("Hash value = 0x%03X\n", vector); 412 vector_list[i] = (u16)vector; 413 } 414 415 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 416 } 417 418 /** 419 * ixgbevf_update_xcast_mode - Update Multicast mode 420 * @hw: pointer to the HW structure 421 * @xcast_mode: new multicast mode 422 * 423 * Updates the Multicast Mode of VF. 424 **/ 425 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 426 { 427 u32 msgbuf[2]; 428 s32 err; 429 430 switch (hw->api_version) { 431 case ixgbe_mbox_api_12: 432 /* New modes were introduced in 1.3 version */ 433 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 434 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 435 /* Fall through */ 436 case ixgbe_mbox_api_13: 437 break; 438 default: 439 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 440 } 441 442 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 443 msgbuf[1] = xcast_mode; 444 445 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 446 if (err) 447 return err; 448 449 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 450 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) 451 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 452 return IXGBE_SUCCESS; 453 } 454 455 /** 456 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 457 * @hw: pointer to the HW structure 458 * @vlan: 12 bit VLAN ID 459 * @vind: unused by VF drivers 460 * @vlan_on: if true then set bit, else clear bit 461 * @vlvf_bypass: boolean flag indicating updating default pool is okay 462 * 463 * Turn on/off specified VLAN in the VLAN filter table. 464 **/ 465 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 466 bool vlan_on, bool vlvf_bypass) 467 { 468 u32 msgbuf[2]; 469 s32 ret_val; 470 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 471 472 msgbuf[0] = IXGBE_VF_SET_VLAN; 473 msgbuf[1] = vlan; 474 /* Setting the 8 bit field MSG INFO to true indicates "add" */ 475 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 476 477 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 478 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 479 return IXGBE_SUCCESS; 480 481 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 482 } 483 484 /** 485 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 486 * @hw: pointer to hardware structure 487 * 488 * Returns the number of transmit queues for the given adapter. 489 **/ 490 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 491 { 492 UNREFERENCED_1PARAMETER(hw); 493 return IXGBE_VF_MAX_TX_QUEUES; 494 } 495 496 /** 497 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 498 * @hw: pointer to hardware structure 499 * 500 * Returns the number of receive queues for the given adapter. 501 **/ 502 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 503 { 504 UNREFERENCED_1PARAMETER(hw); 505 return IXGBE_VF_MAX_RX_QUEUES; 506 } 507 508 /** 509 * ixgbe_get_mac_addr_vf - Read device MAC address 510 * @hw: pointer to the HW structure 511 * @mac_addr: the MAC address 512 **/ 513 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 514 { 515 int i; 516 517 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 518 mac_addr[i] = hw->mac.perm_addr[i]; 519 520 return IXGBE_SUCCESS; 521 } 522 523 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 524 { 525 u32 msgbuf[3], msgbuf_chk; 526 u8 *msg_addr = (u8 *)(&msgbuf[1]); 527 s32 ret_val; 528 529 memset(msgbuf, 0, sizeof(msgbuf)); 530 /* 531 * If index is one then this is the start of a new list and needs 532 * indication to the PF so it can do it's own list management. 533 * If it is zero then that tells the PF to just clear all of 534 * this VF's macvlans and there is no new list. 535 */ 536 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 537 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 538 msgbuf_chk = msgbuf[0]; 539 if (addr) 540 memcpy(msg_addr, addr, 6); 541 542 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 543 if (!ret_val) { 544 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 545 546 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) 547 return IXGBE_ERR_OUT_OF_MEM; 548 } 549 550 return ret_val; 551 } 552 553 /** 554 * ixgbe_setup_mac_link_vf - Setup MAC link settings 555 * @hw: pointer to hardware structure 556 * @speed: new link speed 557 * @autoneg_wait_to_complete: true when waiting for completion is needed 558 * 559 * Set the link speed in the AUTOC register and restarts link. 560 **/ 561 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 562 bool autoneg_wait_to_complete) 563 { 564 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 565 return IXGBE_SUCCESS; 566 } 567 568 /** 569 * ixgbe_check_mac_link_vf - Get link/speed status 570 * @hw: pointer to hardware structure 571 * @speed: pointer to link speed 572 * @link_up: true is link is up, false otherwise 573 * @autoneg_wait_to_complete: true when waiting for completion is needed 574 * 575 * Reads the links register to determine if link is up and the current speed 576 **/ 577 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 578 bool *link_up, bool autoneg_wait_to_complete) 579 { 580 struct ixgbe_mbx_info *mbx = &hw->mbx; 581 struct ixgbe_mac_info *mac = &hw->mac; 582 s32 ret_val = IXGBE_SUCCESS; 583 u32 links_reg; 584 u32 in_msg = 0; 585 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 586 587 /* If we were hit with a reset drop the link */ 588 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 589 mac->get_link_status = true; 590 591 if (!mac->get_link_status) 592 goto out; 593 594 /* if link status is down no point in checking to see if pf is up */ 595 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 596 if (!(links_reg & IXGBE_LINKS_UP)) 597 goto out; 598 599 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 600 * before the link status is correct 601 */ 602 if (mac->type == ixgbe_mac_82599_vf) { 603 int i; 604 605 for (i = 0; i < 5; i++) { 606 usec_delay(100); 607 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 608 609 if (!(links_reg & IXGBE_LINKS_UP)) 610 goto out; 611 } 612 } 613 614 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 615 case IXGBE_LINKS_SPEED_10G_82599: 616 *speed = IXGBE_LINK_SPEED_10GB_FULL; 617 if (hw->mac.type >= ixgbe_mac_X550) { 618 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 619 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 620 } 621 break; 622 case IXGBE_LINKS_SPEED_1G_82599: 623 *speed = IXGBE_LINK_SPEED_1GB_FULL; 624 break; 625 case IXGBE_LINKS_SPEED_100_82599: 626 *speed = IXGBE_LINK_SPEED_100_FULL; 627 if (hw->mac.type == ixgbe_mac_X550) { 628 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 629 *speed = IXGBE_LINK_SPEED_5GB_FULL; 630 } 631 break; 632 case IXGBE_LINKS_SPEED_10_X550EM_A: 633 *speed = IXGBE_LINK_SPEED_UNKNOWN; 634 /* Since Reserved in older MAC's */ 635 if (hw->mac.type >= ixgbe_mac_X550) 636 *speed = IXGBE_LINK_SPEED_10_FULL; 637 break; 638 default: 639 *speed = IXGBE_LINK_SPEED_UNKNOWN; 640 } 641 642 /* if the read failed it could just be a mailbox collision, best wait 643 * until we are called again and don't report an error 644 */ 645 if (mbx->ops.read(hw, &in_msg, 1, 0)) 646 goto out; 647 648 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 649 /* msg is not CTS and is NACK we must have lost CTS status */ 650 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 651 ret_val = -1; 652 goto out; 653 } 654 655 /* the pf is talking, if we timed out in the past we reinit */ 656 if (!mbx->timeout) { 657 ret_val = -1; 658 goto out; 659 } 660 661 /* if we passed all the tests above then the link is up and we no 662 * longer need to check for link 663 */ 664 mac->get_link_status = false; 665 666 out: 667 *link_up = !mac->get_link_status; 668 return ret_val; 669 } 670 671 /** 672 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 673 * @hw: pointer to the HW structure 674 * @max_size: value to assign to max frame size 675 **/ 676 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 677 { 678 u32 msgbuf[2]; 679 s32 retval; 680 681 msgbuf[0] = IXGBE_VF_SET_LPE; 682 msgbuf[1] = max_size; 683 684 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 685 if (retval) 686 return retval; 687 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 688 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) 689 return IXGBE_ERR_MBX; 690 691 return 0; 692 } 693 694 /** 695 * ixgbevf_negotiate_api_version - Negotiate supported API version 696 * @hw: pointer to the HW structure 697 * @api: integer containing requested API version 698 **/ 699 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 700 { 701 int err; 702 u32 msg[3]; 703 704 /* Negotiate the mailbox API version */ 705 msg[0] = IXGBE_VF_API_NEGOTIATE; 706 msg[1] = api; 707 msg[2] = 0; 708 709 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 710 if (!err) { 711 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 712 713 /* Store value and return 0 on success */ 714 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 715 hw->api_version = api; 716 return 0; 717 } 718 719 err = IXGBE_ERR_INVALID_ARGUMENT; 720 } 721 722 return err; 723 } 724 725 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 726 unsigned int *default_tc) 727 { 728 int err; 729 u32 msg[5]; 730 731 /* do nothing if API doesn't support ixgbevf_get_queues */ 732 switch (hw->api_version) { 733 case ixgbe_mbox_api_11: 734 case ixgbe_mbox_api_12: 735 case ixgbe_mbox_api_13: 736 break; 737 default: 738 return 0; 739 } 740 741 /* Fetch queue configuration from the PF */ 742 msg[0] = IXGBE_VF_GET_QUEUES; 743 msg[1] = msg[2] = msg[3] = msg[4] = 0; 744 745 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 746 if (!err) { 747 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 748 749 /* 750 * if we we didn't get an ACK there must have been 751 * some sort of mailbox error so we should treat it 752 * as such 753 */ 754 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 755 return IXGBE_ERR_MBX; 756 757 /* record and validate values from message */ 758 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 759 if (hw->mac.max_tx_queues == 0 || 760 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 761 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 762 763 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 764 if (hw->mac.max_rx_queues == 0 || 765 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 766 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 767 768 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 769 /* in case of unknown state assume we cannot tag frames */ 770 if (*num_tcs > hw->mac.max_rx_queues) 771 *num_tcs = 1; 772 773 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 774 /* default to queue 0 on out-of-bounds queue number */ 775 if (*default_tc >= hw->mac.max_tx_queues) 776 *default_tc = 0; 777 } 778 779 return err; 780 } 781