1 /****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #include "ixgbe_api.h" 37 #include "ixgbe_type.h" 38 #include "ixgbe_vf.h" 39 40 #ifndef IXGBE_VFWRITE_REG 41 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 42 #endif 43 #ifndef IXGBE_VFREAD_REG 44 #define IXGBE_VFREAD_REG IXGBE_READ_REG 45 #endif 46 47 /** 48 * ixgbe_init_ops_vf - Initialize the pointers for vf 49 * @hw: pointer to hardware structure 50 * 51 * This will assign function pointers, adapter-specific functions can 52 * override the assignment of generic function pointers by assigning 53 * their own adapter-specific function pointers. 54 * Does not touch the hardware. 55 **/ 56 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 57 { 58 /* MAC */ 59 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 60 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 61 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 62 /* Cannot clear stats on VF */ 63 hw->mac.ops.clear_hw_cntrs = NULL; 64 hw->mac.ops.get_media_type = NULL; 65 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 66 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 67 hw->mac.ops.get_bus_info = NULL; 68 69 /* Link */ 70 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 71 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 72 hw->mac.ops.get_link_capabilities = NULL; 73 74 /* RAR, Multicast, VLAN */ 75 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 76 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 77 hw->mac.ops.init_rx_addrs = NULL; 78 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 79 hw->mac.ops.enable_mc = NULL; 80 hw->mac.ops.disable_mc = NULL; 81 hw->mac.ops.clear_vfta = NULL; 82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 83 84 hw->mac.max_tx_queues = 1; 85 hw->mac.max_rx_queues = 1; 86 87 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 88 89 return IXGBE_SUCCESS; 90 } 91 92 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 93 * @hw: pointer to hardware structure 94 */ 95 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 96 { 97 int i; 98 u32 vfsrrctl; 99 u32 vfdca_rxctrl; 100 u32 vfdca_txctrl; 101 102 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 103 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 104 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 105 106 /* DCA_RXCTRL default value */ 107 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 108 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 109 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 110 111 /* DCA_TXCTRL default value */ 112 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 113 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 114 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 115 116 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 117 118 for (i = 0; i < 7; i++) { 119 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 120 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 121 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 122 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 123 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 124 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 125 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 130 } 131 132 IXGBE_WRITE_FLUSH(hw); 133 } 134 135 /** 136 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 137 * @hw: pointer to hardware structure 138 * 139 * Starts the hardware by filling the bus info structure and media type, clears 140 * all on chip counters, initializes receive address registers, multicast 141 * table, VLAN filter table, calls routine to set up link and flow control 142 * settings, and leaves transmit and receive units disabled and uninitialized 143 **/ 144 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 145 { 146 /* Clear adapter stopped flag */ 147 hw->adapter_stopped = FALSE; 148 149 return IXGBE_SUCCESS; 150 } 151 152 /** 153 * ixgbe_init_hw_vf - virtual function hardware initialization 154 * @hw: pointer to hardware structure 155 * 156 * Initialize the hardware by resetting the hardware and then starting 157 * the hardware 158 **/ 159 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 160 { 161 s32 status = hw->mac.ops.start_hw(hw); 162 163 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 164 165 return status; 166 } 167 168 /** 169 * ixgbe_reset_hw_vf - Performs hardware reset 170 * @hw: pointer to hardware structure 171 * 172 * Resets the hardware by reseting the transmit and receive units, masks and 173 * clears all interrupts. 174 **/ 175 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 176 { 177 struct ixgbe_mbx_info *mbx = &hw->mbx; 178 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 179 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 180 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 181 u8 *addr = (u8 *)(&msgbuf[1]); 182 183 DEBUGFUNC("ixgbevf_reset_hw_vf"); 184 185 /* Call adapter stop to disable tx/rx and clear interrupts */ 186 hw->mac.ops.stop_adapter(hw); 187 188 /* reset the api version */ 189 hw->api_version = ixgbe_mbox_api_10; 190 191 DEBUGOUT("Issuing a function level reset to MAC\n"); 192 193 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 194 IXGBE_WRITE_FLUSH(hw); 195 196 msec_delay(50); 197 198 /* we cannot reset while the RSTI / RSTD bits are asserted */ 199 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 200 timeout--; 201 usec_delay(5); 202 } 203 204 if (!timeout) 205 return IXGBE_ERR_RESET_FAILED; 206 207 /* Reset VF registers to initial values */ 208 ixgbe_virt_clr_reg(hw); 209 210 /* mailbox timeout can now become active */ 211 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 212 213 msgbuf[0] = IXGBE_VF_RESET; 214 mbx->ops.write_posted(hw, msgbuf, 1, 0); 215 216 msec_delay(10); 217 218 /* 219 * set our "perm_addr" based on info provided by PF 220 * also set up the mc_filter_type which is piggy backed 221 * on the mac address in word 3 222 */ 223 ret_val = mbx->ops.read_posted(hw, msgbuf, 224 IXGBE_VF_PERMADDR_MSG_LEN, 0); 225 if (ret_val) 226 return ret_val; 227 228 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 229 230 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 231 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 232 return IXGBE_ERR_INVALID_MAC_ADDR; 233 234 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 235 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 236 237 return ret_val; 238 } 239 240 /** 241 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 242 * @hw: pointer to hardware structure 243 * 244 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 245 * disables transmit and receive units. The adapter_stopped flag is used by 246 * the shared code and drivers to determine if the adapter is in a stopped 247 * state and should not touch the hardware. 248 **/ 249 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 250 { 251 u32 reg_val; 252 u16 i; 253 254 /* 255 * Set the adapter_stopped flag so other driver functions stop touching 256 * the hardware 257 */ 258 hw->adapter_stopped = TRUE; 259 260 /* Clear interrupt mask to stop from interrupts being generated */ 261 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 262 263 /* Clear any pending interrupts, flush previous writes */ 264 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 265 266 /* Disable the transmit unit. Each queue must be disabled. */ 267 for (i = 0; i < hw->mac.max_tx_queues; i++) 268 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 269 270 /* Disable the receive unit by stopping each queue */ 271 for (i = 0; i < hw->mac.max_rx_queues; i++) { 272 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 273 reg_val &= ~IXGBE_RXDCTL_ENABLE; 274 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 275 } 276 /* Clear packet split and pool config */ 277 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 278 279 /* flush all queues disables */ 280 IXGBE_WRITE_FLUSH(hw); 281 msec_delay(2); 282 283 return IXGBE_SUCCESS; 284 } 285 286 /** 287 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 288 * @hw: pointer to hardware structure 289 * @mc_addr: the multicast address 290 * 291 * Extracts the 12 bits, from a multicast address, to determine which 292 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 293 * incoming rx multicast addresses, to determine the bit-vector to check in 294 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 295 * by the MO field of the MCSTCTRL. The MO field is set during initialization 296 * to mc_filter_type. 297 **/ 298 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 299 { 300 u32 vector = 0; 301 302 switch (hw->mac.mc_filter_type) { 303 case 0: /* use bits [47:36] of the address */ 304 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 305 break; 306 case 1: /* use bits [46:35] of the address */ 307 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 308 break; 309 case 2: /* use bits [45:34] of the address */ 310 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 311 break; 312 case 3: /* use bits [43:32] of the address */ 313 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 314 break; 315 default: /* Invalid mc_filter_type */ 316 DEBUGOUT("MC filter type param set incorrectly\n"); 317 ASSERT(0); 318 break; 319 } 320 321 /* vector can only be 12-bits or boundary will be exceeded */ 322 vector &= 0xFFF; 323 return vector; 324 } 325 326 static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, 327 u32 *msg, u16 size) 328 { 329 struct ixgbe_mbx_info *mbx = &hw->mbx; 330 u32 retmsg[IXGBE_VFMAILBOX_SIZE]; 331 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 332 333 if (!retval) 334 mbx->ops.read_posted(hw, retmsg, size, 0); 335 } 336 337 /** 338 * ixgbe_set_rar_vf - set device MAC address 339 * @hw: pointer to hardware structure 340 * @index: Receive address register to write 341 * @addr: Address to put into receive address register 342 * @vmdq: VMDq "set" or "pool" index 343 * @enable_addr: set flag that address is active 344 **/ 345 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 346 u32 enable_addr) 347 { 348 struct ixgbe_mbx_info *mbx = &hw->mbx; 349 u32 msgbuf[3]; 350 u8 *msg_addr = (u8 *)(&msgbuf[1]); 351 s32 ret_val; 352 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 353 354 memset(msgbuf, 0, 12); 355 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 356 memcpy(msg_addr, addr, 6); 357 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 358 359 if (!ret_val) 360 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 361 362 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 363 364 /* if nacked the address was rejected, use "perm_addr" */ 365 if (!ret_val && 366 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) 367 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 368 369 return ret_val; 370 } 371 372 /** 373 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 374 * @hw: pointer to the HW structure 375 * @mc_addr_list: array of multicast addresses to program 376 * @mc_addr_count: number of multicast addresses to program 377 * @next: caller supplied function to return next address in list 378 * 379 * Updates the Multicast Table Array. 380 **/ 381 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 382 u32 mc_addr_count, ixgbe_mc_addr_itr next, 383 bool clear) 384 { 385 struct ixgbe_mbx_info *mbx = &hw->mbx; 386 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 387 u16 *vector_list = (u16 *)&msgbuf[1]; 388 u32 vector; 389 u32 cnt, i; 390 u32 vmdq; 391 392 UNREFERENCED_1PARAMETER(clear); 393 394 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 395 396 /* Each entry in the list uses 1 16 bit word. We have 30 397 * 16 bit words available in our HW msg buffer (minus 1 for the 398 * msg type). That's 30 hash values if we pack 'em right. If 399 * there are more than 30 MC addresses to add then punt the 400 * extras for now and then add code to handle more than 30 later. 401 * It would be unusual for a server to request that many multi-cast 402 * addresses except for in large enterprise network environments. 403 */ 404 405 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 406 407 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 408 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 409 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 410 411 for (i = 0; i < cnt; i++) { 412 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 413 DEBUGOUT1("Hash value = 0x%03X\n", vector); 414 vector_list[i] = (u16)vector; 415 } 416 417 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 418 } 419 420 /** 421 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 422 * @hw: pointer to the HW structure 423 * @vlan: 12 bit VLAN ID 424 * @vind: unused by VF drivers 425 * @vlan_on: if TRUE then set bit, else clear bit 426 **/ 427 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 428 { 429 struct ixgbe_mbx_info *mbx = &hw->mbx; 430 u32 msgbuf[2]; 431 s32 ret_val; 432 UNREFERENCED_1PARAMETER(vind); 433 434 msgbuf[0] = IXGBE_VF_SET_VLAN; 435 msgbuf[1] = vlan; 436 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 437 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 438 439 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0); 440 if (!ret_val) 441 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0); 442 443 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 444 return IXGBE_SUCCESS; 445 446 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 447 } 448 449 /** 450 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 451 * @hw: pointer to hardware structure 452 * 453 * Returns the number of transmit queues for the given adapter. 454 **/ 455 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 456 { 457 UNREFERENCED_1PARAMETER(hw); 458 return IXGBE_VF_MAX_TX_QUEUES; 459 } 460 461 /** 462 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 463 * @hw: pointer to hardware structure 464 * 465 * Returns the number of receive queues for the given adapter. 466 **/ 467 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 468 { 469 UNREFERENCED_1PARAMETER(hw); 470 return IXGBE_VF_MAX_RX_QUEUES; 471 } 472 473 /** 474 * ixgbe_get_mac_addr_vf - Read device MAC address 475 * @hw: pointer to the HW structure 476 **/ 477 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 478 { 479 int i; 480 481 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 482 mac_addr[i] = hw->mac.perm_addr[i]; 483 484 return IXGBE_SUCCESS; 485 } 486 487 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 488 { 489 struct ixgbe_mbx_info *mbx = &hw->mbx; 490 u32 msgbuf[3]; 491 u8 *msg_addr = (u8 *)(&msgbuf[1]); 492 s32 ret_val; 493 494 memset(msgbuf, 0, sizeof(msgbuf)); 495 /* 496 * If index is one then this is the start of a new list and needs 497 * indication to the PF so it can do it's own list management. 498 * If it is zero then that tells the PF to just clear all of 499 * this VF's macvlans and there is no new list. 500 */ 501 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 502 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 503 if (addr) 504 memcpy(msg_addr, addr, 6); 505 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 506 507 if (!ret_val) 508 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 509 510 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 511 512 if (!ret_val) 513 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK)) 514 ret_val = IXGBE_ERR_OUT_OF_MEM; 515 516 return ret_val; 517 } 518 519 /** 520 * ixgbe_setup_mac_link_vf - Setup MAC link settings 521 * @hw: pointer to hardware structure 522 * @speed: new link speed 523 * @autoneg: TRUE if autonegotiation enabled 524 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 525 * 526 * Set the link speed in the AUTOC register and restarts link. 527 **/ 528 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 529 bool autoneg_wait_to_complete) 530 { 531 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 532 return IXGBE_SUCCESS; 533 } 534 535 /** 536 * ixgbe_check_mac_link_vf - Get link/speed status 537 * @hw: pointer to hardware structure 538 * @speed: pointer to link speed 539 * @link_up: TRUE is link is up, FALSE otherwise 540 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 541 * 542 * Reads the links register to determine if link is up and the current speed 543 **/ 544 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 545 bool *link_up, bool autoneg_wait_to_complete) 546 { 547 struct ixgbe_mbx_info *mbx = &hw->mbx; 548 struct ixgbe_mac_info *mac = &hw->mac; 549 s32 ret_val = IXGBE_SUCCESS; 550 u32 links_reg; 551 u32 in_msg = 0; 552 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 553 554 /* If we were hit with a reset drop the link */ 555 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 556 mac->get_link_status = TRUE; 557 558 if (!mac->get_link_status) 559 goto out; 560 561 /* if link status is down no point in checking to see if pf is up */ 562 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 563 if (!(links_reg & IXGBE_LINKS_UP)) 564 goto out; 565 566 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 567 * before the link status is correct 568 */ 569 if (mac->type == ixgbe_mac_82599_vf) { 570 int i; 571 572 for (i = 0; i < 5; i++) { 573 usec_delay(100); 574 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 575 576 if (!(links_reg & IXGBE_LINKS_UP)) 577 goto out; 578 } 579 } 580 581 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 582 case IXGBE_LINKS_SPEED_10G_82599: 583 *speed = IXGBE_LINK_SPEED_10GB_FULL; 584 break; 585 case IXGBE_LINKS_SPEED_1G_82599: 586 *speed = IXGBE_LINK_SPEED_1GB_FULL; 587 break; 588 case IXGBE_LINKS_SPEED_100_82599: 589 *speed = IXGBE_LINK_SPEED_100_FULL; 590 break; 591 } 592 593 /* if the read failed it could just be a mailbox collision, best wait 594 * until we are called again and don't report an error 595 */ 596 if (mbx->ops.read(hw, &in_msg, 1, 0)) 597 goto out; 598 599 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 600 /* msg is not CTS and is NACK we must have lost CTS status */ 601 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 602 ret_val = -1; 603 goto out; 604 } 605 606 /* the pf is talking, if we timed out in the past we reinit */ 607 if (!mbx->timeout) { 608 ret_val = -1; 609 goto out; 610 } 611 612 /* if we passed all the tests above then the link is up and we no 613 * longer need to check for link 614 */ 615 mac->get_link_status = FALSE; 616 617 out: 618 *link_up = !mac->get_link_status; 619 return ret_val; 620 } 621 622 /** 623 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 624 * @hw: pointer to the HW structure 625 * @max_size: value to assign to max frame size 626 **/ 627 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 628 { 629 u32 msgbuf[2]; 630 631 msgbuf[0] = IXGBE_VF_SET_LPE; 632 msgbuf[1] = max_size; 633 ixgbevf_write_msg_read_ack(hw, msgbuf, 2); 634 } 635 636 /** 637 * ixgbevf_negotiate_api_version - Negotiate supported API version 638 * @hw: pointer to the HW structure 639 * @api: integer containing requested API version 640 **/ 641 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 642 { 643 int err; 644 u32 msg[3]; 645 646 /* Negotiate the mailbox API version */ 647 msg[0] = IXGBE_VF_API_NEGOTIATE; 648 msg[1] = api; 649 msg[2] = 0; 650 err = hw->mbx.ops.write_posted(hw, msg, 3, 0); 651 652 if (!err) 653 err = hw->mbx.ops.read_posted(hw, msg, 3, 0); 654 655 if (!err) { 656 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 657 658 /* Store value and return 0 on success */ 659 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 660 hw->api_version = api; 661 return 0; 662 } 663 664 err = IXGBE_ERR_INVALID_ARGUMENT; 665 } 666 667 return err; 668 } 669 670 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 671 unsigned int *default_tc) 672 { 673 int err; 674 u32 msg[5]; 675 676 /* do nothing if API doesn't support ixgbevf_get_queues */ 677 switch (hw->api_version) { 678 case ixgbe_mbox_api_11: 679 break; 680 default: 681 return 0; 682 } 683 684 /* Fetch queue configuration from the PF */ 685 msg[0] = IXGBE_VF_GET_QUEUES; 686 msg[1] = msg[2] = msg[3] = msg[4] = 0; 687 err = hw->mbx.ops.write_posted(hw, msg, 5, 0); 688 689 if (!err) 690 err = hw->mbx.ops.read_posted(hw, msg, 5, 0); 691 692 if (!err) { 693 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 694 695 /* 696 * if we we didn't get an ACK there must have been 697 * some sort of mailbox error so we should treat it 698 * as such 699 */ 700 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 701 return IXGBE_ERR_MBX; 702 703 /* record and validate values from message */ 704 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 705 if (hw->mac.max_tx_queues == 0 || 706 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 707 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 708 709 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 710 if (hw->mac.max_rx_queues == 0 || 711 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 712 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 713 714 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 715 /* in case of unknown state assume we cannot tag frames */ 716 if (*num_tcs > hw->mac.max_rx_queues) 717 *num_tcs = 1; 718 719 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 720 /* default to queue 0 on out-of-bounds queue number */ 721 if (*default_tc >= hw->mac.max_tx_queues) 722 *default_tc = 0; 723 } 724 725 return err; 726 } 727