1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of version 2 of the GNU General Public License as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 23 * The full GNU General Public License is included in this distribution 24 * in the file called LICENSE.GPL. 25 * 26 * BSD LICENSE 27 * 28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 35 * * Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * * Redistributions in binary form must reproduce the above copyright 38 * notice, this list of conditions and the following disclaimer in 39 * the documentation and/or other materials provided with the 40 * distribution. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 46 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 47 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 48 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 49 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 50 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 51 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 */ 54 #ifndef _SCIC_SDS_PORT_REGISTERS_H_ 55 #define _SCIC_SDS_PORT_REGISTERS_H_ 56 57 /** 58 * @file 59 * 60 * @brief This file contains a set of macros that assist in reading the SCU 61 * hardware registers. 62 */ 63 64 #ifdef __cplusplus 65 extern "C" { 66 #endif // __cplusplus 67 68 /** 69 * Macro to read the port task scheduler register associated with this port 70 * object 71 */ 72 #define scu_port_task_scheduler_read(port, reg) \ 73 scu_register_read( \ 74 scic_sds_port_get_controller(port), \ 75 (port)->port_task_scheduler_registers->reg \ 76 ) 77 78 /** 79 * Macro to write the port task scheduler register associated with this 80 * port object 81 */ 82 #define scu_port_task_scheduler_write(port, reg, value) \ 83 scu_register_write( \ 84 scic_sds_port_get_controller(port), \ 85 (port)->port_task_scheduler_registers->reg, \ 86 (value) \ 87 ) 88 89 #define scu_port_viit_register_write(port, reg, value) \ 90 scu_register_write( \ 91 scic_sds_port_get_controller(port), \ 92 (port)->viit_registers->reg, \ 93 (value) \ 94 ) 95 96 //**************************************************************************** 97 //* Port Task Scheduler registers controlled by the port object 98 //**************************************************************************** 99 100 /** 101 * Macro to read the port task scheduler control register 102 */ 103 #define SCU_PTSxCR_READ(port) \ 104 scu_port_task_scheduler_read(port, control) 105 106 /** 107 * Macro to write the port task scheduler control regsister 108 */ 109 #define SCU_PTSxCR_WRITE(port, value) \ 110 scu_port_task_scheduler_write(port, control, value) 111 112 //**************************************************************************** 113 //* Port PE Configuration registers 114 //**************************************************************************** 115 116 /** 117 * Macro to write the PE Port Configuration Register 118 */ 119 #define SCU_PCSPExCR_WRITE(port, phy_id, value) \ 120 scu_register_write( \ 121 scic_sds_port_get_controller(port), \ 122 (port)->port_pe_configuration_register[phy_id], \ 123 (value) \ 124 ) 125 126 /** 127 * Macro to read the PE Port Configuration Regsiter 128 */ 129 #define SCU_PCSPExCR_READ(port, phy_id) \ 130 scu_register_read( \ 131 scic_sds_port_get_controller(port), \ 132 (port)->port_pe_configuration_register[phy_id] \ 133 ) 134 135 #ifdef __cplusplus 136 } 137 #endif // __cplusplus 138 139 #endif // _SCIC_SDS_PORT_REGISTERS_H_ 140