1 /* 2 * Copyright (c) 2026 Advanced Micro Devices, Inc. 3 * 4 * SPDX-License-Identifier: BSD-2-Clause 5 */ 6 7 /* 8 * AMD/Intel RAPL energy counters exposed as an hwpmc(4) PMC class. 9 */ 10 11 #ifndef _DEV_HWPMC_RAPL_H_ 12 #define _DEV_HWPMC_RAPL_H_ 1 13 14 #ifdef _KERNEL 15 16 struct pmc_mdep; 17 18 /* 19 * Max RAPL rows per CPU: package, "cores" and (Intel only) DRAM. The actual 20 * per-vendor count is determined at initialize time (pcd_num). 21 */ 22 #define RAPL_MAX_NPMCS 3 23 24 int pmc_rapl_initialize(struct pmc_mdep *_md, int _maxcpu, int _classindex); 25 void pmc_rapl_finalize(struct pmc_mdep *_md); 26 27 #endif /* _KERNEL */ 28 #endif /* _DEV_HWPMC_RAPL_H_ */ 29