1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright © 2026 Dmitry Salychev 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #ifndef _DPAA2_FRAME_H 29 #define _DPAA2_FRAME_H 30 31 #include <sys/types.h> 32 #include <sys/bus.h> 33 #include <sys/kassert.h> 34 35 #include "dpaa2_types.h" 36 #include "dpaa2_buf.h" 37 38 /* 39 * Helper routines for the DPAA2 frames (e.g. descriptors, software/hardware 40 * annotations, etc.). 41 */ 42 43 /* 44 * DPAA2 frame descriptor size, field offsets and masks. 45 * 46 * See 3.1.1 Frame descriptor format, 47 * 4.2.1.2.2 Structure of Frame Descriptors (FDs), 48 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 49 */ 50 #define DPAA2_FD_SIZE 32u 51 #define DPAA2_FD_FMT_MASK (0x3u) 52 #define DPAA2_FD_FMT_SHIFT (12) 53 #define DPAA2_FD_ERR_MASK (0xFFu) 54 #define DPAA2_FD_ERR_SHIFT (0) 55 #define DPAA2_FD_SL_MASK (0x1u) 56 #define DPAA2_FD_SL_SHIFT (14) 57 #define DPAA2_FD_LEN_MASK (0x3FFFFu) 58 #define DPAA2_FD_OFFSET_MASK (0x0FFFu) 59 #define DPAA2_FD_PTAC_MASK (0x7u) 60 #define DPAA2_FD_PTAC_SHIFT (21) 61 62 /* 63 * DPAA2 frame annotation sizes 64 * 65 * NOTE: Accelerator-specific (HWA) annotation length is described in the 64-byte 66 * units by the FD[ASAL] bits and can be as big as 960 bytes. Current 67 * values describe what is actually supported by the DPAA2 drivers. 68 * 69 * See 3.1.1 Frame descriptor format, 70 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0 71 */ 72 #define DPAA2_FA_SIZE 192u /* DPAA2 frame annotation */ 73 #define DPAA2_FA_SWA_SIZE 64u /* SW frame annotation */ 74 #define DPAA2_FA_HWA_SIZE 128u /* HW frame annotation */ 75 #define DPAA2_FA_WRIOP_SIZE 128u /* WRIOP HW annotation */ 76 77 /** 78 * @brief DPAA2 frame descriptor. 79 * 80 * addr: Memory address of the start of the buffer holding the 81 * frame data or the buffer containing the scatter/gather 82 * list. 83 * data_length: Length of the frame data (in bytes). 84 * bpid_ivp_bmt: Buffer pool ID (14 bit + BMT bit + IVP bit) 85 * offset_fmt_sl: Frame data offset, frame format and short-length fields. 86 * frame_ctx: Frame context. This field allows the sender of a frame 87 * to communicate some out-of-band information to the 88 * receiver of the frame. 89 * ctrl: Control bits (ERR, CBMT, ASAL, PTAC, DROPP, SC, DD). 90 * flow_ctx: Frame flow context. Associates the frame with a flow 91 * structure. QMan may use the FLC field for 3 purposes: 92 * stashing control, order definition point identification, 93 * and enqueue replication control. 94 * 95 * See 3.1.1 Frame descriptor format, 96 * 4.2.1.2.2 Structure of Frame Descriptors (FDs), 97 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 98 */ 99 struct dpaa2_fd { 100 uint64_t addr; 101 uint32_t data_length; 102 uint16_t bpid_ivp_bmt; 103 uint16_t offset_fmt_sl; 104 uint32_t frame_ctx; 105 uint32_t ctrl; 106 uint64_t flow_ctx; 107 } __packed; 108 CTASSERT(sizeof(struct dpaa2_fd) == DPAA2_FD_SIZE); 109 110 /** 111 * @brief WRIOP hardware frame annotation. 112 * 113 * See 7.34.2 WRIOP hardware frame annotation (FA), 114 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 115 */ 116 struct dpaa2_hwa_wriop { 117 union { 118 struct { 119 uint64_t fas; 120 uint64_t timestamp; 121 /* XXX-DSL: more to add here... */ 122 } __packed; 123 uint8_t raw[128]; 124 }; 125 } __packed; 126 CTASSERT(sizeof(struct dpaa2_hwa_wriop) == DPAA2_FA_WRIOP_SIZE); 127 128 /** 129 * @brief DPAA2 hardware frame annotation (accelerator-specific annotation). 130 * 131 * See 3.4.1.2 Accelerator-specific annotation, 132 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 133 */ 134 struct dpaa2_hwa { 135 union { 136 struct dpaa2_hwa_wriop wriop; 137 }; 138 } __packed; 139 CTASSERT(sizeof(struct dpaa2_hwa) == DPAA2_FA_HWA_SIZE); 140 141 /** 142 * @brief DPAA2 software frame annotation (pass-through annotation). 143 * 144 * See 3.4.1.1 Pass-through annotation, 145 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 146 */ 147 struct dpaa2_swa { 148 union { 149 struct { 150 uint32_t magic; 151 struct dpaa2_buf *buf; 152 }; 153 struct { 154 uint8_t pta1[32]; 155 uint8_t pta2[32]; 156 }; 157 uint8_t raw[64]; 158 }; 159 } __packed; 160 CTASSERT(sizeof(struct dpaa2_swa) == DPAA2_FA_SWA_SIZE); 161 162 int dpaa2_fd_build(device_t, const uint16_t, struct dpaa2_buf *, 163 bus_dma_segment_t *, const int, struct dpaa2_fd *); 164 165 int dpaa2_fd_err(struct dpaa2_fd *); 166 uint32_t dpaa2_fd_data_len(struct dpaa2_fd *); 167 int dpaa2_fd_format(struct dpaa2_fd *); 168 bool dpaa2_fd_short_len(struct dpaa2_fd *); 169 int dpaa2_fd_offset(struct dpaa2_fd *); 170 171 int dpaa2_fa_get_swa(struct dpaa2_fd *, struct dpaa2_swa **); 172 int dpaa2_fa_get_hwa(struct dpaa2_fd *, struct dpaa2_hwa **); 173 174 #endif /* _DPAA2_FRAME_H */ 175