1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2026 Dmitry Salychev 5 * Copyright (c) 2026 Bjoern A. Zeeb 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _DPAA2_FRAME_H 30 #define _DPAA2_FRAME_H 31 32 #include <sys/types.h> 33 #include <sys/bus.h> 34 #include <sys/kassert.h> 35 36 #include "dpaa2_types.h" 37 #include "dpaa2_buf.h" 38 39 /* 40 * Helper routines for the DPAA2 frames (e.g. descriptors, software/hardware 41 * annotations, etc.). 42 */ 43 44 /* 45 * DPAA2 frame descriptor size, field offsets and masks. 46 * 47 * See 3.1.1 Frame descriptor format, 48 * 4.2.1.2.2 Structure of Frame Descriptors (FDs), 49 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 50 */ 51 #define DPAA2_FD_SIZE 32u 52 #define DPAA2_FD_FMT_MASK (0x3u) 53 #define DPAA2_FD_FMT_SHIFT (12) 54 #define DPAA2_FD_ERR_MASK (0xFFu) 55 #define DPAA2_FD_ERR_SHIFT (0) 56 #define DPAA2_FD_SL_MASK (0x1u) 57 #define DPAA2_FD_SL_SHIFT (14) 58 #define DPAA2_FD_LEN_MASK (0x3FFFFu) 59 #define DPAA2_FD_OFFSET_MASK (0x0FFFu) 60 #define DPAA2_FD_PTAC_PTV2_MASK (0x1u) 61 #define DPAA2_FD_PTAC_PTV1_MASK (0x2u) 62 #define DPAA2_FD_PTAC_PTA_MASK (0x4u) 63 #define DPAA2_FD_PTAC_MASK (0x7u) 64 #define DPAA2_FD_PTAC_SHIFT (21) 65 #define DPAA2_FD_ASAL_MASK (0xFu) 66 #define DPAA2_FD_ASAL_SHIFT (16) 67 68 /* 69 * DPAA2 frame annotation sizes 70 * 71 * NOTE: Accelerator-specific (HWA) annotation length is described in the 64-byte 72 * units by the FD[ASAL] bits and can be as big as 960 bytes. Current 73 * values describe what is actually supported by the DPAA2 drivers. 74 * 75 * See 3.1.1 Frame descriptor format, 76 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0 77 */ 78 #define DPAA2_FA_SIZE 192u /* DPAA2 frame annotation */ 79 #define DPAA2_FA_SWA_SIZE 64u /* SW frame annotation */ 80 #define DPAA2_FA_HWA_SIZE 128u /* HW frame annotation */ 81 #define DPAA2_FA_WRIOP_SIZE 128u /* WRIOP HW annotation */ 82 #define DPAA2_FA_HWA_FAS_SIZE 8u /* Frame annotation status */ 83 84 /* 85 * DPAA2 annotation valid bits in FD[FRC]. 86 * 87 * See 7.31.2 WRIOP FD frame context (FRC), 88 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 89 */ 90 #define DPAA2_FD_FRC_FASV (1 << 15) 91 #define DPAA2_FD_FRC_FAEADV (1 << 14) 92 #define DPAA2_FD_FRC_FAPRV (1 << 13) 93 #define DPAA2_FD_FRC_FAIADV (1 << 12) 94 #define DPAA2_FD_FRC_FASWOV (1 << 11) 95 #define DPAA2_FD_FRC_FAICFDV (1 << 10) 96 97 /* 98 * DPAA2 Frame annotation status word. 99 * 100 * See 7.34.3 Frame annotation status word (FAS), 101 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 102 */ 103 #define DPAA2_FAS_L3CV (1 << 3) /* L3 csum validated */ 104 #define DPAA2_FAS_L3CE (1 << 2) /* L3 csum error */ 105 #define DPAA2_FAS_L4CV (1 << 1) /* L4 csum validated*/ 106 #define DPAA2_FAS_L4CE (1 << 0) /* L4 csum error */ 107 108 /** 109 * @brief DPAA2 frame descriptor. 110 * 111 * addr: Memory address of the start of the buffer holding the 112 * frame data or the buffer containing the scatter/gather 113 * list. 114 * data_length: Length of the frame data (in bytes). 115 * bpid_ivp_bmt: Buffer pool ID (14 bit + BMT bit + IVP bit) 116 * offset_fmt_sl: Frame data offset, frame format and short-length fields. 117 * frame_ctx: Frame context. This field allows the sender of a frame 118 * to communicate some out-of-band information to the 119 * receiver of the frame. 120 * ctrl: Control bits (ERR, CBMT, ASAL, PTAC, DROPP, SC, DD). 121 * flow_ctx: Frame flow context. Associates the frame with a flow 122 * structure. QMan may use the FLC field for 3 purposes: 123 * stashing control, order definition point identification, 124 * and enqueue replication control. 125 * 126 * See 3.1.1 Frame descriptor format, 127 * 4.2.1.2.2 Structure of Frame Descriptors (FDs), 128 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 129 */ 130 struct dpaa2_fd { 131 uint64_t addr; 132 uint32_t data_length; 133 uint16_t bpid_ivp_bmt; 134 uint16_t offset_fmt_sl; 135 uint32_t frame_ctx; 136 uint32_t ctrl; 137 uint64_t flow_ctx; 138 } __packed; 139 CTASSERT(sizeof(struct dpaa2_fd) == DPAA2_FD_SIZE); 140 141 /** 142 * @brief WRIOP hardware frame annotation. 143 * 144 * See 7.34.2 WRIOP hardware frame annotation (FA), 145 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 146 */ 147 struct dpaa2_hwa_wriop { 148 union { 149 struct { 150 uint64_t fas; 151 uint64_t timestamp; 152 /* XXX-DSL: more to add here... */ 153 } __packed; 154 uint8_t raw[128]; 155 }; 156 } __packed; 157 CTASSERT(sizeof(struct dpaa2_hwa_wriop) == DPAA2_FA_WRIOP_SIZE); 158 159 /** 160 * @brief DPAA2 hardware frame annotation. 161 * 162 * See 3.4.1.2 Accelerator-specific annotation, 163 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 164 */ 165 struct dpaa2_hwa { 166 union { 167 /* Keep fields common to all accelerators at the top. */ 168 struct { 169 uint64_t fas; 170 } __packed; 171 /* Keep accelerator-specific annotations below. */ 172 struct dpaa2_hwa_wriop wriop; 173 }; 174 } __packed; 175 CTASSERT(sizeof(struct dpaa2_hwa) == DPAA2_FA_HWA_SIZE); 176 177 /** 178 * @brief DPAA2 software frame annotation (pass-through annotation). 179 * 180 * See 3.4.1.1 Pass-through annotation, 181 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 182 */ 183 struct dpaa2_swa { 184 union { 185 struct { 186 uint32_t magic; 187 struct dpaa2_buf *buf; 188 }; 189 struct { 190 uint8_t pta1[32]; 191 uint8_t pta2[32]; 192 }; 193 uint8_t raw[64]; 194 }; 195 } __packed; 196 CTASSERT(sizeof(struct dpaa2_swa) == DPAA2_FA_SWA_SIZE); 197 198 /** 199 * @brief Frame annotation status word. 200 * 201 * See 7.34.3 Frame annotation status word (FAS), 202 * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 203 */ 204 struct dpaa2_hwa_fas { 205 uint8_t _reserved1; 206 uint8_t ppid; 207 uint16_t ifpid; 208 uint32_t status; 209 } __packed; 210 CTASSERT(sizeof(struct dpaa2_hwa_fas) == DPAA2_FA_HWA_FAS_SIZE); 211 212 int dpaa2_fd_build(device_t, const uint16_t, struct dpaa2_buf *, 213 bus_dma_segment_t *, const int, struct dpaa2_fd *); 214 215 int dpaa2_fd_err(struct dpaa2_fd *); 216 uint32_t dpaa2_fd_data_len(struct dpaa2_fd *); 217 int dpaa2_fd_format(struct dpaa2_fd *); 218 bool dpaa2_fd_short_len(struct dpaa2_fd *); 219 int dpaa2_fd_offset(struct dpaa2_fd *); 220 221 uint32_t dpaa2_fd_get_frc(struct dpaa2_fd *); 222 #ifdef _not_yet_ 223 void dpaa2_fd_set_frc(struct dpaa2_fd *, uint32_t); 224 #endif 225 226 int dpaa2_fa_get_swa(struct dpaa2_fd *, struct dpaa2_swa **); 227 int dpaa2_fa_get_hwa(struct dpaa2_fd *, struct dpaa2_hwa **); 228 int dpaa2_fa_get_fas(struct dpaa2_fd *, struct dpaa2_hwa_fas *); 229 #ifdef _not_yet_ 230 int dpaa2_fa_set_fas(struct dpaa2_fd *, struct dpaa2_hwa_fas *); 231 #endif 232 233 #endif /* _DPAA2_FRAME_H */ 234