18e994533SDmitry Salychev /*- 28e994533SDmitry Salychev * SPDX-License-Identifier: BSD-2-Clause 38e994533SDmitry Salychev * 4*4a6d7fc1SDmitry Salychev * Copyright (c) 2026 Dmitry Salychev 5*4a6d7fc1SDmitry Salychev * Copyright (c) 2026 Bjoern A. Zeeb 68e994533SDmitry Salychev * 78e994533SDmitry Salychev * Redistribution and use in source and binary forms, with or without 88e994533SDmitry Salychev * modification, are permitted provided that the following conditions 98e994533SDmitry Salychev * are met: 108e994533SDmitry Salychev * 1. Redistributions of source code must retain the above copyright 118e994533SDmitry Salychev * notice, this list of conditions and the following disclaimer. 128e994533SDmitry Salychev * 2. Redistributions in binary form must reproduce the above copyright 138e994533SDmitry Salychev * notice, this list of conditions and the following disclaimer in the 148e994533SDmitry Salychev * documentation and/or other materials provided with the distribution. 158e994533SDmitry Salychev * 168e994533SDmitry Salychev * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 178e994533SDmitry Salychev * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 188e994533SDmitry Salychev * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 198e994533SDmitry Salychev * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 208e994533SDmitry Salychev * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 218e994533SDmitry Salychev * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 228e994533SDmitry Salychev * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 238e994533SDmitry Salychev * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 248e994533SDmitry Salychev * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 258e994533SDmitry Salychev * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 268e994533SDmitry Salychev * SUCH DAMAGE. 278e994533SDmitry Salychev */ 288e994533SDmitry Salychev 298e994533SDmitry Salychev #ifndef _DPAA2_FRAME_H 308e994533SDmitry Salychev #define _DPAA2_FRAME_H 318e994533SDmitry Salychev 328e994533SDmitry Salychev #include <sys/types.h> 338e994533SDmitry Salychev #include <sys/bus.h> 348e994533SDmitry Salychev #include <sys/kassert.h> 358e994533SDmitry Salychev 368e994533SDmitry Salychev #include "dpaa2_types.h" 378e994533SDmitry Salychev #include "dpaa2_buf.h" 388e994533SDmitry Salychev 398e994533SDmitry Salychev /* 408e994533SDmitry Salychev * Helper routines for the DPAA2 frames (e.g. descriptors, software/hardware 418e994533SDmitry Salychev * annotations, etc.). 428e994533SDmitry Salychev */ 438e994533SDmitry Salychev 448e994533SDmitry Salychev /* 458e994533SDmitry Salychev * DPAA2 frame descriptor size, field offsets and masks. 468e994533SDmitry Salychev * 478e994533SDmitry Salychev * See 3.1.1 Frame descriptor format, 488e994533SDmitry Salychev * 4.2.1.2.2 Structure of Frame Descriptors (FDs), 498e994533SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 508e994533SDmitry Salychev */ 518e994533SDmitry Salychev #define DPAA2_FD_SIZE 32u 528e994533SDmitry Salychev #define DPAA2_FD_FMT_MASK (0x3u) 538e994533SDmitry Salychev #define DPAA2_FD_FMT_SHIFT (12) 548e994533SDmitry Salychev #define DPAA2_FD_ERR_MASK (0xFFu) 558e994533SDmitry Salychev #define DPAA2_FD_ERR_SHIFT (0) 568e994533SDmitry Salychev #define DPAA2_FD_SL_MASK (0x1u) 578e994533SDmitry Salychev #define DPAA2_FD_SL_SHIFT (14) 588e994533SDmitry Salychev #define DPAA2_FD_LEN_MASK (0x3FFFFu) 598e994533SDmitry Salychev #define DPAA2_FD_OFFSET_MASK (0x0FFFu) 60*4a6d7fc1SDmitry Salychev #define DPAA2_FD_PTAC_PTV2_MASK (0x1u) 61*4a6d7fc1SDmitry Salychev #define DPAA2_FD_PTAC_PTV1_MASK (0x2u) 62*4a6d7fc1SDmitry Salychev #define DPAA2_FD_PTAC_PTA_MASK (0x4u) 638e994533SDmitry Salychev #define DPAA2_FD_PTAC_MASK (0x7u) 648e994533SDmitry Salychev #define DPAA2_FD_PTAC_SHIFT (21) 65*4a6d7fc1SDmitry Salychev #define DPAA2_FD_ASAL_MASK (0xFu) 66*4a6d7fc1SDmitry Salychev #define DPAA2_FD_ASAL_SHIFT (16) 678e994533SDmitry Salychev 688e994533SDmitry Salychev /* 698e994533SDmitry Salychev * DPAA2 frame annotation sizes 708e994533SDmitry Salychev * 718e994533SDmitry Salychev * NOTE: Accelerator-specific (HWA) annotation length is described in the 64-byte 728e994533SDmitry Salychev * units by the FD[ASAL] bits and can be as big as 960 bytes. Current 738e994533SDmitry Salychev * values describe what is actually supported by the DPAA2 drivers. 748e994533SDmitry Salychev * 758e994533SDmitry Salychev * See 3.1.1 Frame descriptor format, 768e994533SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0 778e994533SDmitry Salychev */ 788e994533SDmitry Salychev #define DPAA2_FA_SIZE 192u /* DPAA2 frame annotation */ 798e994533SDmitry Salychev #define DPAA2_FA_SWA_SIZE 64u /* SW frame annotation */ 808e994533SDmitry Salychev #define DPAA2_FA_HWA_SIZE 128u /* HW frame annotation */ 818e994533SDmitry Salychev #define DPAA2_FA_WRIOP_SIZE 128u /* WRIOP HW annotation */ 82*4a6d7fc1SDmitry Salychev #define DPAA2_FA_HWA_FAS_SIZE 8u /* Frame annotation status */ 83*4a6d7fc1SDmitry Salychev 84*4a6d7fc1SDmitry Salychev /* 85*4a6d7fc1SDmitry Salychev * DPAA2 annotation valid bits in FD[FRC]. 86*4a6d7fc1SDmitry Salychev * 87*4a6d7fc1SDmitry Salychev * See 7.31.2 WRIOP FD frame context (FRC), 88*4a6d7fc1SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 89*4a6d7fc1SDmitry Salychev */ 90*4a6d7fc1SDmitry Salychev #define DPAA2_FD_FRC_FASV (1 << 15) 91*4a6d7fc1SDmitry Salychev #define DPAA2_FD_FRC_FAEADV (1 << 14) 92*4a6d7fc1SDmitry Salychev #define DPAA2_FD_FRC_FAPRV (1 << 13) 93*4a6d7fc1SDmitry Salychev #define DPAA2_FD_FRC_FAIADV (1 << 12) 94*4a6d7fc1SDmitry Salychev #define DPAA2_FD_FRC_FASWOV (1 << 11) 95*4a6d7fc1SDmitry Salychev #define DPAA2_FD_FRC_FAICFDV (1 << 10) 96*4a6d7fc1SDmitry Salychev 97*4a6d7fc1SDmitry Salychev /* 98*4a6d7fc1SDmitry Salychev * DPAA2 Frame annotation status word. 99*4a6d7fc1SDmitry Salychev * 100*4a6d7fc1SDmitry Salychev * See 7.34.3 Frame annotation status word (FAS), 101*4a6d7fc1SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 102*4a6d7fc1SDmitry Salychev */ 103*4a6d7fc1SDmitry Salychev #define DPAA2_FAS_L3CV (1 << 3) /* L3 csum validated */ 104*4a6d7fc1SDmitry Salychev #define DPAA2_FAS_L3CE (1 << 2) /* L3 csum error */ 105*4a6d7fc1SDmitry Salychev #define DPAA2_FAS_L4CV (1 << 1) /* L4 csum validated*/ 106*4a6d7fc1SDmitry Salychev #define DPAA2_FAS_L4CE (1 << 0) /* L4 csum error */ 1078e994533SDmitry Salychev 1088e994533SDmitry Salychev /** 1098e994533SDmitry Salychev * @brief DPAA2 frame descriptor. 1108e994533SDmitry Salychev * 1118e994533SDmitry Salychev * addr: Memory address of the start of the buffer holding the 1128e994533SDmitry Salychev * frame data or the buffer containing the scatter/gather 1138e994533SDmitry Salychev * list. 1148e994533SDmitry Salychev * data_length: Length of the frame data (in bytes). 1158e994533SDmitry Salychev * bpid_ivp_bmt: Buffer pool ID (14 bit + BMT bit + IVP bit) 1168e994533SDmitry Salychev * offset_fmt_sl: Frame data offset, frame format and short-length fields. 1178e994533SDmitry Salychev * frame_ctx: Frame context. This field allows the sender of a frame 1188e994533SDmitry Salychev * to communicate some out-of-band information to the 1198e994533SDmitry Salychev * receiver of the frame. 1208e994533SDmitry Salychev * ctrl: Control bits (ERR, CBMT, ASAL, PTAC, DROPP, SC, DD). 1218e994533SDmitry Salychev * flow_ctx: Frame flow context. Associates the frame with a flow 1228e994533SDmitry Salychev * structure. QMan may use the FLC field for 3 purposes: 1238e994533SDmitry Salychev * stashing control, order definition point identification, 1248e994533SDmitry Salychev * and enqueue replication control. 1258e994533SDmitry Salychev * 1268e994533SDmitry Salychev * See 3.1.1 Frame descriptor format, 1278e994533SDmitry Salychev * 4.2.1.2.2 Structure of Frame Descriptors (FDs), 1288e994533SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 1298e994533SDmitry Salychev */ 1308e994533SDmitry Salychev struct dpaa2_fd { 1318e994533SDmitry Salychev uint64_t addr; 1328e994533SDmitry Salychev uint32_t data_length; 1338e994533SDmitry Salychev uint16_t bpid_ivp_bmt; 1348e994533SDmitry Salychev uint16_t offset_fmt_sl; 1358e994533SDmitry Salychev uint32_t frame_ctx; 1368e994533SDmitry Salychev uint32_t ctrl; 1378e994533SDmitry Salychev uint64_t flow_ctx; 1388e994533SDmitry Salychev } __packed; 1398e994533SDmitry Salychev CTASSERT(sizeof(struct dpaa2_fd) == DPAA2_FD_SIZE); 1408e994533SDmitry Salychev 1418e994533SDmitry Salychev /** 1428e994533SDmitry Salychev * @brief WRIOP hardware frame annotation. 1438e994533SDmitry Salychev * 1448e994533SDmitry Salychev * See 7.34.2 WRIOP hardware frame annotation (FA), 1458e994533SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 1468e994533SDmitry Salychev */ 1478e994533SDmitry Salychev struct dpaa2_hwa_wriop { 1488e994533SDmitry Salychev union { 1498e994533SDmitry Salychev struct { 1508e994533SDmitry Salychev uint64_t fas; 1518e994533SDmitry Salychev uint64_t timestamp; 1528e994533SDmitry Salychev /* XXX-DSL: more to add here... */ 1538e994533SDmitry Salychev } __packed; 1548e994533SDmitry Salychev uint8_t raw[128]; 1558e994533SDmitry Salychev }; 1568e994533SDmitry Salychev } __packed; 1578e994533SDmitry Salychev CTASSERT(sizeof(struct dpaa2_hwa_wriop) == DPAA2_FA_WRIOP_SIZE); 1588e994533SDmitry Salychev 1598e994533SDmitry Salychev /** 160*4a6d7fc1SDmitry Salychev * @brief DPAA2 hardware frame annotation. 1618e994533SDmitry Salychev * 1628e994533SDmitry Salychev * See 3.4.1.2 Accelerator-specific annotation, 1638e994533SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 1648e994533SDmitry Salychev */ 1658e994533SDmitry Salychev struct dpaa2_hwa { 1668e994533SDmitry Salychev union { 167*4a6d7fc1SDmitry Salychev /* Keep fields common to all accelerators at the top. */ 168*4a6d7fc1SDmitry Salychev struct { 169*4a6d7fc1SDmitry Salychev uint64_t fas; 170*4a6d7fc1SDmitry Salychev } __packed; 171*4a6d7fc1SDmitry Salychev /* Keep accelerator-specific annotations below. */ 1728e994533SDmitry Salychev struct dpaa2_hwa_wriop wriop; 1738e994533SDmitry Salychev }; 1748e994533SDmitry Salychev } __packed; 1758e994533SDmitry Salychev CTASSERT(sizeof(struct dpaa2_hwa) == DPAA2_FA_HWA_SIZE); 1768e994533SDmitry Salychev 1778e994533SDmitry Salychev /** 1788e994533SDmitry Salychev * @brief DPAA2 software frame annotation (pass-through annotation). 1798e994533SDmitry Salychev * 1808e994533SDmitry Salychev * See 3.4.1.1 Pass-through annotation, 1818e994533SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 1828e994533SDmitry Salychev */ 1838e994533SDmitry Salychev struct dpaa2_swa { 1848e994533SDmitry Salychev union { 1858e994533SDmitry Salychev struct { 1868e994533SDmitry Salychev uint32_t magic; 1878e994533SDmitry Salychev struct dpaa2_buf *buf; 1888e994533SDmitry Salychev }; 1898e994533SDmitry Salychev struct { 1908e994533SDmitry Salychev uint8_t pta1[32]; 1918e994533SDmitry Salychev uint8_t pta2[32]; 1928e994533SDmitry Salychev }; 1938e994533SDmitry Salychev uint8_t raw[64]; 1948e994533SDmitry Salychev }; 1958e994533SDmitry Salychev } __packed; 1968e994533SDmitry Salychev CTASSERT(sizeof(struct dpaa2_swa) == DPAA2_FA_SWA_SIZE); 1978e994533SDmitry Salychev 198*4a6d7fc1SDmitry Salychev /** 199*4a6d7fc1SDmitry Salychev * @brief Frame annotation status word. 200*4a6d7fc1SDmitry Salychev * 201*4a6d7fc1SDmitry Salychev * See 7.34.3 Frame annotation status word (FAS), 202*4a6d7fc1SDmitry Salychev * LX2160A DPAA2 Low-Level Hardware Reference Manual, Rev. 0, 06/2020 203*4a6d7fc1SDmitry Salychev */ 204*4a6d7fc1SDmitry Salychev struct dpaa2_hwa_fas { 205*4a6d7fc1SDmitry Salychev uint8_t _reserved1; 206*4a6d7fc1SDmitry Salychev uint8_t ppid; 207*4a6d7fc1SDmitry Salychev uint16_t ifpid; 208*4a6d7fc1SDmitry Salychev uint32_t status; 209*4a6d7fc1SDmitry Salychev } __packed; 210*4a6d7fc1SDmitry Salychev CTASSERT(sizeof(struct dpaa2_hwa_fas) == DPAA2_FA_HWA_FAS_SIZE); 211*4a6d7fc1SDmitry Salychev 2128e994533SDmitry Salychev int dpaa2_fd_build(device_t, const uint16_t, struct dpaa2_buf *, 2138e994533SDmitry Salychev bus_dma_segment_t *, const int, struct dpaa2_fd *); 2148e994533SDmitry Salychev 2158e994533SDmitry Salychev int dpaa2_fd_err(struct dpaa2_fd *); 2168e994533SDmitry Salychev uint32_t dpaa2_fd_data_len(struct dpaa2_fd *); 2178e994533SDmitry Salychev int dpaa2_fd_format(struct dpaa2_fd *); 2188e994533SDmitry Salychev bool dpaa2_fd_short_len(struct dpaa2_fd *); 2198e994533SDmitry Salychev int dpaa2_fd_offset(struct dpaa2_fd *); 2208e994533SDmitry Salychev 221*4a6d7fc1SDmitry Salychev uint32_t dpaa2_fd_get_frc(struct dpaa2_fd *); 222*4a6d7fc1SDmitry Salychev #ifdef _not_yet_ 223*4a6d7fc1SDmitry Salychev void dpaa2_fd_set_frc(struct dpaa2_fd *, uint32_t); 224*4a6d7fc1SDmitry Salychev #endif 225*4a6d7fc1SDmitry Salychev 2268e994533SDmitry Salychev int dpaa2_fa_get_swa(struct dpaa2_fd *, struct dpaa2_swa **); 2278e994533SDmitry Salychev int dpaa2_fa_get_hwa(struct dpaa2_fd *, struct dpaa2_hwa **); 228*4a6d7fc1SDmitry Salychev int dpaa2_fa_get_fas(struct dpaa2_fd *, struct dpaa2_hwa_fas *); 229*4a6d7fc1SDmitry Salychev #ifdef _not_yet_ 230*4a6d7fc1SDmitry Salychev int dpaa2_fa_set_fas(struct dpaa2_fd *, struct dpaa2_hwa_fas *); 231*4a6d7fc1SDmitry Salychev #endif 2328e994533SDmitry Salychev 2338e994533SDmitry Salychev #endif /* _DPAA2_FRAME_H */ 234