xref: /freebsd/sys/dev/cxgbe/t4_l2t.h (revision 8165650389ba2d0a68cea6902ac3750055cad9da)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011 Chelsio Communications, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  */
29 
30 #ifndef __T4_L2T_H
31 #define __T4_L2T_H
32 
33 /* identifies sync vs async L2T_WRITE_REQs */
34 #define S_SYNC_WR    12
35 #define V_SYNC_WR(x) ((x) << S_SYNC_WR)
36 #define F_SYNC_WR    V_SYNC_WR(1)
37 
38 enum {
39 	L2T_STATE_VALID,	/* entry is up to date */
40 	L2T_STATE_STALE,	/* entry may be used but needs revalidation */
41 	L2T_STATE_RESOLVING,	/* entry needs address resolution */
42 	L2T_STATE_FAILED,	/* failed to resolve */
43 	L2T_STATE_SYNC_WRITE,	/* synchronous write of entry underway */
44 
45 	/* when state is one of the below the entry is not hashed */
46 	L2T_STATE_SWITCHING,	/* entry is being used by a switching filter */
47 	L2T_STATE_TLS,		/* entry is being used by TLS sessions */
48 	L2T_STATE_UNUSED	/* entry not in use */
49 };
50 
51 /*
52  * Each L2T entry plays multiple roles.  First of all, it keeps state for the
53  * corresponding entry of the HW L2 table and maintains a queue of offload
54  * packets awaiting address resolution.  Second, it is a node of a hash table
55  * chain, where the nodes of the chain are linked together through their next
56  * pointer.  Finally, each node is a bucket of a hash table, pointing to the
57  * first element in its chain through its first pointer.
58  */
59 struct l2t_entry {
60 	uint16_t state;			/* entry state */
61 	uint16_t idx;			/* entry index */
62 	uint32_t addr[4];		/* next hop IP or IPv6 address */
63 	uint32_t iqid;			/* iqid for reply to write_l2e */
64 	struct sge_wrq *wrq;		/* queue to use for write_l2e */
65 	if_t ifp;			/* outgoing interface */
66 	uint16_t smt_idx;		/* SMT index */
67 	uint16_t vlan;			/* VLAN TCI (id: 0-11, prio: 13-15) */
68 	struct l2t_entry *first;	/* start of hash chain */
69 	struct l2t_entry *next;		/* next l2t_entry on chain */
70 	STAILQ_HEAD(, wrqe) wr_list;	/* list of WRs awaiting resolution */
71 	struct mtx lock;
72 	volatile int refcnt;		/* entry reference count */
73 	uint16_t hash;			/* hash bucket the entry is on */
74 	uint8_t ipv6;			/* entry is for an IPv6 address */
75 	uint8_t lport;			/* associated offload logical port */
76 	uint8_t dmac[ETHER_ADDR_LEN];	/* next hop's MAC address */
77 };
78 
79 struct l2t_data {
80 	struct rwlock lock;
81 	u_int l2t_size;
82 	bool l2t_stopped;
83 	volatile int nfree;	/* number of free entries */
84 	struct l2t_entry *rover;/* starting point for next allocation */
85 	struct l2t_entry l2tab[];
86 };
87 
88 
89 int t4_init_l2t(struct adapter *, int);
90 int t4_free_l2t(struct adapter *);
91 int t4_stop_l2t(struct adapter *);
92 int t4_restart_l2t(struct adapter *);
93 struct l2t_entry *t4_alloc_l2e(struct l2t_data *);
94 struct l2t_entry *t4_l2t_alloc_switching(struct adapter *, uint16_t, uint8_t,
95     uint8_t *);
96 struct l2t_entry *t4_l2t_alloc_tls(struct adapter *, struct sge_txq *,
97     void *, int *, uint16_t, uint8_t, uint8_t *);
98 int t4_write_l2e(struct l2t_entry *, int);
99 int do_l2t_write_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
100 
101 static inline void
102 t4_l2t_release(struct l2t_entry *e)
103 {
104 	struct l2t_data *d = __containerof(e, struct l2t_data, l2tab[e->idx]);
105 
106 	if (atomic_fetchadd_int(&e->refcnt, -1) == 1)
107 		atomic_add_int(&d->nfree, 1);
108 }
109 
110 int sysctl_l2t(SYSCTL_HANDLER_ARGS);
111 
112 #endif  /* __T4_L2T_H */
113