1b6d90eb7SKip Macy /**************************************************************************
2*4d846d26SWarner Losh SPDX-License-Identifier: BSD-2-Clause
3b6d90eb7SKip Macy
4f2d8ff04SGeorge V. Neville-Neil Copyright (c) 2007-2009, Chelsio Inc.
5b6d90eb7SKip Macy All rights reserved.
6b6d90eb7SKip Macy
7b6d90eb7SKip Macy Redistribution and use in source and binary forms, with or without
8b6d90eb7SKip Macy modification, are permitted provided that the following conditions are met:
9b6d90eb7SKip Macy
10b6d90eb7SKip Macy 1. Redistributions of source code must retain the above copyright notice,
11b6d90eb7SKip Macy this list of conditions and the following disclaimer.
12b6d90eb7SKip Macy
1310faa568SKip Macy 2. Neither the name of the Chelsio Corporation nor the names of its
14b6d90eb7SKip Macy contributors may be used to endorse or promote products derived from
15b6d90eb7SKip Macy this software without specific prior written permission.
16b6d90eb7SKip Macy
17b6d90eb7SKip Macy THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18b6d90eb7SKip Macy AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19b6d90eb7SKip Macy IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20b6d90eb7SKip Macy ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21b6d90eb7SKip Macy LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22b6d90eb7SKip Macy CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23b6d90eb7SKip Macy SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24b6d90eb7SKip Macy INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25b6d90eb7SKip Macy CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26b6d90eb7SKip Macy ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27b6d90eb7SKip Macy POSSIBILITY OF SUCH DAMAGE.
28b6d90eb7SKip Macy
29b6d90eb7SKip Macy ***************************************************************************/
30b6d90eb7SKip Macy #ifndef __CHELSIO_COMMON_H
31b6d90eb7SKip Macy #define __CHELSIO_COMMON_H
32b6d90eb7SKip Macy
3310faa568SKip Macy #include <cxgb_osdep.h>
34b6d90eb7SKip Macy
35b6d90eb7SKip Macy enum {
36ef72318fSKip Macy MAX_FRAME_SIZE = 10240, /* max MAC frame size, includes header + FCS */
37b6d90eb7SKip Macy EEPROMSIZE = 8192, /* Serial EEPROM size */
385c5df3daSKip Macy SERNUM_LEN = 16, /* Serial # length */
392a1b9f07SGeorge V. Neville-Neil ECNUM_LEN = 16, /* EC # length */
40b6d90eb7SKip Macy RSS_TABLE_SIZE = 64, /* size of RSS lookup and mapping tables */
41b6d90eb7SKip Macy TCB_SIZE = 128, /* TCB size */
42b6d90eb7SKip Macy NMTUS = 16, /* size of MTU table */
43b6d90eb7SKip Macy NCCTRL_WIN = 32, /* # of congestion control windows */
44577e9bbeSKip Macy NTX_SCHED = 8, /* # of HW Tx scheduling queues */
45ef72318fSKip Macy PROTO_SRAM_LINES = 128, /* size of protocol sram */
464af83c8cSKip Macy EXACT_ADDR_FILTERS = 8, /* # of HW exact match filters */
47b6d90eb7SKip Macy };
48b6d90eb7SKip Macy
49ef72318fSKip Macy #define MAX_RX_COALESCING_LEN 12288U
50b6d90eb7SKip Macy
51b6d90eb7SKip Macy enum {
52b6d90eb7SKip Macy PAUSE_RX = 1 << 0,
53b6d90eb7SKip Macy PAUSE_TX = 1 << 1,
54b6d90eb7SKip Macy PAUSE_AUTONEG = 1 << 2
55b6d90eb7SKip Macy };
56b6d90eb7SKip Macy
57b6d90eb7SKip Macy enum {
58c01f2b83SNavdeep Parhar SUPPORTED_LINK_IRQ = 1 << 24,
59c01f2b83SNavdeep Parhar /* skip 25 */
60c01f2b83SNavdeep Parhar SUPPORTED_MISC_IRQ = 1 << 26,
61c01f2b83SNavdeep Parhar SUPPORTED_IRQ = (SUPPORTED_LINK_IRQ | SUPPORTED_MISC_IRQ),
62b6d90eb7SKip Macy };
63b6d90eb7SKip Macy
64b6d90eb7SKip Macy enum { /* adapter interrupt-maintained statistics */
65b6d90eb7SKip Macy STAT_ULP_CH0_PBL_OOB,
66b6d90eb7SKip Macy STAT_ULP_CH1_PBL_OOB,
67b6d90eb7SKip Macy STAT_PCI_CORR_ECC,
68b6d90eb7SKip Macy
69b6d90eb7SKip Macy IRQ_NUM_STATS /* keep last */
70b6d90eb7SKip Macy };
71b6d90eb7SKip Macy
72b6d90eb7SKip Macy enum {
73ef72318fSKip Macy TP_VERSION_MAJOR = 1,
74ac3a6d9cSKip Macy TP_VERSION_MINOR = 1,
75ac3a6d9cSKip Macy TP_VERSION_MICRO = 0
76ef72318fSKip Macy };
77ef72318fSKip Macy
78ef72318fSKip Macy #define S_TP_VERSION_MAJOR 16
79ef72318fSKip Macy #define M_TP_VERSION_MAJOR 0xFF
80ef72318fSKip Macy #define V_TP_VERSION_MAJOR(x) ((x) << S_TP_VERSION_MAJOR)
81ef72318fSKip Macy #define G_TP_VERSION_MAJOR(x) \
82ef72318fSKip Macy (((x) >> S_TP_VERSION_MAJOR) & M_TP_VERSION_MAJOR)
83ef72318fSKip Macy
84ef72318fSKip Macy #define S_TP_VERSION_MINOR 8
85ef72318fSKip Macy #define M_TP_VERSION_MINOR 0xFF
86ef72318fSKip Macy #define V_TP_VERSION_MINOR(x) ((x) << S_TP_VERSION_MINOR)
87ef72318fSKip Macy #define G_TP_VERSION_MINOR(x) \
88ef72318fSKip Macy (((x) >> S_TP_VERSION_MINOR) & M_TP_VERSION_MINOR)
89ef72318fSKip Macy
90ef72318fSKip Macy #define S_TP_VERSION_MICRO 0
91ef72318fSKip Macy #define M_TP_VERSION_MICRO 0xFF
92ef72318fSKip Macy #define V_TP_VERSION_MICRO(x) ((x) << S_TP_VERSION_MICRO)
93ef72318fSKip Macy #define G_TP_VERSION_MICRO(x) \
94ef72318fSKip Macy (((x) >> S_TP_VERSION_MICRO) & M_TP_VERSION_MICRO)
95ef72318fSKip Macy
96ef72318fSKip Macy enum {
97f2d8ff04SGeorge V. Neville-Neil FW_VERSION_MAJOR = 7,
982b3da0fdSNavdeep Parhar FW_VERSION_MINOR = 11,
99577e9bbeSKip Macy FW_VERSION_MICRO = 0
100577e9bbeSKip Macy };
101577e9bbeSKip Macy
102577e9bbeSKip Macy enum {
103f2d8ff04SGeorge V. Neville-Neil LA_CTRL = 0x80,
104f2d8ff04SGeorge V. Neville-Neil LA_DATA = 0x84,
105f2d8ff04SGeorge V. Neville-Neil LA_ENTRIES = 512
106f2d8ff04SGeorge V. Neville-Neil };
107f2d8ff04SGeorge V. Neville-Neil
108f2d8ff04SGeorge V. Neville-Neil enum {
109f2d8ff04SGeorge V. Neville-Neil IOQ_ENTRIES = 7
110f2d8ff04SGeorge V. Neville-Neil };
111f2d8ff04SGeorge V. Neville-Neil
112f2d8ff04SGeorge V. Neville-Neil enum {
113b6d90eb7SKip Macy SGE_QSETS = 8, /* # of SGE Tx/Rx/RspQ sets */
114b6d90eb7SKip Macy SGE_RXQ_PER_SET = 2, /* # of Rx queues per set */
115b6d90eb7SKip Macy SGE_TXQ_PER_SET = 3 /* # of Tx queues per set */
116b6d90eb7SKip Macy };
117b6d90eb7SKip Macy
118b6d90eb7SKip Macy enum sge_context_type { /* SGE egress context types */
119b6d90eb7SKip Macy SGE_CNTXT_RDMA = 0,
120b6d90eb7SKip Macy SGE_CNTXT_ETH = 2,
121b6d90eb7SKip Macy SGE_CNTXT_OFLD = 4,
122b6d90eb7SKip Macy SGE_CNTXT_CTRL = 5
123b6d90eb7SKip Macy };
124b6d90eb7SKip Macy
125b6d90eb7SKip Macy enum {
126b6d90eb7SKip Macy AN_PKT_SIZE = 32, /* async notification packet size */
127b6d90eb7SKip Macy IMMED_PKT_SIZE = 48 /* packet size for immediate data */
128b6d90eb7SKip Macy };
129b6d90eb7SKip Macy
130b6d90eb7SKip Macy struct sg_ent { /* SGE scatter/gather entry */
1314af83c8cSKip Macy __be32 len[2];
1324af83c8cSKip Macy __be64 addr[2];
133b6d90eb7SKip Macy };
134b6d90eb7SKip Macy
135b6d90eb7SKip Macy #ifndef SGE_NUM_GENBITS
136b6d90eb7SKip Macy /* Must be 1 or 2 */
137b6d90eb7SKip Macy # define SGE_NUM_GENBITS 2
138b6d90eb7SKip Macy #endif
139b6d90eb7SKip Macy
140b6d90eb7SKip Macy #define TX_DESC_FLITS 16U
141b6d90eb7SKip Macy #define WR_FLITS (TX_DESC_FLITS + 1 - SGE_NUM_GENBITS)
142b6d90eb7SKip Macy
1439b4de886SKip Macy #define MAX_PHYINTRS 4
1449b4de886SKip Macy
145b6d90eb7SKip Macy struct cphy;
146b6d90eb7SKip Macy
147b6d90eb7SKip Macy struct mdio_ops {
148b6d90eb7SKip Macy int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
149b6d90eb7SKip Macy int reg_addr, unsigned int *val);
150b6d90eb7SKip Macy int (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
151b6d90eb7SKip Macy int reg_addr, unsigned int val);
152b6d90eb7SKip Macy };
153b6d90eb7SKip Macy
154b6d90eb7SKip Macy struct adapter_info {
155ef72318fSKip Macy unsigned char nports0; /* # of ports on channel 0 */
156ef72318fSKip Macy unsigned char nports1; /* # of ports on channel 1 */
157b6d90eb7SKip Macy unsigned char phy_base_addr; /* MDIO PHY base address */
158b6d90eb7SKip Macy unsigned int gpio_out; /* GPIO output settings */
1599b4de886SKip Macy unsigned char gpio_intr[MAX_PHYINTRS]; /* GPIO PHY IRQ pins */
160b6d90eb7SKip Macy unsigned long caps; /* adapter capabilities */
161b6d90eb7SKip Macy const struct mdio_ops *mdio_ops; /* MDIO operations */
162b6d90eb7SKip Macy const char *desc; /* product description */
163b6d90eb7SKip Macy };
164b6d90eb7SKip Macy
165b6d90eb7SKip Macy struct mc5_stats {
166b6d90eb7SKip Macy unsigned long parity_err;
167b6d90eb7SKip Macy unsigned long active_rgn_full;
168b6d90eb7SKip Macy unsigned long nfa_srch_err;
169b6d90eb7SKip Macy unsigned long unknown_cmd;
170b6d90eb7SKip Macy unsigned long reqq_parity_err;
171b6d90eb7SKip Macy unsigned long dispq_parity_err;
172b6d90eb7SKip Macy unsigned long del_act_empty;
173b6d90eb7SKip Macy };
174b6d90eb7SKip Macy
175b6d90eb7SKip Macy struct mc7_stats {
176b6d90eb7SKip Macy unsigned long corr_err;
177b6d90eb7SKip Macy unsigned long uncorr_err;
178b6d90eb7SKip Macy unsigned long parity_err;
179b6d90eb7SKip Macy unsigned long addr_err;
180b6d90eb7SKip Macy };
181b6d90eb7SKip Macy
182b6d90eb7SKip Macy struct mac_stats {
183b6d90eb7SKip Macy u64 tx_octets; /* total # of octets in good frames */
184b6d90eb7SKip Macy u64 tx_octets_bad; /* total # of octets in error frames */
185b6d90eb7SKip Macy u64 tx_frames; /* all good frames */
186b6d90eb7SKip Macy u64 tx_mcast_frames; /* good multicast frames */
187b6d90eb7SKip Macy u64 tx_bcast_frames; /* good broadcast frames */
188b6d90eb7SKip Macy u64 tx_pause; /* # of transmitted pause frames */
189b6d90eb7SKip Macy u64 tx_deferred; /* frames with deferred transmissions */
190b6d90eb7SKip Macy u64 tx_late_collisions; /* # of late collisions */
191b6d90eb7SKip Macy u64 tx_total_collisions; /* # of total collisions */
1926c73ba1aSGordon Bergling u64 tx_excess_collisions; /* frame errors from excessive collisions */
193b6d90eb7SKip Macy u64 tx_underrun; /* # of Tx FIFO underruns */
194b6d90eb7SKip Macy u64 tx_len_errs; /* # of Tx length errors */
195b6d90eb7SKip Macy u64 tx_mac_internal_errs; /* # of internal MAC errors on Tx */
196b6d90eb7SKip Macy u64 tx_excess_deferral; /* # of frames with excessive deferral */
197b6d90eb7SKip Macy u64 tx_fcs_errs; /* # of frames with bad FCS */
198b6d90eb7SKip Macy
199b6d90eb7SKip Macy u64 tx_frames_64; /* # of Tx frames in a particular range */
200b6d90eb7SKip Macy u64 tx_frames_65_127;
201b6d90eb7SKip Macy u64 tx_frames_128_255;
202b6d90eb7SKip Macy u64 tx_frames_256_511;
203b6d90eb7SKip Macy u64 tx_frames_512_1023;
204b6d90eb7SKip Macy u64 tx_frames_1024_1518;
205b6d90eb7SKip Macy u64 tx_frames_1519_max;
206b6d90eb7SKip Macy
207b6d90eb7SKip Macy u64 rx_octets; /* total # of octets in good frames */
208b6d90eb7SKip Macy u64 rx_octets_bad; /* total # of octets in error frames */
209b6d90eb7SKip Macy u64 rx_frames; /* all good frames */
210b6d90eb7SKip Macy u64 rx_mcast_frames; /* good multicast frames */
211b6d90eb7SKip Macy u64 rx_bcast_frames; /* good broadcast frames */
212b6d90eb7SKip Macy u64 rx_pause; /* # of received pause frames */
213b6d90eb7SKip Macy u64 rx_fcs_errs; /* # of received frames with bad FCS */
214b6d90eb7SKip Macy u64 rx_align_errs; /* alignment errors */
215b6d90eb7SKip Macy u64 rx_symbol_errs; /* symbol errors */
216b6d90eb7SKip Macy u64 rx_data_errs; /* data errors */
217b6d90eb7SKip Macy u64 rx_sequence_errs; /* sequence errors */
218b6d90eb7SKip Macy u64 rx_runt; /* # of runt frames */
219b6d90eb7SKip Macy u64 rx_jabber; /* # of jabber frames */
220b6d90eb7SKip Macy u64 rx_short; /* # of short frames */
221b6d90eb7SKip Macy u64 rx_too_long; /* # of oversized frames */
222b6d90eb7SKip Macy u64 rx_mac_internal_errs; /* # of internal MAC errors on Rx */
223b6d90eb7SKip Macy
224b6d90eb7SKip Macy u64 rx_frames_64; /* # of Rx frames in a particular range */
225b6d90eb7SKip Macy u64 rx_frames_65_127;
226b6d90eb7SKip Macy u64 rx_frames_128_255;
227b6d90eb7SKip Macy u64 rx_frames_256_511;
228b6d90eb7SKip Macy u64 rx_frames_512_1023;
229b6d90eb7SKip Macy u64 rx_frames_1024_1518;
230b6d90eb7SKip Macy u64 rx_frames_1519_max;
231b6d90eb7SKip Macy
232b6d90eb7SKip Macy u64 rx_cong_drops; /* # of Rx drops due to SGE congestion */
233b6d90eb7SKip Macy
234b6d90eb7SKip Macy unsigned long tx_fifo_parity_err;
235b6d90eb7SKip Macy unsigned long rx_fifo_parity_err;
236b6d90eb7SKip Macy unsigned long tx_fifo_urun;
237b6d90eb7SKip Macy unsigned long rx_fifo_ovfl;
238b6d90eb7SKip Macy unsigned long serdes_signal_loss;
239b6d90eb7SKip Macy unsigned long xaui_pcs_ctc_err;
240b6d90eb7SKip Macy unsigned long xaui_pcs_align_change;
241577e9bbeSKip Macy
242577e9bbeSKip Macy unsigned long num_toggled; /* # times toggled TxEn due to stuck TX */
243577e9bbeSKip Macy unsigned long num_resets; /* # times reset due to stuck TX */
244f2d8ff04SGeorge V. Neville-Neil
245f2d8ff04SGeorge V. Neville-Neil unsigned long link_faults; /* # detected link faults */
246b6d90eb7SKip Macy };
247b6d90eb7SKip Macy
248b6d90eb7SKip Macy struct tp_mib_stats {
249b6d90eb7SKip Macy u32 ipInReceive_hi;
250b6d90eb7SKip Macy u32 ipInReceive_lo;
251b6d90eb7SKip Macy u32 ipInHdrErrors_hi;
252b6d90eb7SKip Macy u32 ipInHdrErrors_lo;
253b6d90eb7SKip Macy u32 ipInAddrErrors_hi;
254b6d90eb7SKip Macy u32 ipInAddrErrors_lo;
255b6d90eb7SKip Macy u32 ipInUnknownProtos_hi;
256b6d90eb7SKip Macy u32 ipInUnknownProtos_lo;
257b6d90eb7SKip Macy u32 ipInDiscards_hi;
258b6d90eb7SKip Macy u32 ipInDiscards_lo;
259b6d90eb7SKip Macy u32 ipInDelivers_hi;
260b6d90eb7SKip Macy u32 ipInDelivers_lo;
261b6d90eb7SKip Macy u32 ipOutRequests_hi;
262b6d90eb7SKip Macy u32 ipOutRequests_lo;
263b6d90eb7SKip Macy u32 ipOutDiscards_hi;
264b6d90eb7SKip Macy u32 ipOutDiscards_lo;
265b6d90eb7SKip Macy u32 ipOutNoRoutes_hi;
266b6d90eb7SKip Macy u32 ipOutNoRoutes_lo;
267b6d90eb7SKip Macy u32 ipReasmTimeout;
268b6d90eb7SKip Macy u32 ipReasmReqds;
269b6d90eb7SKip Macy u32 ipReasmOKs;
270b6d90eb7SKip Macy u32 ipReasmFails;
271b6d90eb7SKip Macy
272b6d90eb7SKip Macy u32 reserved[8];
273b6d90eb7SKip Macy
274b6d90eb7SKip Macy u32 tcpActiveOpens;
275b6d90eb7SKip Macy u32 tcpPassiveOpens;
276b6d90eb7SKip Macy u32 tcpAttemptFails;
277b6d90eb7SKip Macy u32 tcpEstabResets;
278b6d90eb7SKip Macy u32 tcpOutRsts;
279b6d90eb7SKip Macy u32 tcpCurrEstab;
280b6d90eb7SKip Macy u32 tcpInSegs_hi;
281b6d90eb7SKip Macy u32 tcpInSegs_lo;
282b6d90eb7SKip Macy u32 tcpOutSegs_hi;
283b6d90eb7SKip Macy u32 tcpOutSegs_lo;
284b6d90eb7SKip Macy u32 tcpRetransSeg_hi;
285b6d90eb7SKip Macy u32 tcpRetransSeg_lo;
286b6d90eb7SKip Macy u32 tcpInErrs_hi;
287b6d90eb7SKip Macy u32 tcpInErrs_lo;
288b6d90eb7SKip Macy u32 tcpRtoMin;
289b6d90eb7SKip Macy u32 tcpRtoMax;
290b6d90eb7SKip Macy };
291b6d90eb7SKip Macy
292b6d90eb7SKip Macy struct tp_params {
293b6d90eb7SKip Macy unsigned int nchan; /* # of channels */
294b6d90eb7SKip Macy unsigned int pmrx_size; /* total PMRX capacity */
295b6d90eb7SKip Macy unsigned int pmtx_size; /* total PMTX capacity */
296b6d90eb7SKip Macy unsigned int cm_size; /* total CM capacity */
297b6d90eb7SKip Macy unsigned int chan_rx_size; /* per channel Rx size */
298b6d90eb7SKip Macy unsigned int chan_tx_size; /* per channel Tx size */
299b6d90eb7SKip Macy unsigned int rx_pg_size; /* Rx page size */
300b6d90eb7SKip Macy unsigned int tx_pg_size; /* Tx page size */
301b6d90eb7SKip Macy unsigned int rx_num_pgs; /* # of Rx pages */
302b6d90eb7SKip Macy unsigned int tx_num_pgs; /* # of Tx pages */
303b6d90eb7SKip Macy unsigned int ntimer_qs; /* # of timer queues */
304ef72318fSKip Macy unsigned int tre; /* log2 of core clocks per TP tick */
305577e9bbeSKip Macy unsigned int dack_re; /* DACK timer resolution */
306b6d90eb7SKip Macy };
307b6d90eb7SKip Macy
308b6d90eb7SKip Macy struct qset_params { /* SGE queue set parameters */
309b6d90eb7SKip Macy unsigned int polling; /* polling/interrupt service for rspq */
310ef72318fSKip Macy unsigned int lro; /* large receive offload */
3114af83c8cSKip Macy unsigned int coalesce_usecs; /* irq coalescing timer */
312b6d90eb7SKip Macy unsigned int rspq_size; /* # of entries in response queue */
313b6d90eb7SKip Macy unsigned int fl_size; /* # of entries in regular free list */
314b6d90eb7SKip Macy unsigned int jumbo_size; /* # of entries in jumbo free list */
31597ae3bc3SNavdeep Parhar unsigned int jumbo_buf_size; /* buffer size of jumbo entry */
316b6d90eb7SKip Macy unsigned int txq_size[SGE_TXQ_PER_SET]; /* Tx queue sizes */
317b6d90eb7SKip Macy unsigned int cong_thres; /* FL congestion threshold */
318577e9bbeSKip Macy unsigned int vector; /* Interrupt (line or vector) number */
319b6d90eb7SKip Macy };
320b6d90eb7SKip Macy
321b6d90eb7SKip Macy struct sge_params {
322b6d90eb7SKip Macy unsigned int max_pkt_size; /* max offload pkt size */
323b6d90eb7SKip Macy struct qset_params qset[SGE_QSETS];
324b6d90eb7SKip Macy };
325b6d90eb7SKip Macy
326b6d90eb7SKip Macy struct mc5_params {
327b6d90eb7SKip Macy unsigned int mode; /* selects MC5 width */
328b6d90eb7SKip Macy unsigned int nservers; /* size of server region */
329b6d90eb7SKip Macy unsigned int nfilters; /* size of filter region */
330b6d90eb7SKip Macy unsigned int nroutes; /* size of routing region */
331b6d90eb7SKip Macy };
332b6d90eb7SKip Macy
333b6d90eb7SKip Macy /* Default MC5 region sizes */
334b6d90eb7SKip Macy enum {
335b6d90eb7SKip Macy DEFAULT_NSERVERS = 512,
336b6d90eb7SKip Macy DEFAULT_NFILTERS = 128
337b6d90eb7SKip Macy };
338b6d90eb7SKip Macy
339b6d90eb7SKip Macy /* MC5 modes, these must be non-0 */
340b6d90eb7SKip Macy enum {
341b6d90eb7SKip Macy MC5_MODE_144_BIT = 1,
342b6d90eb7SKip Macy MC5_MODE_72_BIT = 2
343b6d90eb7SKip Macy };
344b6d90eb7SKip Macy
345d722cab4SKip Macy /* MC5 min active region size */
346d722cab4SKip Macy enum { MC5_MIN_TIDS = 16 };
347d722cab4SKip Macy
348b6d90eb7SKip Macy struct vpd_params {
349b6d90eb7SKip Macy unsigned int cclk;
350b6d90eb7SKip Macy unsigned int mclk;
351b6d90eb7SKip Macy unsigned int uclk;
352b6d90eb7SKip Macy unsigned int mdc;
353b6d90eb7SKip Macy unsigned int mem_timing;
3545c5df3daSKip Macy u8 sn[SERNUM_LEN + 1];
3552a1b9f07SGeorge V. Neville-Neil u8 ec[ECNUM_LEN + 1];
356b6d90eb7SKip Macy u8 eth_base[6];
357b6d90eb7SKip Macy u8 port_type[MAX_NPORTS];
358b6d90eb7SKip Macy unsigned short xauicfg[2];
359b6d90eb7SKip Macy };
360b6d90eb7SKip Macy
361f2d8ff04SGeorge V. Neville-Neil struct generic_vpd {
362f2d8ff04SGeorge V. Neville-Neil u32 offset;
363f2d8ff04SGeorge V. Neville-Neil u32 len;
364f2d8ff04SGeorge V. Neville-Neil u8 *data;
365f2d8ff04SGeorge V. Neville-Neil };
366f2d8ff04SGeorge V. Neville-Neil
367f2d8ff04SGeorge V. Neville-Neil enum { MAX_VPD_BYTES = 32000 };
368f2d8ff04SGeorge V. Neville-Neil
369b6d90eb7SKip Macy struct pci_params {
370b6d90eb7SKip Macy unsigned int vpd_cap_addr;
371b6d90eb7SKip Macy unsigned int pcie_cap_addr;
372b6d90eb7SKip Macy unsigned short speed;
373b6d90eb7SKip Macy unsigned char width;
374b6d90eb7SKip Macy unsigned char variant;
375b6d90eb7SKip Macy };
376b6d90eb7SKip Macy
377b6d90eb7SKip Macy enum {
378b6d90eb7SKip Macy PCI_VARIANT_PCI,
379b6d90eb7SKip Macy PCI_VARIANT_PCIX_MODE1_PARITY,
380b6d90eb7SKip Macy PCI_VARIANT_PCIX_MODE1_ECC,
381b6d90eb7SKip Macy PCI_VARIANT_PCIX_266_MODE2,
382b6d90eb7SKip Macy PCI_VARIANT_PCIE
383b6d90eb7SKip Macy };
384b6d90eb7SKip Macy
385b6d90eb7SKip Macy struct adapter_params {
386b6d90eb7SKip Macy struct sge_params sge;
387b6d90eb7SKip Macy struct mc5_params mc5;
388b6d90eb7SKip Macy struct tp_params tp;
389b6d90eb7SKip Macy struct vpd_params vpd;
390b6d90eb7SKip Macy struct pci_params pci;
391b6d90eb7SKip Macy
392b6d90eb7SKip Macy const struct adapter_info *info;
393b6d90eb7SKip Macy
394b6d90eb7SKip Macy unsigned short mtus[NMTUS];
395b6d90eb7SKip Macy unsigned short a_wnd[NCCTRL_WIN];
396b6d90eb7SKip Macy unsigned short b_wnd[NCCTRL_WIN];
397b6d90eb7SKip Macy unsigned int nports; /* # of ethernet ports */
398ef72318fSKip Macy unsigned int chan_map; /* bitmap of in-use Tx channels */
399b6d90eb7SKip Macy unsigned int stats_update_period; /* MAC stats accumulation period */
400b6d90eb7SKip Macy unsigned int linkpoll_period; /* link poll period in 0.1s */
401b6d90eb7SKip Macy unsigned int rev; /* chip revision */
402d722cab4SKip Macy unsigned int offload;
403b6d90eb7SKip Macy };
404b6d90eb7SKip Macy
405577e9bbeSKip Macy enum { /* chip revisions */
406577e9bbeSKip Macy T3_REV_A = 0,
407577e9bbeSKip Macy T3_REV_B = 2,
408577e9bbeSKip Macy T3_REV_B2 = 3,
409ac3a6d9cSKip Macy T3_REV_C = 4,
410577e9bbeSKip Macy };
411577e9bbeSKip Macy
412b6d90eb7SKip Macy struct trace_params {
413b6d90eb7SKip Macy u32 sip;
414b6d90eb7SKip Macy u32 sip_mask;
415b6d90eb7SKip Macy u32 dip;
416b6d90eb7SKip Macy u32 dip_mask;
417b6d90eb7SKip Macy u16 sport;
418b6d90eb7SKip Macy u16 sport_mask;
419b6d90eb7SKip Macy u16 dport;
420b6d90eb7SKip Macy u16 dport_mask;
421b6d90eb7SKip Macy u32 vlan:12;
422b6d90eb7SKip Macy u32 vlan_mask:12;
423b6d90eb7SKip Macy u32 intf:4;
424b6d90eb7SKip Macy u32 intf_mask:4;
425b6d90eb7SKip Macy u8 proto;
426b6d90eb7SKip Macy u8 proto_mask;
427b6d90eb7SKip Macy };
428b6d90eb7SKip Macy
429b6d90eb7SKip Macy struct link_config {
430b6d90eb7SKip Macy unsigned int supported; /* link capabilities */
431b6d90eb7SKip Macy unsigned int advertising; /* advertised capabilities */
432b6d90eb7SKip Macy unsigned short requested_speed; /* speed user has requested */
433b6d90eb7SKip Macy unsigned short speed; /* actual link speed */
434b6d90eb7SKip Macy unsigned char requested_duplex; /* duplex user has requested */
435b6d90eb7SKip Macy unsigned char duplex; /* actual link duplex */
436b6d90eb7SKip Macy unsigned char requested_fc; /* flow control user has requested */
437b6d90eb7SKip Macy unsigned char fc; /* actual link flow control */
438b6d90eb7SKip Macy unsigned char autoneg; /* autonegotiating? */
439b6d90eb7SKip Macy unsigned int link_ok; /* link up? */
440b6d90eb7SKip Macy };
441b6d90eb7SKip Macy
442b6d90eb7SKip Macy #define SPEED_INVALID 0xffff
443b6d90eb7SKip Macy #define DUPLEX_INVALID 0xff
444b6d90eb7SKip Macy
445b6d90eb7SKip Macy struct mc5 {
446b6d90eb7SKip Macy adapter_t *adapter;
447b6d90eb7SKip Macy unsigned int tcam_size;
448b6d90eb7SKip Macy unsigned char part_type;
449b6d90eb7SKip Macy unsigned char parity_enabled;
450b6d90eb7SKip Macy unsigned char mode;
451b6d90eb7SKip Macy struct mc5_stats stats;
452b6d90eb7SKip Macy };
453b6d90eb7SKip Macy
t3_mc5_size(const struct mc5 * p)454b6d90eb7SKip Macy static inline unsigned int t3_mc5_size(const struct mc5 *p)
455b6d90eb7SKip Macy {
456b6d90eb7SKip Macy return p->tcam_size;
457b6d90eb7SKip Macy }
458b6d90eb7SKip Macy
459b6d90eb7SKip Macy struct mc7 {
460b6d90eb7SKip Macy adapter_t *adapter; /* backpointer to adapter */
461b6d90eb7SKip Macy unsigned int size; /* memory size in bytes */
462b6d90eb7SKip Macy unsigned int width; /* MC7 interface width */
463b6d90eb7SKip Macy unsigned int offset; /* register address offset for MC7 instance */
464b6d90eb7SKip Macy const char *name; /* name of MC7 instance */
465b6d90eb7SKip Macy struct mc7_stats stats; /* MC7 statistics */
466b6d90eb7SKip Macy };
467b6d90eb7SKip Macy
t3_mc7_size(const struct mc7 * p)468b6d90eb7SKip Macy static inline unsigned int t3_mc7_size(const struct mc7 *p)
469b6d90eb7SKip Macy {
470b6d90eb7SKip Macy return p->size;
471b6d90eb7SKip Macy }
472b6d90eb7SKip Macy
473b6d90eb7SKip Macy struct cmac {
474b6d90eb7SKip Macy adapter_t *adapter;
475b6d90eb7SKip Macy unsigned int offset;
476ef72318fSKip Macy unsigned char nucast; /* # of address filters for unicast MACs */
477ef72318fSKip Macy unsigned char multiport; /* multiple ports connected to this MAC */
478ef72318fSKip Macy unsigned char ext_port; /* external MAC port */
479ef72318fSKip Macy unsigned char promisc_map; /* which external ports are promiscuous */
480d722cab4SKip Macy unsigned int tx_tcnt;
481d722cab4SKip Macy unsigned int tx_xcnt;
482d722cab4SKip Macy u64 tx_mcnt;
483d722cab4SKip Macy unsigned int rx_xcnt;
484ac3a6d9cSKip Macy unsigned int rx_ocnt;
485d722cab4SKip Macy u64 rx_mcnt;
486577e9bbeSKip Macy unsigned int toggle_cnt;
487577e9bbeSKip Macy unsigned int txen;
488c01f2b83SNavdeep Parhar unsigned int was_reset;
4895c5df3daSKip Macy u64 rx_pause;
490b6d90eb7SKip Macy struct mac_stats stats;
491b6d90eb7SKip Macy };
492b6d90eb7SKip Macy
493b6d90eb7SKip Macy enum {
494b6d90eb7SKip Macy MAC_DIRECTION_RX = 1,
495b6d90eb7SKip Macy MAC_DIRECTION_TX = 2,
496b6d90eb7SKip Macy MAC_RXFIFO_SIZE = 32768
497b6d90eb7SKip Macy };
498b6d90eb7SKip Macy
4994af83c8cSKip Macy /* IEEE 802.3 specified MDIO devices */
500b6d90eb7SKip Macy enum {
501b6d90eb7SKip Macy MDIO_DEV_PMA_PMD = 1,
502b6d90eb7SKip Macy MDIO_DEV_WIS = 2,
503b6d90eb7SKip Macy MDIO_DEV_PCS = 3,
5044af83c8cSKip Macy MDIO_DEV_XGXS = 4,
5054af83c8cSKip Macy MDIO_DEV_ANEG = 7,
5064af83c8cSKip Macy MDIO_DEV_VEND1 = 30,
5074af83c8cSKip Macy MDIO_DEV_VEND2 = 31
5084af83c8cSKip Macy };
5094af83c8cSKip Macy
5104af83c8cSKip Macy /* LASI control and status registers */
5114af83c8cSKip Macy enum {
5124af83c8cSKip Macy RX_ALARM_CTRL = 0x9000,
5134af83c8cSKip Macy TX_ALARM_CTRL = 0x9001,
5144af83c8cSKip Macy LASI_CTRL = 0x9002,
5154af83c8cSKip Macy RX_ALARM_STAT = 0x9003,
5164af83c8cSKip Macy TX_ALARM_STAT = 0x9004,
5174af83c8cSKip Macy LASI_STAT = 0x9005
518b6d90eb7SKip Macy };
519b6d90eb7SKip Macy
520b6d90eb7SKip Macy /* PHY loopback direction */
521b6d90eb7SKip Macy enum {
522b6d90eb7SKip Macy PHY_LOOPBACK_TX = 1,
523b6d90eb7SKip Macy PHY_LOOPBACK_RX = 2
524b6d90eb7SKip Macy };
525b6d90eb7SKip Macy
526b6d90eb7SKip Macy /* PHY interrupt types */
527b6d90eb7SKip Macy enum {
528b6d90eb7SKip Macy cphy_cause_link_change = 1,
5299b4de886SKip Macy cphy_cause_fifo_error = 2,
5309b4de886SKip Macy cphy_cause_module_change = 4,
531c01f2b83SNavdeep Parhar cphy_cause_alarm = 8,
5329b4de886SKip Macy };
5339b4de886SKip Macy
5349b4de886SKip Macy /* PHY module types */
5359b4de886SKip Macy enum {
5369b4de886SKip Macy phy_modtype_none,
5379b4de886SKip Macy phy_modtype_sr,
5389b4de886SKip Macy phy_modtype_lr,
5399b4de886SKip Macy phy_modtype_lrm,
5409b4de886SKip Macy phy_modtype_twinax,
5419b4de886SKip Macy phy_modtype_twinax_long,
5429b4de886SKip Macy phy_modtype_unknown
543b6d90eb7SKip Macy };
544b6d90eb7SKip Macy
545a5eb009bSNavdeep Parhar enum {
546a5eb009bSNavdeep Parhar PHY_LINK_DOWN = 0,
547a5eb009bSNavdeep Parhar PHY_LINK_UP,
548a5eb009bSNavdeep Parhar PHY_LINK_PARTIAL
549a5eb009bSNavdeep Parhar };
550a5eb009bSNavdeep Parhar
551b6d90eb7SKip Macy /* PHY operations */
552b6d90eb7SKip Macy struct cphy_ops {
553b6d90eb7SKip Macy int (*reset)(struct cphy *phy, int wait);
554b6d90eb7SKip Macy
555b6d90eb7SKip Macy int (*intr_enable)(struct cphy *phy);
556b6d90eb7SKip Macy int (*intr_disable)(struct cphy *phy);
557b6d90eb7SKip Macy int (*intr_clear)(struct cphy *phy);
558b6d90eb7SKip Macy int (*intr_handler)(struct cphy *phy);
559b6d90eb7SKip Macy
560b6d90eb7SKip Macy int (*autoneg_enable)(struct cphy *phy);
561b6d90eb7SKip Macy int (*autoneg_restart)(struct cphy *phy);
562b6d90eb7SKip Macy
563b6d90eb7SKip Macy int (*advertise)(struct cphy *phy, unsigned int advertise_map);
564b6d90eb7SKip Macy int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
565b6d90eb7SKip Macy int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
566a5eb009bSNavdeep Parhar int (*get_link_status)(struct cphy *phy, int *link_state, int *speed,
567b6d90eb7SKip Macy int *duplex, int *fc);
568b6d90eb7SKip Macy int (*power_down)(struct cphy *phy, int enable);
569b6d90eb7SKip Macy };
570b6d90eb7SKip Macy
571b6d90eb7SKip Macy /* A PHY instance */
572b6d90eb7SKip Macy struct cphy {
5739b4de886SKip Macy u8 addr; /* PHY address */
5749b4de886SKip Macy u8 modtype; /* PHY module type */
575a5eb009bSNavdeep Parhar u8 rst;
576c01f2b83SNavdeep Parhar unsigned int priv; /* scratch pad */
5778e10660fSKip Macy unsigned int caps; /* PHY capabilities */
578b6d90eb7SKip Macy adapter_t *adapter; /* associated adapter */
579c01f2b83SNavdeep Parhar pinfo_t *pinfo; /* associated port */
5808e10660fSKip Macy const char *desc; /* PHY description */
581b6d90eb7SKip Macy unsigned long fifo_errors; /* FIFO over/under-flows */
582b6d90eb7SKip Macy const struct cphy_ops *ops; /* PHY operations */
583b6d90eb7SKip Macy int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
584b6d90eb7SKip Macy int reg_addr, unsigned int *val);
585b6d90eb7SKip Macy int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
586b6d90eb7SKip Macy int reg_addr, unsigned int val);
587b6d90eb7SKip Macy };
588b6d90eb7SKip Macy
589b6d90eb7SKip Macy /* Convenience MDIO read/write wrappers */
mdio_read(struct cphy * phy,int mmd,int reg,unsigned int * valp)590b6d90eb7SKip Macy static inline int mdio_read(struct cphy *phy, int mmd, int reg,
591b6d90eb7SKip Macy unsigned int *valp)
592b6d90eb7SKip Macy {
593b6d90eb7SKip Macy return phy->mdio_read(phy->adapter, phy->addr, mmd, reg, valp);
594b6d90eb7SKip Macy }
595b6d90eb7SKip Macy
mdio_write(struct cphy * phy,int mmd,int reg,unsigned int val)596b6d90eb7SKip Macy static inline int mdio_write(struct cphy *phy, int mmd, int reg,
597b6d90eb7SKip Macy unsigned int val)
598b6d90eb7SKip Macy {
599b6d90eb7SKip Macy return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val);
600b6d90eb7SKip Macy }
601b6d90eb7SKip Macy
602b6d90eb7SKip Macy /* Convenience initializer */
cphy_init(struct cphy * phy,adapter_t * adapter,pinfo_t * pinfo,int phy_addr,struct cphy_ops * phy_ops,const struct mdio_ops * mdio_ops,unsigned int caps,const char * desc)603c01f2b83SNavdeep Parhar static inline void cphy_init(struct cphy *phy, adapter_t *adapter, pinfo_t *pinfo,
604b6d90eb7SKip Macy int phy_addr, struct cphy_ops *phy_ops,
6058e10660fSKip Macy const struct mdio_ops *mdio_ops, unsigned int caps,
6068e10660fSKip Macy const char *desc)
607b6d90eb7SKip Macy {
6089b4de886SKip Macy phy->addr = (u8)phy_addr;
6098e10660fSKip Macy phy->caps = caps;
6109b4de886SKip Macy phy->adapter = adapter;
611c01f2b83SNavdeep Parhar phy->pinfo = pinfo;
6128e10660fSKip Macy phy->desc = desc;
613b6d90eb7SKip Macy phy->ops = phy_ops;
614b6d90eb7SKip Macy if (mdio_ops) {
615b6d90eb7SKip Macy phy->mdio_read = mdio_ops->read;
616b6d90eb7SKip Macy phy->mdio_write = mdio_ops->write;
617b6d90eb7SKip Macy }
618b6d90eb7SKip Macy }
619b6d90eb7SKip Macy
620b6d90eb7SKip Macy /* Accumulate MAC statistics every 180 seconds. For 1G we multiply by 10. */
621b6d90eb7SKip Macy #define MAC_STATS_ACCUM_SECS 180
622b6d90eb7SKip Macy
623ac3a6d9cSKip Macy /* The external MAC needs accumulation every 30 seconds */
624ac3a6d9cSKip Macy #define VSC_STATS_ACCUM_SECS 30
625ac3a6d9cSKip Macy
626b6d90eb7SKip Macy #define XGM_REG(reg_addr, idx) \
627b6d90eb7SKip Macy ((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
628b6d90eb7SKip Macy
629b6d90eb7SKip Macy struct addr_val_pair {
630b6d90eb7SKip Macy unsigned int reg_addr;
631b6d90eb7SKip Macy unsigned int val;
632b6d90eb7SKip Macy };
633b6d90eb7SKip Macy
63410faa568SKip Macy #include <cxgb_adapter.h>
635b6d90eb7SKip Macy
636b6d90eb7SKip Macy #ifndef PCI_VENDOR_ID_CHELSIO
637b6d90eb7SKip Macy # define PCI_VENDOR_ID_CHELSIO 0x1425
638b6d90eb7SKip Macy #endif
639b6d90eb7SKip Macy
640b6d90eb7SKip Macy #define for_each_port(adapter, iter) \
641b6d90eb7SKip Macy for (iter = 0; iter < (adapter)->params.nports; ++iter)
642b6d90eb7SKip Macy
643b6d90eb7SKip Macy #define adapter_info(adap) ((adap)->params.info)
644b6d90eb7SKip Macy
uses_xaui(const adapter_t * adap)645b6d90eb7SKip Macy static inline int uses_xaui(const adapter_t *adap)
646b6d90eb7SKip Macy {
647b6d90eb7SKip Macy return adapter_info(adap)->caps & SUPPORTED_AUI;
648b6d90eb7SKip Macy }
649b6d90eb7SKip Macy
is_10G(const adapter_t * adap)650b6d90eb7SKip Macy static inline int is_10G(const adapter_t *adap)
651b6d90eb7SKip Macy {
652b6d90eb7SKip Macy return adapter_info(adap)->caps & SUPPORTED_10000baseT_Full;
653b6d90eb7SKip Macy }
654b6d90eb7SKip Macy
is_offload(const adapter_t * adap)655b6d90eb7SKip Macy static inline int is_offload(const adapter_t *adap)
656b6d90eb7SKip Macy {
657d722cab4SKip Macy return adap->params.offload;
658b6d90eb7SKip Macy }
659b6d90eb7SKip Macy
core_ticks_per_usec(const adapter_t * adap)660b6d90eb7SKip Macy static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
661b6d90eb7SKip Macy {
662b6d90eb7SKip Macy return adap->params.vpd.cclk / 1000;
663b6d90eb7SKip Macy }
664b6d90eb7SKip Macy
dack_ticks_to_usec(const adapter_t * adap,unsigned int ticks)665577e9bbeSKip Macy static inline unsigned int dack_ticks_to_usec(const adapter_t *adap,
666577e9bbeSKip Macy unsigned int ticks)
667577e9bbeSKip Macy {
668577e9bbeSKip Macy return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
669577e9bbeSKip Macy }
670577e9bbeSKip Macy
is_pcie(const adapter_t * adap)671b6d90eb7SKip Macy static inline unsigned int is_pcie(const adapter_t *adap)
672b6d90eb7SKip Macy {
673b6d90eb7SKip Macy return adap->params.pci.variant == PCI_VARIANT_PCIE;
674b6d90eb7SKip Macy }
675b6d90eb7SKip Macy
676b6d90eb7SKip Macy void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
677b6d90eb7SKip Macy void t3_write_regs(adapter_t *adapter, const struct addr_val_pair *p, int n,
678b6d90eb7SKip Macy unsigned int offset);
679b6d90eb7SKip Macy int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
680b6d90eb7SKip Macy int attempts, int delay, u32 *valp);
681b6d90eb7SKip Macy
t3_wait_op_done(adapter_t * adapter,int reg,u32 mask,int polarity,int attempts,int delay)682b6d90eb7SKip Macy static inline int t3_wait_op_done(adapter_t *adapter, int reg, u32 mask,
683b6d90eb7SKip Macy int polarity, int attempts, int delay)
684b6d90eb7SKip Macy {
685b6d90eb7SKip Macy return t3_wait_op_done_val(adapter, reg, mask, polarity, attempts,
686b6d90eb7SKip Macy delay, NULL);
687b6d90eb7SKip Macy }
688b6d90eb7SKip Macy
689b6d90eb7SKip Macy int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
690b6d90eb7SKip Macy unsigned int set);
691b6d90eb7SKip Macy int t3_phy_reset(struct cphy *phy, int mmd, int wait);
692b6d90eb7SKip Macy int t3_phy_advertise(struct cphy *phy, unsigned int advert);
6934af83c8cSKip Macy int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert);
694b6d90eb7SKip Macy int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
6954af83c8cSKip Macy int t3_phy_lasi_intr_enable(struct cphy *phy);
6964af83c8cSKip Macy int t3_phy_lasi_intr_disable(struct cphy *phy);
6974af83c8cSKip Macy int t3_phy_lasi_intr_clear(struct cphy *phy);
6984af83c8cSKip Macy int t3_phy_lasi_intr_handler(struct cphy *phy);
699b6d90eb7SKip Macy
700b6d90eb7SKip Macy void t3_intr_enable(adapter_t *adapter);
701b6d90eb7SKip Macy void t3_intr_disable(adapter_t *adapter);
702b6d90eb7SKip Macy void t3_intr_clear(adapter_t *adapter);
703f2d8ff04SGeorge V. Neville-Neil void t3_xgm_intr_enable(adapter_t *adapter, int idx);
704f2d8ff04SGeorge V. Neville-Neil void t3_xgm_intr_disable(adapter_t *adapter, int idx);
705b6d90eb7SKip Macy void t3_port_intr_enable(adapter_t *adapter, int idx);
706b6d90eb7SKip Macy void t3_port_intr_disable(adapter_t *adapter, int idx);
707b6d90eb7SKip Macy void t3_port_intr_clear(adapter_t *adapter, int idx);
708b6d90eb7SKip Macy int t3_slow_intr_handler(adapter_t *adapter);
709b6d90eb7SKip Macy
710b6d90eb7SKip Macy void t3_link_changed(adapter_t *adapter, int port_id);
711b6d90eb7SKip Macy int t3_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
712b6d90eb7SKip Macy const struct adapter_info *t3_get_adapter_info(unsigned int board_id);
713b6d90eb7SKip Macy int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
714b6d90eb7SKip Macy int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data);
715b6d90eb7SKip Macy int t3_seeprom_wp(adapter_t *adapter, int enable);
716f2d8ff04SGeorge V. Neville-Neil int t3_get_vpd_len(adapter_t *adapter, struct generic_vpd *vpd);
717f2d8ff04SGeorge V. Neville-Neil int t3_read_vpd(adapter_t *adapter, struct generic_vpd *vpd);
718b6d90eb7SKip Macy int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
719b6d90eb7SKip Macy u32 *data, int byte_oriented);
720ac3a6d9cSKip Macy int t3_get_tp_version(adapter_t *adapter, u32 *vers);
721f2d8ff04SGeorge V. Neville-Neil int t3_check_tpsram_version(adapter_t *adapter);
722ac3a6d9cSKip Macy int t3_check_tpsram(adapter_t *adapter, const u8 *tp_ram, unsigned int size);
7234af83c8cSKip Macy int t3_load_fw(adapter_t *adapter, const u8 *fw_data, unsigned int size);
724b6d90eb7SKip Macy int t3_get_fw_version(adapter_t *adapter, u32 *vers);
725f2d8ff04SGeorge V. Neville-Neil int t3_check_fw_version(adapter_t *adapter);
7264af83c8cSKip Macy int t3_load_boot(adapter_t *adapter, u8 *fw_data, unsigned int size);
727b6d90eb7SKip Macy int t3_init_hw(adapter_t *adapter, u32 fw_params);
728b6d90eb7SKip Macy void mac_prep(struct cmac *mac, adapter_t *adapter, int index);
729b6d90eb7SKip Macy void early_hw_init(adapter_t *adapter, const struct adapter_info *ai);
730f2d8ff04SGeorge V. Neville-Neil int t3_reset_adapter(adapter_t *adapter);
731b6d90eb7SKip Macy int t3_prep_adapter(adapter_t *adapter, const struct adapter_info *ai, int reset);
7329b4de886SKip Macy int t3_reinit_adapter(adapter_t *adap);
733b6d90eb7SKip Macy void t3_led_ready(adapter_t *adapter);
734b6d90eb7SKip Macy void t3_fatal_err(adapter_t *adapter);
735b6d90eb7SKip Macy void t3_set_vlan_accel(adapter_t *adapter, unsigned int ports, int on);
736ac3a6d9cSKip Macy void t3_enable_filters(adapter_t *adap);
737f2d8ff04SGeorge V. Neville-Neil void t3_disable_filters(adapter_t *adap);
7384af83c8cSKip Macy void t3_tp_set_offload_mode(adapter_t *adap, int enable);
739b6d90eb7SKip Macy void t3_config_rss(adapter_t *adapter, unsigned int rss_config, const u8 *cpus,
740b6d90eb7SKip Macy const u16 *rspq);
741b6d90eb7SKip Macy int t3_read_rss(adapter_t *adapter, u8 *lkup, u16 *map);
742ac3a6d9cSKip Macy int t3_set_proto_sram(adapter_t *adap, const u8 *data);
743b6d90eb7SKip Macy int t3_mps_set_active_ports(adapter_t *adap, unsigned int port_mask);
744b6d90eb7SKip Macy void t3_port_failover(adapter_t *adapter, int port);
745b6d90eb7SKip Macy void t3_failover_done(adapter_t *adapter, int port);
746b6d90eb7SKip Macy void t3_failover_clear(adapter_t *adapter);
747b6d90eb7SKip Macy int t3_cim_ctl_blk_read(adapter_t *adap, unsigned int addr, unsigned int n,
748b6d90eb7SKip Macy unsigned int *valp);
749b6d90eb7SKip Macy int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
750b6d90eb7SKip Macy u64 *buf);
751b6d90eb7SKip Macy
752c01f2b83SNavdeep Parhar int t3_mac_init(struct cmac *mac);
753b6d90eb7SKip Macy void t3b_pcs_reset(struct cmac *mac);
7543dd6d757SNavdeep Parhar void t3c_pcs_force_los(struct cmac *mac);
755f2d8ff04SGeorge V. Neville-Neil void t3_mac_disable_exact_filters(struct cmac *mac);
756f2d8ff04SGeorge V. Neville-Neil void t3_mac_enable_exact_filters(struct cmac *mac);
757b6d90eb7SKip Macy int t3_mac_enable(struct cmac *mac, int which);
758b6d90eb7SKip Macy int t3_mac_disable(struct cmac *mac, int which);
759b6d90eb7SKip Macy int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu);
760b6d90eb7SKip Macy int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm);
761b6d90eb7SKip Macy int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6]);
762ef72318fSKip Macy int t3_mac_set_num_ucast(struct cmac *mac, unsigned char n);
763b6d90eb7SKip Macy const struct mac_stats *t3_mac_update_stats(struct cmac *mac);
764b6d90eb7SKip Macy int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex,
765b6d90eb7SKip Macy int fc);
766577e9bbeSKip Macy int t3b2_mac_watchdog_task(struct cmac *mac);
767b6d90eb7SKip Macy
768b6d90eb7SKip Macy void t3_mc5_prep(adapter_t *adapter, struct mc5 *mc5, int mode);
769b6d90eb7SKip Macy int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
770b6d90eb7SKip Macy unsigned int nroutes);
771b6d90eb7SKip Macy void t3_mc5_intr_handler(struct mc5 *mc5);
772b6d90eb7SKip Macy int t3_read_mc5_range(const struct mc5 *mc5, unsigned int start, unsigned int n,
773b6d90eb7SKip Macy u32 *buf);
774b6d90eb7SKip Macy
775b6d90eb7SKip Macy int t3_tp_set_coalescing_size(adapter_t *adap, unsigned int size, int psh);
776b6d90eb7SKip Macy void t3_tp_set_max_rxsize(adapter_t *adap, unsigned int size);
777b6d90eb7SKip Macy void t3_tp_get_mib_stats(adapter_t *adap, struct tp_mib_stats *tps);
778b6d90eb7SKip Macy void t3_load_mtus(adapter_t *adap, unsigned short mtus[NMTUS],
779b6d90eb7SKip Macy unsigned short alpha[NCCTRL_WIN],
780b6d90eb7SKip Macy unsigned short beta[NCCTRL_WIN], unsigned short mtu_cap);
781b6d90eb7SKip Macy void t3_read_hw_mtus(adapter_t *adap, unsigned short mtus[NMTUS]);
782b6d90eb7SKip Macy void t3_get_cong_cntl_tab(adapter_t *adap,
783b6d90eb7SKip Macy unsigned short incr[NMTUS][NCCTRL_WIN]);
784b6d90eb7SKip Macy void t3_config_trace_filter(adapter_t *adapter, const struct trace_params *tp,
785b6d90eb7SKip Macy int filter_index, int invert, int enable);
786f2d8ff04SGeorge V. Neville-Neil void t3_query_trace_filter(adapter_t *adapter, struct trace_params *tp,
787f2d8ff04SGeorge V. Neville-Neil int filter_index, int *inverted, int *enabled);
788b6d90eb7SKip Macy int t3_config_sched(adapter_t *adap, unsigned int kbps, int sched);
789577e9bbeSKip Macy int t3_set_sched_ipg(adapter_t *adap, int sched, unsigned int ipg);
790577e9bbeSKip Macy void t3_get_tx_sched(adapter_t *adap, unsigned int sched, unsigned int *kbps,
791577e9bbeSKip Macy unsigned int *ipg);
792577e9bbeSKip Macy void t3_read_pace_tbl(adapter_t *adap, unsigned int pace_vals[NTX_SCHED]);
793577e9bbeSKip Macy void t3_set_pace_tbl(adapter_t *adap, unsigned int *pace_vals,
794577e9bbeSKip Macy unsigned int start, unsigned int n);
795b6d90eb7SKip Macy
796f2d8ff04SGeorge V. Neville-Neil int t3_get_up_la(adapter_t *adapter, u32 *stopped, u32 *index,
797f2d8ff04SGeorge V. Neville-Neil u32 *size, void *data);
798f2d8ff04SGeorge V. Neville-Neil int t3_get_up_ioqs(adapter_t *adapter, u32 *size, void *data);
799f2d8ff04SGeorge V. Neville-Neil
800b6d90eb7SKip Macy void t3_sge_prep(adapter_t *adap, struct sge_params *p);
801b6d90eb7SKip Macy void t3_sge_init(adapter_t *adap, struct sge_params *p);
802b6d90eb7SKip Macy int t3_sge_init_ecntxt(adapter_t *adapter, unsigned int id, int gts_enable,
803b6d90eb7SKip Macy enum sge_context_type type, int respq, u64 base_addr,
804b6d90eb7SKip Macy unsigned int size, unsigned int token, int gen,
805b6d90eb7SKip Macy unsigned int cidx);
806b6d90eb7SKip Macy int t3_sge_init_flcntxt(adapter_t *adapter, unsigned int id, int gts_enable,
807b6d90eb7SKip Macy u64 base_addr, unsigned int size, unsigned int esize,
808b6d90eb7SKip Macy unsigned int cong_thres, int gen, unsigned int cidx);
809b6d90eb7SKip Macy int t3_sge_init_rspcntxt(adapter_t *adapter, unsigned int id, int irq_vec_idx,
810b6d90eb7SKip Macy u64 base_addr, unsigned int size,
811b6d90eb7SKip Macy unsigned int fl_thres, int gen, unsigned int cidx);
812b6d90eb7SKip Macy int t3_sge_init_cqcntxt(adapter_t *adapter, unsigned int id, u64 base_addr,
813b6d90eb7SKip Macy unsigned int size, int rspq, int ovfl_mode,
814b6d90eb7SKip Macy unsigned int credits, unsigned int credit_thres);
815b6d90eb7SKip Macy int t3_sge_enable_ecntxt(adapter_t *adapter, unsigned int id, int enable);
816b6d90eb7SKip Macy int t3_sge_disable_fl(adapter_t *adapter, unsigned int id);
817b6d90eb7SKip Macy int t3_sge_disable_rspcntxt(adapter_t *adapter, unsigned int id);
818b6d90eb7SKip Macy int t3_sge_disable_cqcntxt(adapter_t *adapter, unsigned int id);
819b6d90eb7SKip Macy int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4]);
820b6d90eb7SKip Macy int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4]);
821b6d90eb7SKip Macy int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4]);
822b6d90eb7SKip Macy int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
823b6d90eb7SKip Macy int t3_sge_cqcntxt_op(adapter_t *adapter, unsigned int id, unsigned int op,
824b6d90eb7SKip Macy unsigned int credits);
825b6d90eb7SKip Macy
826ef72318fSKip Macy int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n);
827ef72318fSKip Macy int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
828ef72318fSKip Macy int t3_vsc7323_init(adapter_t *adap, int nports);
829ef72318fSKip Macy int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port);
830ef72318fSKip Macy int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port);
831ac3a6d9cSKip Macy int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port);
832ef72318fSKip Macy int t3_vsc7323_enable(adapter_t *adap, int port, int which);
833ef72318fSKip Macy int t3_vsc7323_disable(adapter_t *adap, int port, int which);
834ef72318fSKip Macy const struct mac_stats *t3_vsc7323_update_stats(struct cmac *mac);
835ef72318fSKip Macy
836c01f2b83SNavdeep Parhar int t3_i2c_read8(adapter_t *adapter, int chained, u8 *valp);
837c01f2b83SNavdeep Parhar int t3_i2c_write8(adapter_t *adapter, int chained, u8 val);
838c01f2b83SNavdeep Parhar
839f2d8ff04SGeorge V. Neville-Neil int t3_mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
840f2d8ff04SGeorge V. Neville-Neil unsigned int *valp);
841f2d8ff04SGeorge V. Neville-Neil int t3_mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
842f2d8ff04SGeorge V. Neville-Neil unsigned int val);
843f2d8ff04SGeorge V. Neville-Neil
844c01f2b83SNavdeep Parhar int t3_mv88e1xxx_phy_prep(pinfo_t *pinfo, int phy_addr,
845b6d90eb7SKip Macy const struct mdio_ops *mdio_ops);
846c01f2b83SNavdeep Parhar int t3_vsc8211_phy_prep(pinfo_t *pinfo, int phy_addr,
847b6d90eb7SKip Macy const struct mdio_ops *mdio_ops);
848c01f2b83SNavdeep Parhar int t3_vsc8211_fifo_depth(adapter_t *adap, unsigned int mtu, int port);
849c01f2b83SNavdeep Parhar int t3_ael1002_phy_prep(pinfo_t *pinfo, int phy_addr,
850b6d90eb7SKip Macy const struct mdio_ops *mdio_ops);
851c01f2b83SNavdeep Parhar int t3_ael1006_phy_prep(pinfo_t *pinfo, int phy_addr,
852b6d90eb7SKip Macy const struct mdio_ops *mdio_ops);
853c01f2b83SNavdeep Parhar int t3_ael2005_phy_prep(pinfo_t *pinfo, int phy_addr,
8544af83c8cSKip Macy const struct mdio_ops *mdio_ops);
855c01f2b83SNavdeep Parhar int t3_ael2020_phy_prep(pinfo_t *pinfo, int phy_addr,
856b6d90eb7SKip Macy const struct mdio_ops *mdio_ops);
857c01f2b83SNavdeep Parhar int t3_qt2045_phy_prep(pinfo_t *pinfo, int phy_addr,
8584af83c8cSKip Macy const struct mdio_ops *mdio_ops);
859c01f2b83SNavdeep Parhar int t3_tn1010_phy_prep(pinfo_t *pinfo, int phy_addr,
860c01f2b83SNavdeep Parhar const struct mdio_ops *mdio_ops);
861c01f2b83SNavdeep Parhar int t3_xaui_direct_phy_prep(pinfo_t *pinfo, int phy_addr,
862c01f2b83SNavdeep Parhar const struct mdio_ops *mdio_ops);
863c01f2b83SNavdeep Parhar int t3_aq100x_phy_prep(pinfo_t *pinfo, int phy_addr,
864b6d90eb7SKip Macy const struct mdio_ops *mdio_ops);
865b6d90eb7SKip Macy #endif /* __CHELSIO_COMMON_H */
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