1 /*- 2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 * 36 * $FreeBSD$ 37 */ 38 39 /* 40 * Ioctl-related defintions for the Atheros Wireless LAN controller driver. 41 */ 42 #ifndef _DEV_ATH_ATHIOCTL_H 43 #define _DEV_ATH_ATHIOCTL_H 44 45 struct ath_stats { 46 u_int32_t ast_watchdog; /* device reset by watchdog */ 47 u_int32_t ast_hardware; /* fatal hardware error interrupts */ 48 u_int32_t ast_bmiss; /* beacon miss interrupts */ 49 u_int32_t ast_bmiss_phantom;/* beacon miss interrupts */ 50 u_int32_t ast_bstuck; /* beacon stuck interrupts */ 51 u_int32_t ast_rxorn; /* rx overrun interrupts */ 52 u_int32_t ast_rxeol; /* rx eol interrupts */ 53 u_int32_t ast_txurn; /* tx underrun interrupts */ 54 u_int32_t ast_mib; /* mib interrupts */ 55 u_int32_t ast_intrcoal; /* interrupts coalesced */ 56 u_int32_t ast_tx_packets; /* packet sent on the interface */ 57 u_int32_t ast_tx_mgmt; /* management frames transmitted */ 58 u_int32_t ast_tx_discard; /* frames discarded prior to assoc */ 59 u_int32_t ast_tx_qstop; /* output stopped 'cuz no buffer */ 60 u_int32_t ast_tx_encap; /* tx encapsulation failed */ 61 u_int32_t ast_tx_nonode; /* tx failed 'cuz no node */ 62 u_int32_t ast_tx_nombuf; /* tx failed 'cuz no mbuf */ 63 u_int32_t ast_tx_nomcl; /* tx failed 'cuz no cluster */ 64 u_int32_t ast_tx_linear; /* tx linearized to cluster */ 65 u_int32_t ast_tx_nodata; /* tx discarded empty frame */ 66 u_int32_t ast_tx_busdma; /* tx failed for dma resrcs */ 67 u_int32_t ast_tx_xretries;/* tx failed 'cuz too many retries */ 68 u_int32_t ast_tx_fifoerr; /* tx failed 'cuz FIFO underrun */ 69 u_int32_t ast_tx_filtered;/* tx failed 'cuz xmit filtered */ 70 u_int32_t ast_tx_shortretry;/* tx on-chip retries (short) */ 71 u_int32_t ast_tx_longretry;/* tx on-chip retries (long) */ 72 u_int32_t ast_tx_badrate; /* tx failed 'cuz bogus xmit rate */ 73 u_int32_t ast_tx_noack; /* tx frames with no ack marked */ 74 u_int32_t ast_tx_rts; /* tx frames with rts enabled */ 75 u_int32_t ast_tx_cts; /* tx frames with cts enabled */ 76 u_int32_t ast_tx_shortpre;/* tx frames with short preamble */ 77 u_int32_t ast_tx_altrate; /* tx frames with alternate rate */ 78 u_int32_t ast_tx_protect; /* tx frames with protection */ 79 u_int32_t ast_unused1; 80 u_int32_t ast_unused2; 81 u_int32_t ast_rx_nombuf; /* rx setup failed 'cuz no mbuf */ 82 u_int32_t ast_rx_busdma; /* rx setup failed for dma resrcs */ 83 u_int32_t ast_rx_orn; /* rx failed 'cuz of desc overrun */ 84 u_int32_t ast_rx_crcerr; /* rx failed 'cuz of bad CRC */ 85 u_int32_t ast_rx_fifoerr; /* rx failed 'cuz of FIFO overrun */ 86 u_int32_t ast_rx_badcrypt;/* rx failed 'cuz decryption */ 87 u_int32_t ast_rx_badmic; /* rx failed 'cuz MIC failure */ 88 u_int32_t ast_rx_phyerr; /* rx failed 'cuz of PHY err */ 89 u_int32_t ast_rx_phy[32]; /* rx PHY error per-code counts */ 90 u_int32_t ast_rx_tooshort;/* rx discarded 'cuz frame too short */ 91 u_int32_t ast_rx_toobig; /* rx discarded 'cuz frame too large */ 92 u_int32_t ast_rx_packets; /* packet recv on the interface */ 93 u_int32_t ast_rx_mgt; /* management frames received */ 94 u_int32_t ast_rx_ctl; /* rx discarded 'cuz ctl frame */ 95 int8_t ast_tx_rssi; /* tx rssi of last ack */ 96 int8_t ast_rx_rssi; /* rx rssi from histogram */ 97 int8_t ast_rx_noise; /* rx noise floor */ 98 u_int8_t ast_tx_rate; /* IEEE rate of last unicast tx */ 99 u_int32_t ast_be_xmit; /* beacons transmitted */ 100 u_int32_t ast_be_nombuf; /* beacon setup failed 'cuz no mbuf */ 101 u_int32_t ast_per_cal; /* periodic calibration calls */ 102 u_int32_t ast_per_calfail;/* periodic calibration failed */ 103 u_int32_t ast_per_rfgain; /* periodic calibration rfgain reset */ 104 u_int32_t ast_rate_calls; /* rate control checks */ 105 u_int32_t ast_rate_raise; /* rate control raised xmit rate */ 106 u_int32_t ast_rate_drop; /* rate control dropped xmit rate */ 107 u_int32_t ast_ant_defswitch;/* rx/default antenna switches */ 108 u_int32_t ast_ant_txswitch;/* tx antenna switches */ 109 u_int32_t ast_ant_rx[8]; /* rx frames with antenna */ 110 u_int32_t ast_ant_tx[8]; /* tx frames with antenna */ 111 u_int32_t ast_cabq_xmit; /* cabq frames transmitted */ 112 u_int32_t ast_cabq_busy; /* cabq found busy */ 113 u_int32_t ast_tx_raw; /* tx frames through raw api */ 114 u_int32_t ast_pad[29]; 115 }; 116 117 #define SIOCGATHSTATS _IOWR('i', 137, struct ifreq) 118 119 struct ath_diag { 120 char ad_name[IFNAMSIZ]; /* if name, e.g. "ath0" */ 121 u_int16_t ad_id; 122 #define ATH_DIAG_DYN 0x8000 /* allocate buffer in caller */ 123 #define ATH_DIAG_IN 0x4000 /* copy in parameters */ 124 #define ATH_DIAG_OUT 0x0000 /* copy out results (always) */ 125 #define ATH_DIAG_ID 0x0fff 126 u_int16_t ad_in_size; /* pack to fit, yech */ 127 caddr_t ad_in_data; 128 caddr_t ad_out_data; 129 u_int ad_out_size; 130 131 }; 132 #define SIOCGATHDIAG _IOWR('i', 138, struct ath_diag) 133 134 /* 135 * Radio capture format. 136 */ 137 #define ATH_RX_RADIOTAP_PRESENT ( \ 138 (1 << IEEE80211_RADIOTAP_TSFT) | \ 139 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 140 (1 << IEEE80211_RADIOTAP_RATE) | \ 141 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 142 (1 << IEEE80211_RADIOTAP_ANTENNA) | \ 143 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \ 144 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \ 145 0) 146 147 struct ath_rx_radiotap_header { 148 struct ieee80211_radiotap_header wr_ihdr; 149 u_int64_t wr_tsf; 150 u_int8_t wr_flags; 151 u_int8_t wr_rate; 152 u_int16_t wr_chan_freq; 153 u_int16_t wr_chan_flags; 154 u_int8_t wr_antsignal; 155 u_int8_t wr_antnoise; 156 u_int8_t wr_antenna; 157 }; 158 159 #define ATH_TX_RADIOTAP_PRESENT ( \ 160 (1 << IEEE80211_RADIOTAP_TSFT) | \ 161 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 162 (1 << IEEE80211_RADIOTAP_RATE) | \ 163 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 164 (1 << IEEE80211_RADIOTAP_DBM_TX_POWER) | \ 165 (1 << IEEE80211_RADIOTAP_ANTENNA) | \ 166 0) 167 168 struct ath_tx_radiotap_header { 169 struct ieee80211_radiotap_header wt_ihdr; 170 u_int64_t wt_tsf; 171 u_int8_t wt_flags; 172 u_int8_t wt_rate; 173 u_int16_t wt_chan_freq; 174 u_int16_t wt_chan_flags; 175 u_int8_t wt_txpower; 176 u_int8_t wt_antenna; 177 }; 178 179 #endif /* _DEV_ATH_ATHIOCTL_H */ 180