xref: /freebsd/sys/dev/ath/if_athioctl.h (revision d1d0cf62fe680bc023b9756be1a4af07ced1f18d)
15591b213SSam Leffler /*-
25591b213SSam Leffler  * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
35591b213SSam Leffler  * All rights reserved.
45591b213SSam Leffler  *
55591b213SSam Leffler  * Redistribution and use in source and binary forms, with or without
65591b213SSam Leffler  * modification, are permitted provided that the following conditions
75591b213SSam Leffler  * are met:
85591b213SSam Leffler  * 1. Redistributions of source code must retain the above copyright
95591b213SSam Leffler  *    notice, this list of conditions and the following disclaimer,
105591b213SSam Leffler  *    without modification.
115591b213SSam Leffler  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
125591b213SSam Leffler  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
135591b213SSam Leffler  *    redistribution must be conditioned upon including a substantially
145591b213SSam Leffler  *    similar Disclaimer requirement for further binary redistribution.
155591b213SSam Leffler  * 3. Neither the names of the above-listed copyright holders nor the names
165591b213SSam Leffler  *    of any contributors may be used to endorse or promote products derived
175591b213SSam Leffler  *    from this software without specific prior written permission.
185591b213SSam Leffler  *
195591b213SSam Leffler  * Alternatively, this software may be distributed under the terms of the
205591b213SSam Leffler  * GNU General Public License ("GPL") version 2 as published by the Free
215591b213SSam Leffler  * Software Foundation.
225591b213SSam Leffler  *
235591b213SSam Leffler  * NO WARRANTY
245591b213SSam Leffler  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
255591b213SSam Leffler  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
265591b213SSam Leffler  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
275591b213SSam Leffler  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
285591b213SSam Leffler  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
295591b213SSam Leffler  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
305591b213SSam Leffler  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
315591b213SSam Leffler  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
325591b213SSam Leffler  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
335591b213SSam Leffler  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
345591b213SSam Leffler  * THE POSSIBILITY OF SUCH DAMAGES.
355591b213SSam Leffler  *
365591b213SSam Leffler  * $FreeBSD$
375591b213SSam Leffler  */
385591b213SSam Leffler 
395591b213SSam Leffler /*
405591b213SSam Leffler  * Ioctl-related defintions for the Atheros Wireless LAN controller driver.
415591b213SSam Leffler  */
425591b213SSam Leffler #ifndef _DEV_ATH_ATHIOCTL_H
435591b213SSam Leffler #define _DEV_ATH_ATHIOCTL_H
445591b213SSam Leffler 
455591b213SSam Leffler struct ath_stats {
465591b213SSam Leffler 	u_int32_t	ast_watchdog;	/* device reset by watchdog */
475591b213SSam Leffler 	u_int32_t	ast_hardware;	/* fatal hardware error interrupts */
485591b213SSam Leffler 	u_int32_t	ast_bmiss;	/* beacon miss interrupts */
495591b213SSam Leffler 	u_int32_t	ast_rxorn;	/* rx overrun interrupts */
505591b213SSam Leffler 	u_int32_t	ast_rxeol;	/* rx eol interrupts */
515591b213SSam Leffler 	u_int32_t	ast_txurn;	/* tx underrun interrupts */
525591b213SSam Leffler 	u_int32_t	ast_intrcoal;	/* interrupts coalesced */
535591b213SSam Leffler 	u_int32_t	ast_tx_mgmt;	/* management frames transmitted */
545591b213SSam Leffler 	u_int32_t	ast_tx_discard;	/* frames discarded prior to assoc */
555591b213SSam Leffler 	u_int32_t	ast_tx_qstop;	/* output stopped 'cuz no buffer */
565591b213SSam Leffler 	u_int32_t	ast_tx_encap;	/* tx encapsulation failed */
575591b213SSam Leffler 	u_int32_t	ast_tx_nonode;	/* tx failed 'cuz no node */
585591b213SSam Leffler 	u_int32_t	ast_tx_nombuf;	/* tx failed 'cuz no mbuf */
595591b213SSam Leffler 	u_int32_t	ast_tx_nomcl;	/* tx failed 'cuz no cluster */
605591b213SSam Leffler 	u_int32_t	ast_tx_linear;	/* tx linearized to cluster */
615591b213SSam Leffler 	u_int32_t	ast_tx_nodata;	/* tx discarded empty frame */
625591b213SSam Leffler 	u_int32_t	ast_tx_busdma;	/* tx failed for dma resrcs */
635591b213SSam Leffler 	u_int32_t	ast_tx_xretries;/* tx failed 'cuz too many retries */
645591b213SSam Leffler 	u_int32_t	ast_tx_fifoerr;	/* tx failed 'cuz FIFO underrun */
655591b213SSam Leffler 	u_int32_t	ast_tx_filtered;/* tx failed 'cuz xmit filtered */
665591b213SSam Leffler 	u_int32_t	ast_tx_shortretry;/* tx on-chip retries (short) */
675591b213SSam Leffler 	u_int32_t	ast_tx_longretry;/* tx on-chip retries (long) */
685591b213SSam Leffler 	u_int32_t	ast_tx_badrate;	/* tx failed 'cuz bogus xmit rate */
695591b213SSam Leffler 	u_int32_t	ast_tx_noack;	/* tx frames with no ack marked */
705591b213SSam Leffler 	u_int32_t	ast_tx_rts;	/* tx frames with rts enabled */
715591b213SSam Leffler 	u_int32_t	ast_tx_cts;	/* tx frames with cts enabled */
725591b213SSam Leffler 	u_int32_t	ast_tx_shortpre;/* tx frames with short preamble */
735591b213SSam Leffler 	u_int32_t	ast_rx_nombuf;	/* rx setup failed 'cuz no mbuf */
745591b213SSam Leffler 	u_int32_t	ast_rx_busdma;	/* rx setup failed for dma resrcs */
755591b213SSam Leffler 	u_int32_t	ast_rx_orn;	/* rx failed 'cuz of desc overrun */
765591b213SSam Leffler 	u_int32_t	ast_rx_crcerr;	/* rx failed 'cuz of bad CRC */
775591b213SSam Leffler 	u_int32_t	ast_rx_fifoerr;	/* rx failed 'cuz of FIFO overrun */
785591b213SSam Leffler 	u_int32_t	ast_rx_badcrypt;/* rx failed 'cuz decryption */
795591b213SSam Leffler 	u_int32_t	ast_rx_phyerr;	/* rx failed 'cuz of PHY err */
805591b213SSam Leffler 	u_int32_t	ast_rx_phy[32];	/* rx PHY error per-code counts */
81d1d0cf62SSam Leffler 	u_int32_t	ast_rx_tooshort;/* rx discarded 'cuz frame too short */
82d1d0cf62SSam Leffler 	u_int32_t	ast_rx_ctl;	/* rx discarded 'cuz ctl frame */
835591b213SSam Leffler 	u_int32_t	ast_be_nombuf;	/* beacon setup failed 'cuz no mbuf */
845591b213SSam Leffler 	u_int32_t	ast_per_cal;	/* periodic calibration calls */
855591b213SSam Leffler 	u_int32_t	ast_per_calfail;/* periodic calibration failed */
865591b213SSam Leffler 	u_int32_t	ast_per_rfgain;	/* periodic calibration rfgain reset */
875591b213SSam Leffler 	u_int32_t	ast_rate_calls;	/* rate control checks */
885591b213SSam Leffler 	u_int32_t	ast_rate_raise;	/* rate control raised xmit rate */
895591b213SSam Leffler 	u_int32_t	ast_rate_drop;	/* rate control dropped xmit rate */
905591b213SSam Leffler };
915591b213SSam Leffler 
925591b213SSam Leffler #define	SIOCGATHSTATS	_IOWR('i', 137, struct ifreq)
935591b213SSam Leffler 
945591b213SSam Leffler #endif /* _DEV_ATH_ATHIOCTL_H */
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