1*852ba100SJustin Hibbits /*
2*852ba100SJustin Hibbits * Copyright 2008-2012 Freescale Semiconductor Inc.
3*852ba100SJustin Hibbits *
4*852ba100SJustin Hibbits * Redistribution and use in source and binary forms, with or without
5*852ba100SJustin Hibbits * modification, are permitted provided that the following conditions are met:
6*852ba100SJustin Hibbits * * Redistributions of source code must retain the above copyright
7*852ba100SJustin Hibbits * notice, this list of conditions and the following disclaimer.
8*852ba100SJustin Hibbits * * Redistributions in binary form must reproduce the above copyright
9*852ba100SJustin Hibbits * notice, this list of conditions and the following disclaimer in the
10*852ba100SJustin Hibbits * documentation and/or other materials provided with the distribution.
11*852ba100SJustin Hibbits * * Neither the name of Freescale Semiconductor nor the
12*852ba100SJustin Hibbits * names of its contributors may be used to endorse or promote products
13*852ba100SJustin Hibbits * derived from this software without specific prior written permission.
14*852ba100SJustin Hibbits *
15*852ba100SJustin Hibbits *
16*852ba100SJustin Hibbits * ALTERNATIVELY, this software may be distributed under the terms of the
17*852ba100SJustin Hibbits * GNU General Public License ("GPL") as published by the Free Software
18*852ba100SJustin Hibbits * Foundation, either version 2 of that License or (at your option) any
19*852ba100SJustin Hibbits * later version.
20*852ba100SJustin Hibbits *
21*852ba100SJustin Hibbits * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
22*852ba100SJustin Hibbits * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23*852ba100SJustin Hibbits * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24*852ba100SJustin Hibbits * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
25*852ba100SJustin Hibbits * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26*852ba100SJustin Hibbits * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27*852ba100SJustin Hibbits * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28*852ba100SJustin Hibbits * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29*852ba100SJustin Hibbits * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30*852ba100SJustin Hibbits * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31*852ba100SJustin Hibbits */
32*852ba100SJustin Hibbits
33*852ba100SJustin Hibbits
34*852ba100SJustin Hibbits #include "error_ext.h"
35*852ba100SJustin Hibbits #include "std_ext.h"
36*852ba100SJustin Hibbits #include "fm_mac.h"
37*852ba100SJustin Hibbits #include "memac.h"
38*852ba100SJustin Hibbits #include "xx_ext.h"
39*852ba100SJustin Hibbits
40*852ba100SJustin Hibbits #include "fm_common.h"
41*852ba100SJustin Hibbits #include "memac_mii_acc.h"
42*852ba100SJustin Hibbits
43*852ba100SJustin Hibbits
44*852ba100SJustin Hibbits /*****************************************************************************/
MEMAC_MII_WritePhyReg(t_Handle h_Memac,uint8_t phyAddr,uint8_t reg,uint16_t data)45*852ba100SJustin Hibbits t_Error MEMAC_MII_WritePhyReg(t_Handle h_Memac,
46*852ba100SJustin Hibbits uint8_t phyAddr,
47*852ba100SJustin Hibbits uint8_t reg,
48*852ba100SJustin Hibbits uint16_t data)
49*852ba100SJustin Hibbits {
50*852ba100SJustin Hibbits t_Memac *p_Memac = (t_Memac *)h_Memac;
51*852ba100SJustin Hibbits
52*852ba100SJustin Hibbits SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
53*852ba100SJustin Hibbits SANITY_CHECK_RETURN_ERROR(p_Memac->p_MiiMemMap, E_INVALID_HANDLE);
54*852ba100SJustin Hibbits
55*852ba100SJustin Hibbits return (t_Error)fman_memac_mii_write_phy_reg(p_Memac->p_MiiMemMap,
56*852ba100SJustin Hibbits phyAddr,
57*852ba100SJustin Hibbits reg,
58*852ba100SJustin Hibbits data,
59*852ba100SJustin Hibbits (enum enet_speed)ENET_SPEED_FROM_MODE(p_Memac->enetMode));
60*852ba100SJustin Hibbits }
61*852ba100SJustin Hibbits
62*852ba100SJustin Hibbits /*****************************************************************************/
MEMAC_MII_ReadPhyReg(t_Handle h_Memac,uint8_t phyAddr,uint8_t reg,uint16_t * p_Data)63*852ba100SJustin Hibbits t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac,
64*852ba100SJustin Hibbits uint8_t phyAddr,
65*852ba100SJustin Hibbits uint8_t reg,
66*852ba100SJustin Hibbits uint16_t *p_Data)
67*852ba100SJustin Hibbits {
68*852ba100SJustin Hibbits t_Memac *p_Memac = (t_Memac *)h_Memac;
69*852ba100SJustin Hibbits
70*852ba100SJustin Hibbits SANITY_CHECK_RETURN_ERROR(p_Memac, E_INVALID_HANDLE);
71*852ba100SJustin Hibbits SANITY_CHECK_RETURN_ERROR(p_Memac->p_MiiMemMap, E_INVALID_HANDLE);
72*852ba100SJustin Hibbits
73*852ba100SJustin Hibbits return fman_memac_mii_read_phy_reg(p_Memac->p_MiiMemMap,
74*852ba100SJustin Hibbits phyAddr,
75*852ba100SJustin Hibbits reg,
76*852ba100SJustin Hibbits p_Data,
77*852ba100SJustin Hibbits (enum enet_speed)ENET_SPEED_FROM_MODE(p_Memac->enetMode));
78*852ba100SJustin Hibbits }
79