1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3#include <dt-bindings/gpio/gpio.h> 4#include <dt-bindings/pinctrl/rockchip.h> 5 6#include "rk3588.dtsi" 7 8/ { 9 compatible = "firefly,core-3588j", "rockchip,rk3588"; 10 11 aliases { 12 mmc0 = &sdhci; 13 }; 14}; 15 16&cpu_b0 { 17 cpu-supply = <&vdd_cpu_big0_s0>; 18}; 19 20&cpu_b1 { 21 cpu-supply = <&vdd_cpu_big0_s0>; 22}; 23 24&cpu_b2 { 25 cpu-supply = <&vdd_cpu_big1_s0>; 26}; 27 28&cpu_b3 { 29 cpu-supply = <&vdd_cpu_big1_s0>; 30}; 31 32&cpu_l0 { 33 cpu-supply = <&vdd_cpu_lit_s0>; 34}; 35 36&cpu_l1 { 37 cpu-supply = <&vdd_cpu_lit_s0>; 38}; 39 40&cpu_l2 { 41 cpu-supply = <&vdd_cpu_lit_s0>; 42}; 43 44&cpu_l3 { 45 cpu-supply = <&vdd_cpu_lit_s0>; 46}; 47 48&i2c0 { 49 pinctrl-names = "default"; 50 pinctrl-0 = <&i2c0m2_xfer>; 51 status = "okay"; 52 53 vdd_cpu_big0_s0: regulator@42 { 54 compatible = "rockchip,rk8602"; 55 reg = <0x42>; 56 fcs,suspend-voltage-selector = <1>; 57 regulator-always-on; 58 regulator-boot-on; 59 regulator-min-microvolt = <550000>; 60 regulator-max-microvolt = <1050000>; 61 regulator-name = "vdd_cpu_big0_s0"; 62 regulator-ramp-delay = <2300>; 63 vin-supply = <&vcc5v0_sys>; 64 65 regulator-state-mem { 66 regulator-off-in-suspend; 67 }; 68 }; 69 70 vdd_cpu_big1_s0: regulator@43 { 71 compatible = "rockchip,rk8603", "rockchip,rk8602"; 72 reg = <0x43>; 73 fcs,suspend-voltage-selector = <1>; 74 regulator-name = "vdd_cpu_big1_s0"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <550000>; 78 regulator-max-microvolt = <1050000>; 79 regulator-ramp-delay = <2300>; 80 vin-supply = <&vcc5v0_sys>; 81 82 regulator-state-mem { 83 regulator-off-in-suspend; 84 }; 85 }; 86}; 87 88&i2c1 { 89 pinctrl-names = "default"; 90 pinctrl-0 = <&i2c1m2_xfer>; 91 status = "okay"; 92 93 vdd_npu_s0: vdd_npu_mem_s0: regulator@42 { 94 compatible = "rockchip,rk8602"; 95 reg = <0x42>; 96 fcs,suspend-voltage-selector = <1>; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-min-microvolt = <550000>; 100 regulator-max-microvolt = <950000>; 101 regulator-name = "vdd_npu_s0"; 102 regulator-ramp-delay = <2300>; 103 vin-supply = <&vcc5v0_sys>; 104 105 regulator-state-mem { 106 regulator-off-in-suspend; 107 }; 108 }; 109}; 110 111&pd_gpu { 112 domain-supply = <&vdd_gpu_s0>; 113}; 114 115&sdhci { 116 bus-width = <8>; 117 no-sdio; 118 no-sd; 119 non-removable; 120 mmc-hs400-1_8v; 121 mmc-hs400-enhanced-strobe; 122 status = "okay"; 123}; 124 125&spi2 { 126 assigned-clocks = <&cru CLK_SPI2>; 127 assigned-clock-rates = <200000000>; 128 num-cs = <1>; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 131 status = "okay"; 132 133 pmic@0 { 134 compatible = "rockchip,rk806"; 135 reg = <0x0>; 136 interrupt-parent = <&gpio0>; 137 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 138 gpio-controller; 139 #gpio-cells = <2>; 140 pinctrl-names = "default"; 141 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 142 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 143 spi-max-frequency = <1000000>; 144 system-power-controller; 145 146 vcc1-supply = <&vcc5v0_sys>; 147 vcc2-supply = <&vcc5v0_sys>; 148 vcc3-supply = <&vcc5v0_sys>; 149 vcc4-supply = <&vcc5v0_sys>; 150 vcc5-supply = <&vcc5v0_sys>; 151 vcc6-supply = <&vcc5v0_sys>; 152 vcc7-supply = <&vcc5v0_sys>; 153 vcc8-supply = <&vcc5v0_sys>; 154 vcc9-supply = <&vcc5v0_sys>; 155 vcc10-supply = <&vcc5v0_sys>; 156 vcc11-supply = <&vcc_2v0_pldo_s3>; 157 vcc12-supply = <&vcc5v0_sys>; 158 vcc13-supply = <&vcc_1v1_nldo_s3>; 159 vcc14-supply = <&vcc_1v1_nldo_s3>; 160 vcca-supply = <&vcc5v0_sys>; 161 162 rk806_dvs1_null: dvs1-null-pins { 163 pins = "gpio_pwrctrl1"; 164 function = "pin_fun0"; 165 }; 166 167 rk806_dvs2_null: dvs2-null-pins { 168 pins = "gpio_pwrctrl2"; 169 function = "pin_fun0"; 170 }; 171 172 rk806_dvs3_null: dvs3-null-pins { 173 pins = "gpio_pwrctrl3"; 174 function = "pin_fun0"; 175 }; 176 177 regulators { 178 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 179 regulator-boot-on; 180 regulator-min-microvolt = <550000>; 181 regulator-max-microvolt = <950000>; 182 regulator-ramp-delay = <12500>; 183 regulator-name = "vdd_gpu_s0"; 184 regulator-enable-ramp-delay = <400>; 185 186 regulator-state-mem { 187 regulator-off-in-suspend; 188 }; 189 }; 190 191 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 192 regulator-always-on; 193 regulator-boot-on; 194 regulator-min-microvolt = <550000>; 195 regulator-max-microvolt = <950000>; 196 regulator-ramp-delay = <12500>; 197 regulator-name = "vdd_cpu_lit_s0"; 198 199 regulator-state-mem { 200 regulator-off-in-suspend; 201 }; 202 }; 203 204 vdd_log_s0: dcdc-reg3 { 205 regulator-always-on; 206 regulator-boot-on; 207 regulator-min-microvolt = <675000>; 208 regulator-max-microvolt = <750000>; 209 regulator-ramp-delay = <12500>; 210 regulator-name = "vdd_log_s0"; 211 212 regulator-state-mem { 213 regulator-off-in-suspend; 214 regulator-suspend-microvolt = <750000>; 215 }; 216 }; 217 218 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 219 regulator-always-on; 220 regulator-boot-on; 221 regulator-min-microvolt = <550000>; 222 regulator-max-microvolt = <950000>; 223 regulator-ramp-delay = <12500>; 224 regulator-name = "vdd_vdenc_s0"; 225 226 regulator-state-mem { 227 regulator-off-in-suspend; 228 }; 229 }; 230 231 vdd_ddr_s0: dcdc-reg5 { 232 regulator-always-on; 233 regulator-boot-on; 234 regulator-min-microvolt = <675000>; 235 regulator-max-microvolt = <900000>; 236 regulator-ramp-delay = <12500>; 237 regulator-name = "vdd_ddr_s0"; 238 239 regulator-state-mem { 240 regulator-off-in-suspend; 241 regulator-suspend-microvolt = <850000>; 242 }; 243 }; 244 245 vdd2_ddr_s3: dcdc-reg6 { 246 regulator-always-on; 247 regulator-boot-on; 248 regulator-name = "vdd2_ddr_s3"; 249 250 regulator-state-mem { 251 regulator-on-in-suspend; 252 }; 253 }; 254 255 vcc_2v0_pldo_s3: dcdc-reg7 { 256 regulator-always-on; 257 regulator-boot-on; 258 regulator-min-microvolt = <2000000>; 259 regulator-max-microvolt = <2000000>; 260 regulator-name = "vdd_2v0_pldo_s3"; 261 262 regulator-state-mem { 263 regulator-on-in-suspend; 264 regulator-suspend-microvolt = <2000000>; 265 }; 266 }; 267 268 vcc_3v3_s3: dcdc-reg8 { 269 regulator-always-on; 270 regulator-boot-on; 271 regulator-min-microvolt = <3300000>; 272 regulator-max-microvolt = <3300000>; 273 regulator-name = "vcc_3v3_s3"; 274 275 regulator-state-mem { 276 regulator-on-in-suspend; 277 regulator-suspend-microvolt = <3300000>; 278 }; 279 }; 280 281 vddq_ddr_s0: dcdc-reg9 { 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-name = "vddq_ddr_s0"; 285 286 regulator-state-mem { 287 regulator-off-in-suspend; 288 }; 289 }; 290 291 vcc_1v8_s3: dcdc-reg10 { 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-min-microvolt = <1800000>; 295 regulator-max-microvolt = <1800000>; 296 regulator-name = "vcc_1v8_s3"; 297 298 regulator-state-mem { 299 regulator-on-in-suspend; 300 regulator-suspend-microvolt = <1800000>; 301 }; 302 }; 303 304 avcc_1v8_s0: pldo-reg1 { 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <1800000>; 308 regulator-max-microvolt = <1800000>; 309 regulator-name = "avcc_1v8_s0"; 310 311 regulator-state-mem { 312 regulator-off-in-suspend; 313 }; 314 }; 315 316 vcc_1v8_s0: pldo-reg2 { 317 regulator-always-on; 318 regulator-boot-on; 319 regulator-min-microvolt = <1800000>; 320 regulator-max-microvolt = <1800000>; 321 regulator-name = "vcc_1v8_s0"; 322 323 regulator-state-mem { 324 regulator-off-in-suspend; 325 regulator-suspend-microvolt = <1800000>; 326 }; 327 }; 328 329 avdd_1v2_s0: pldo-reg3 { 330 regulator-always-on; 331 regulator-boot-on; 332 regulator-min-microvolt = <1200000>; 333 regulator-max-microvolt = <1200000>; 334 regulator-name = "avdd_1v2_s0"; 335 336 regulator-state-mem { 337 regulator-off-in-suspend; 338 }; 339 }; 340 341 avcc_3v3_s0: pldo-reg4 { 342 regulator-always-on; 343 regulator-boot-on; 344 regulator-min-microvolt = <3300000>; 345 regulator-max-microvolt = <3300000>; 346 regulator-name = "avcc_3v3_s0"; 347 348 regulator-state-mem { 349 regulator-off-in-suspend; 350 }; 351 }; 352 353 vccio_sd_s0: pldo-reg5 { 354 regulator-always-on; 355 regulator-boot-on; 356 regulator-min-microvolt = <1800000>; 357 regulator-max-microvolt = <3300000>; 358 regulator-name = "vccio_sd_s0"; 359 360 regulator-state-mem { 361 regulator-off-in-suspend; 362 }; 363 }; 364 365 pldo6_s3: pldo-reg6 { 366 regulator-always-on; 367 regulator-boot-on; 368 regulator-min-microvolt = <1800000>; 369 regulator-max-microvolt = <1800000>; 370 regulator-name = "pldo6_s3"; 371 372 regulator-state-mem { 373 regulator-on-in-suspend; 374 regulator-suspend-microvolt = <1800000>; 375 }; 376 }; 377 378 vdd_0v75_s3: nldo-reg1 { 379 regulator-always-on; 380 regulator-boot-on; 381 regulator-min-microvolt = <750000>; 382 regulator-max-microvolt = <750000>; 383 regulator-name = "vdd_0v75_s3"; 384 385 regulator-state-mem { 386 regulator-on-in-suspend; 387 regulator-suspend-microvolt = <750000>; 388 }; 389 }; 390 391 avdd_ddr_pll_s0: nldo-reg2 { 392 regulator-always-on; 393 regulator-boot-on; 394 regulator-min-microvolt = <850000>; 395 regulator-max-microvolt = <850000>; 396 regulator-name = "avdd_ddr_pll_s0"; 397 398 regulator-state-mem { 399 regulator-off-in-suspend; 400 regulator-suspend-microvolt = <850000>; 401 }; 402 }; 403 404 avdd_0v75_s0: nldo-reg3 { 405 regulator-always-on; 406 regulator-boot-on; 407 regulator-min-microvolt = <750000>; 408 regulator-max-microvolt = <750000>; 409 regulator-name = "avdd_0v75_s0"; 410 411 regulator-state-mem { 412 regulator-off-in-suspend; 413 }; 414 }; 415 416 avdd_0v85_s0: nldo-reg4 { 417 regulator-always-on; 418 regulator-boot-on; 419 regulator-min-microvolt = <850000>; 420 regulator-max-microvolt = <850000>; 421 regulator-name = "avdd_0v85_s0"; 422 423 regulator-state-mem { 424 regulator-off-in-suspend; 425 }; 426 }; 427 428 vdd_0v75_s0: nldo-reg5 { 429 regulator-always-on; 430 regulator-boot-on; 431 regulator-min-microvolt = <750000>; 432 regulator-max-microvolt = <750000>; 433 regulator-name = "vdd_0v75_s0"; 434 435 regulator-state-mem { 436 regulator-off-in-suspend; 437 }; 438 }; 439 }; 440 }; 441}; 442 443/* rk3588 preferred debug out */ 444&uart2 { 445 pinctrl-0 = <&uart2m0_xfer>; 446 status = "okay"; 447}; 448