1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2025 Dale Whinham <daleyo@gmail.com> 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/gpio-keys.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 12#include "hamoa-pmics.dtsi" 13 14/ { 15 aliases { 16 serial0 = &uart2; 17 serial1 = &uart14; 18 }; 19 20 gpio-keys { 21 compatible = "gpio-keys"; 22 23 pinctrl-0 = <&hall_int_n_default>; 24 pinctrl-names = "default"; 25 26 switch-lid { 27 gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 28 linux,input-type = <EV_SW>; 29 linux,code = <SW_LID>; 30 wakeup-source; 31 wakeup-event-action = <EV_ACT_DEASSERTED>; 32 }; 33 }; 34 35 pmic-glink { 36 compatible = "qcom,x1e80100-pmic-glink", 37 "qcom,sm8550-pmic-glink", 38 "qcom,pmic-glink"; 39 #address-cells = <1>; 40 #size-cells = <0>; 41 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 42 <&tlmm 123 GPIO_ACTIVE_HIGH>; 43 44 /* Left-side bottom port */ 45 connector@0 { 46 compatible = "usb-c-connector"; 47 reg = <0>; 48 power-role = "dual"; 49 data-role = "dual"; 50 51 ports { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 port@0 { 56 reg = <0>; 57 58 pmic_glink_ss0_hs_in: endpoint { 59 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 60 }; 61 }; 62 63 port@1 { 64 reg = <1>; 65 66 pmic_glink_ss0_ss_in: endpoint { 67 remote-endpoint = <&retimer_ss0_ss_out>; 68 }; 69 }; 70 71 port@2 { 72 reg = <2>; 73 74 pmic_glink_ss0_con_sbu_in: endpoint { 75 remote-endpoint = <&retimer_ss0_con_sbu_out>; 76 }; 77 }; 78 }; 79 }; 80 81 /* Left-side top port */ 82 connector@1 { 83 compatible = "usb-c-connector"; 84 reg = <1>; 85 power-role = "dual"; 86 data-role = "dual"; 87 88 ports { 89 #address-cells = <1>; 90 #size-cells = <0>; 91 92 port@0 { 93 reg = <0>; 94 95 pmic_glink_ss1_hs_in: endpoint { 96 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 97 }; 98 }; 99 100 port@1 { 101 reg = <1>; 102 103 pmic_glink_ss1_ss_in: endpoint { 104 remote-endpoint = <&retimer_ss1_ss_out>; 105 }; 106 }; 107 108 port@2 { 109 reg = <2>; 110 111 pmic_glink_ss1_con_sbu_in: endpoint { 112 remote-endpoint = <&retimer_ss1_con_sbu_out>; 113 }; 114 }; 115 }; 116 }; 117 }; 118 119 reserved-memory { 120 linux,cma { 121 compatible = "shared-dma-pool"; 122 size = <0x0 0x8000000>; 123 reusable; 124 linux,cma-default; 125 }; 126 }; 127 128 vreg_edp_3p3: regulator-edp-3p3 { 129 compatible = "regulator-fixed"; 130 131 regulator-name = "VREG_EDP_3P3"; 132 regulator-min-microvolt = <3300000>; 133 regulator-max-microvolt = <3300000>; 134 135 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 136 enable-active-high; 137 138 pinctrl-0 = <&edp_reg_en>; 139 pinctrl-names = "default"; 140 141 regulator-boot-on; 142 }; 143 144 vreg_rtmr0_1p15: regulator-rtmr0-1p15 { 145 compatible = "regulator-fixed"; 146 147 regulator-name = "VREG_RTMR0_1P15"; 148 149 regulator-min-microvolt = <1150000>; 150 regulator-max-microvolt = <1150000>; 151 152 gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; 153 enable-active-high; 154 155 pinctrl-0 = <&rtmr0_1p15_reg_en>; 156 pinctrl-names = "default"; 157 158 regulator-boot-on; 159 }; 160 161 vreg_rtmr0_1p8: regulator-rtmr0-1p8 { 162 compatible = "regulator-fixed"; 163 164 regulator-name = "VREG_RTMR0_1P8"; 165 166 regulator-min-microvolt = <1800000>; 167 regulator-max-microvolt = <1800000>; 168 169 gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; 170 enable-active-high; 171 172 pinctrl-0 = <&rtmr0_1p8_reg_en>; 173 pinctrl-names = "default"; 174 175 regulator-boot-on; 176 }; 177 178 vreg_rtmr0_3p3: regulator-rtmr0-3p3 { 179 compatible = "regulator-fixed"; 180 181 regulator-name = "VREG_RTMR0_3P3"; 182 183 regulator-min-microvolt = <3300000>; 184 regulator-max-microvolt = <3300000>; 185 186 gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; 187 enable-active-high; 188 189 pinctrl-0 = <&rtmr0_3p3_reg_en>; 190 pinctrl-names = "default"; 191 192 regulator-boot-on; 193 }; 194 195 vreg_rtmr1_1p15: regulator-rtmr1-1p15 { 196 compatible = "regulator-fixed"; 197 198 regulator-name = "VREG_RTMR1_1P15"; 199 200 regulator-min-microvolt = <1150000>; 201 regulator-max-microvolt = <1150000>; 202 203 gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; 204 enable-active-high; 205 206 pinctrl-0 = <&rtmr1_1p15_reg_en>; 207 pinctrl-names = "default"; 208 209 regulator-boot-on; 210 }; 211 212 vreg_rtmr1_1p8: regulator-rtmr1-1p8 { 213 compatible = "regulator-fixed"; 214 215 regulator-name = "VREG_RTMR1_1P8"; 216 217 regulator-min-microvolt = <1800000>; 218 regulator-max-microvolt = <1800000>; 219 220 gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; 221 enable-active-high; 222 223 pinctrl-0 = <&rtmr1_1p8_reg_en>; 224 pinctrl-names = "default"; 225 226 regulator-boot-on; 227 }; 228 229 vreg_rtmr1_3p3: regulator-rtmr1-3p3 { 230 compatible = "regulator-fixed"; 231 232 regulator-name = "VREG_RTMR1_3P3"; 233 234 regulator-min-microvolt = <3300000>; 235 regulator-max-microvolt = <3300000>; 236 237 gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; 238 enable-active-high; 239 240 pinctrl-0 = <&rtmr1_3p3_reg_en>; 241 pinctrl-names = "default"; 242 243 regulator-boot-on; 244 }; 245 246 vreg_nvme: regulator-nvme { 247 compatible = "regulator-fixed"; 248 249 regulator-name = "VREG_NVME_3P3"; 250 regulator-min-microvolt = <3300000>; 251 regulator-max-microvolt = <3300000>; 252 253 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 254 enable-active-high; 255 256 pinctrl-0 = <&nvme_reg_en>; 257 pinctrl-names = "default"; 258 259 regulator-boot-on; 260 }; 261 262 vph_pwr: regulator-vph-pwr { 263 compatible = "regulator-fixed"; 264 265 regulator-name = "vph_pwr"; 266 regulator-min-microvolt = <3700000>; 267 regulator-max-microvolt = <3700000>; 268 269 regulator-always-on; 270 regulator-boot-on; 271 }; 272 273 vreg_wcn_3p3: regulator-wcn-3p3 { 274 compatible = "regulator-fixed"; 275 276 regulator-name = "VREG_WCN_3P3"; 277 regulator-min-microvolt = <3300000>; 278 regulator-max-microvolt = <3300000>; 279 280 gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>; 281 enable-active-high; 282 283 pinctrl-0 = <&wcn_sw_en>; 284 pinctrl-names = "default"; 285 286 regulator-boot-on; 287 }; 288 289 vreg_wcn_0p95: regulator-wcn-0p95 { 290 compatible = "regulator-fixed"; 291 292 regulator-name = "VREG_WCN_0P95"; 293 regulator-min-microvolt = <950000>; 294 regulator-max-microvolt = <950000>; 295 296 vin-supply = <&vreg_wcn_3p3>; 297 }; 298 299 vreg_wcn_1p9: regulator-wcn-1p9 { 300 compatible = "regulator-fixed"; 301 302 regulator-name = "VREG_WCN_1P9"; 303 regulator-min-microvolt = <1900000>; 304 regulator-max-microvolt = <1900000>; 305 306 vin-supply = <&vreg_wcn_3p3>; 307 }; 308 309 sound { 310 compatible = "qcom,x1e80100-sndcard"; 311 model = "X1E80100-Microsoft-Surface-Pro-11"; 312 audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", 313 "SpkrRight IN", "WSA WSA_SPK2 OUT", 314 "VA DMIC0", "vdd-micb", 315 "VA DMIC1", "vdd-micb"; 316 317 wsa-dai-link { 318 link-name = "WSA Playback"; 319 320 codec { 321 sound-dai = <&left_spkr>, <&right_spkr>, 322 <&swr0 0>, <&lpass_wsamacro 0>; 323 }; 324 325 cpu { 326 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 327 }; 328 329 platform { 330 sound-dai = <&q6apm>; 331 }; 332 }; 333 334 va-dai-link { 335 link-name = "VA Capture"; 336 337 codec { 338 sound-dai = <&lpass_vamacro 0>; 339 }; 340 341 cpu { 342 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 343 }; 344 345 platform { 346 sound-dai = <&q6apm>; 347 }; 348 }; 349 }; 350 351 wcn7850-pmu { 352 compatible = "qcom,wcn7850-pmu"; 353 354 vdd-supply = <&vreg_wcn_0p95>; 355 vddio-supply = <&vreg_l15b_1p8>; 356 vddaon-supply = <&vreg_wcn_0p95>; 357 vdddig-supply = <&vreg_wcn_0p95>; 358 vddrfa1p2-supply = <&vreg_wcn_1p9>; 359 vddrfa1p8-supply = <&vreg_wcn_1p9>; 360 361 wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>; 362 bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>; 363 364 pinctrl-0 = <&wcn_wlan_bt_en>; 365 pinctrl-names = "default"; 366 367 regulators { 368 vreg_pmu_rfa_cmn: ldo0 { 369 regulator-name = "vreg_pmu_rfa_cmn"; 370 }; 371 372 vreg_pmu_aon_0p59: ldo1 { 373 regulator-name = "vreg_pmu_aon_0p59"; 374 }; 375 376 vreg_pmu_wlcx_0p8: ldo2 { 377 regulator-name = "vreg_pmu_wlcx_0p8"; 378 }; 379 380 vreg_pmu_wlmx_0p85: ldo3 { 381 regulator-name = "vreg_pmu_wlmx_0p85"; 382 }; 383 384 vreg_pmu_btcmx_0p85: ldo4 { 385 regulator-name = "vreg_pmu_btcmx_0p85"; 386 }; 387 388 vreg_pmu_rfa_0p8: ldo5 { 389 regulator-name = "vreg_pmu_rfa_0p8"; 390 }; 391 392 vreg_pmu_rfa_1p2: ldo6 { 393 regulator-name = "vreg_pmu_rfa_1p2"; 394 }; 395 396 vreg_pmu_rfa_1p8: ldo7 { 397 regulator-name = "vreg_pmu_rfa_1p8"; 398 }; 399 400 vreg_pmu_pcie_0p9: ldo8 { 401 regulator-name = "vreg_pmu_pcie_0p9"; 402 }; 403 404 vreg_pmu_pcie_1p8: ldo9 { 405 regulator-name = "vreg_pmu_pcie_1p8"; 406 }; 407 }; 408 }; 409}; 410 411&apps_rsc { 412 regulators-0 { 413 compatible = "qcom,pm8550-rpmh-regulators"; 414 qcom,pmic-id = "b"; 415 416 vdd-bob1-supply = <&vph_pwr>; 417 vdd-bob2-supply = <&vph_pwr>; 418 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 419 vdd-l2-l13-l14-supply = <&vreg_bob1>; 420 vdd-l5-l16-supply = <&vreg_bob1>; 421 vdd-l6-l7-supply = <&vreg_bob2>; 422 vdd-l8-l9-supply = <&vreg_bob1>; 423 vdd-l12-supply = <&vreg_s5j_1p2>; 424 vdd-l15-supply = <&vreg_s4c_1p8>; 425 vdd-l17-supply = <&vreg_bob2>; 426 427 vreg_bob1: bob1 { 428 regulator-name = "vreg_bob1"; 429 regulator-min-microvolt = <3008000>; 430 regulator-max-microvolt = <3960000>; 431 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 432 }; 433 434 vreg_bob2: bob2 { 435 regulator-name = "vreg_bob2"; 436 regulator-min-microvolt = <2504000>; 437 regulator-max-microvolt = <3008000>; 438 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 439 }; 440 441 vreg_l1b_1p8: ldo1 { 442 regulator-name = "vreg_l1b_1p8"; 443 regulator-min-microvolt = <1800000>; 444 regulator-max-microvolt = <1800000>; 445 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 446 }; 447 448 vreg_l2b_3p0: ldo2 { 449 regulator-name = "vreg_l2b_3p0"; 450 regulator-min-microvolt = <3072000>; 451 regulator-max-microvolt = <3072000>; 452 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 453 }; 454 455 vreg_l4b_1p8: ldo4 { 456 regulator-name = "vreg_l4b_1p8"; 457 regulator-min-microvolt = <1800000>; 458 regulator-max-microvolt = <1800000>; 459 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 460 }; 461 462 vreg_l6b_1p8: ldo6 { 463 regulator-name = "vreg_l6b_1p8"; 464 regulator-min-microvolt = <1800000>; 465 regulator-max-microvolt = <2960000>; 466 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 467 }; 468 469 vreg_l8b_3p0: ldo8 { 470 regulator-name = "vreg_l8b_3p0"; 471 regulator-min-microvolt = <3072000>; 472 regulator-max-microvolt = <3072000>; 473 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 474 }; 475 476 vreg_l9b_2p9: ldo9 { 477 regulator-name = "vreg_l9b_2p9"; 478 regulator-min-microvolt = <2960000>; 479 regulator-max-microvolt = <2960000>; 480 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 481 }; 482 483 vreg_l10b_1p8: ldo10 { 484 regulator-name = "vreg_l10b_1p8"; 485 regulator-min-microvolt = <1800000>; 486 regulator-max-microvolt = <1800000>; 487 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 488 }; 489 490 vreg_l12b_1p2: ldo12 { 491 regulator-name = "vreg_l12b_1p2"; 492 regulator-min-microvolt = <1200000>; 493 regulator-max-microvolt = <1200000>; 494 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 495 }; 496 497 vreg_l13b_3p0: ldo13 { 498 regulator-name = "vreg_l13b_3p0"; 499 regulator-min-microvolt = <3072000>; 500 regulator-max-microvolt = <3072000>; 501 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 502 }; 503 504 vreg_l14b_3p0: ldo14 { 505 regulator-name = "vreg_l14b_3p0"; 506 regulator-min-microvolt = <3072000>; 507 regulator-max-microvolt = <3072000>; 508 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 509 }; 510 511 vreg_l15b_1p8: ldo15 { 512 regulator-name = "vreg_l15b_1p8"; 513 regulator-min-microvolt = <1800000>; 514 regulator-max-microvolt = <1800000>; 515 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 516 }; 517 518 vreg_l17b_2p5: ldo17 { 519 regulator-name = "vreg_l17b_2p5"; 520 regulator-min-microvolt = <2504000>; 521 regulator-max-microvolt = <2504000>; 522 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 523 }; 524 }; 525 526 regulators-1 { 527 compatible = "qcom,pm8550ve-rpmh-regulators"; 528 qcom,pmic-id = "c"; 529 530 vdd-l1-supply = <&vreg_s5j_1p2>; 531 vdd-l2-supply = <&vreg_s1f_0p7>; 532 vdd-l3-supply = <&vreg_s1f_0p7>; 533 vdd-s4-supply = <&vph_pwr>; 534 535 vreg_s4c_1p8: smps4 { 536 regulator-name = "vreg_s4c_1p8"; 537 regulator-min-microvolt = <1856000>; 538 regulator-max-microvolt = <2000000>; 539 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 540 }; 541 542 vreg_l1c_1p2: ldo1 { 543 regulator-name = "vreg_l1c_1p2"; 544 regulator-min-microvolt = <1200000>; 545 regulator-max-microvolt = <1200000>; 546 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 547 }; 548 549 vreg_l2c_0p8: ldo2 { 550 regulator-name = "vreg_l2c_0p8"; 551 regulator-min-microvolt = <880000>; 552 regulator-max-microvolt = <880000>; 553 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 554 }; 555 556 vreg_l3c_0p8: ldo3 { 557 regulator-name = "vreg_l3c_0p8"; 558 regulator-min-microvolt = <912000>; 559 regulator-max-microvolt = <912000>; 560 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 561 }; 562 }; 563 564 regulators-2 { 565 compatible = "qcom,pmc8380-rpmh-regulators"; 566 qcom,pmic-id = "d"; 567 568 vdd-l1-supply = <&vreg_s1f_0p7>; 569 vdd-l2-supply = <&vreg_s1f_0p7>; 570 vdd-l3-supply = <&vreg_s4c_1p8>; 571 vdd-s1-supply = <&vph_pwr>; 572 573 vreg_l1d_0p8: ldo1 { 574 regulator-name = "vreg_l1d_0p8"; 575 regulator-min-microvolt = <880000>; 576 regulator-max-microvolt = <880000>; 577 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 578 }; 579 580 vreg_l2d_0p9: ldo2 { 581 regulator-name = "vreg_l2d_0p9"; 582 regulator-min-microvolt = <912000>; 583 regulator-max-microvolt = <912000>; 584 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 585 }; 586 587 vreg_l3d_1p8: ldo3 { 588 regulator-name = "vreg_l3d_1p8"; 589 regulator-min-microvolt = <1800000>; 590 regulator-max-microvolt = <1800000>; 591 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 592 }; 593 }; 594 595 regulators-3 { 596 compatible = "qcom,pmc8380-rpmh-regulators"; 597 qcom,pmic-id = "e"; 598 599 vdd-l2-supply = <&vreg_s1f_0p7>; 600 vdd-l3-supply = <&vreg_s5j_1p2>; 601 602 vreg_l2e_0p8: ldo2 { 603 regulator-name = "vreg_l2e_0p8"; 604 regulator-min-microvolt = <880000>; 605 regulator-max-microvolt = <880000>; 606 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 607 }; 608 609 vreg_l3e_1p2: ldo3 { 610 regulator-name = "vreg_l3e_1p2"; 611 regulator-min-microvolt = <1200000>; 612 regulator-max-microvolt = <1200000>; 613 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 614 }; 615 }; 616 617 regulators-4 { 618 compatible = "qcom,pmc8380-rpmh-regulators"; 619 qcom,pmic-id = "f"; 620 621 vdd-l1-supply = <&vreg_s5j_1p2>; 622 vdd-l2-supply = <&vreg_s5j_1p2>; 623 vdd-l3-supply = <&vreg_s5j_1p2>; 624 vdd-s1-supply = <&vph_pwr>; 625 626 vreg_s1f_0p7: smps1 { 627 regulator-name = "vreg_s1f_0p7"; 628 regulator-min-microvolt = <700000>; 629 regulator-max-microvolt = <1100000>; 630 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 631 }; 632 }; 633 634 regulators-6 { 635 compatible = "qcom,pm8550ve-rpmh-regulators"; 636 qcom,pmic-id = "i"; 637 638 vdd-l1-supply = <&vreg_s4c_1p8>; 639 vdd-l2-supply = <&vreg_s5j_1p2>; 640 vdd-l3-supply = <&vreg_s1f_0p7>; 641 vdd-s1-supply = <&vph_pwr>; 642 vdd-s2-supply = <&vph_pwr>; 643 644 vreg_s1i_0p9: smps1 { 645 regulator-name = "vreg_s1i_0p9"; 646 regulator-min-microvolt = <900000>; 647 regulator-max-microvolt = <920000>; 648 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 649 }; 650 651 vreg_s2i_1p0: smps2 { 652 regulator-name = "vreg_s2i_1p0"; 653 regulator-min-microvolt = <1000000>; 654 regulator-max-microvolt = <1100000>; 655 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 656 }; 657 658 vreg_l1i_1p8: ldo1 { 659 regulator-name = "vreg_l1i_1p8"; 660 regulator-min-microvolt = <1800000>; 661 regulator-max-microvolt = <1800000>; 662 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 663 }; 664 665 vreg_l2i_1p2: ldo2 { 666 regulator-name = "vreg_l2i_1p2"; 667 regulator-min-microvolt = <1200000>; 668 regulator-max-microvolt = <1200000>; 669 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 670 }; 671 672 vreg_l3i_0p8: ldo3 { 673 regulator-name = "vreg_l3i_0p8"; 674 regulator-min-microvolt = <880000>; 675 regulator-max-microvolt = <880000>; 676 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 677 }; 678 }; 679 680 regulators-7 { 681 compatible = "qcom,pm8550ve-rpmh-regulators"; 682 qcom,pmic-id = "j"; 683 684 vdd-l1-supply = <&vreg_s1f_0p7>; 685 vdd-l2-supply = <&vreg_s5j_1p2>; 686 vdd-l3-supply = <&vreg_s1f_0p7>; 687 vdd-s5-supply = <&vph_pwr>; 688 689 vreg_s5j_1p2: smps5 { 690 regulator-name = "vreg_s5j_1p2"; 691 regulator-min-microvolt = <1256000>; 692 regulator-max-microvolt = <1304000>; 693 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 694 }; 695 696 vreg_l1j_0p8: ldo1 { 697 regulator-name = "vreg_l1j_0p8"; 698 regulator-min-microvolt = <912000>; 699 regulator-max-microvolt = <912000>; 700 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 701 }; 702 703 vreg_l2j_1p2: ldo2 { 704 regulator-name = "vreg_l2j_1p2"; 705 regulator-min-microvolt = <1256000>; 706 regulator-max-microvolt = <1256000>; 707 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 708 }; 709 710 vreg_l3j_0p8: ldo3 { 711 regulator-name = "vreg_l3j_0p8"; 712 regulator-min-microvolt = <880000>; 713 regulator-max-microvolt = <880000>; 714 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 715 }; 716 }; 717}; 718 719&gpu { 720 status = "okay"; 721}; 722 723&gpu_zap_shader { 724 firmware-name = "qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn"; 725}; 726 727&i2c0 { 728 clock-frequency = <100000>; 729 730 status = "okay"; 731 732 /* Something @39, @3e, @44 */ 733}; 734 735&i2c3 { 736 clock-frequency = <400000>; 737 738 status = "okay"; 739 740 /* Left-side bottom port */ 741 typec-mux@8 { 742 compatible = "parade,ps8830"; 743 reg = <0x8>; 744 745 reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; 746 747 clocks = <&rpmhcc RPMH_RF_CLK3>; 748 749 vdd-supply = <&vreg_rtmr0_1p15>; 750 vdd33-supply = <&vreg_rtmr0_3p3>; 751 vdd33-cap-supply = <&vreg_rtmr0_3p3>; 752 vddar-supply = <&vreg_rtmr0_1p15>; 753 vddat-supply = <&vreg_rtmr0_1p15>; 754 vddio-supply = <&vreg_rtmr0_1p8>; 755 756 pinctrl-0 = <&rtmr0_default>; 757 pinctrl-names = "default"; 758 759 retimer-switch; 760 orientation-switch; 761 762 ports { 763 #address-cells = <1>; 764 #size-cells = <0>; 765 766 port@0 { 767 reg = <0>; 768 769 retimer_ss0_ss_out: endpoint { 770 remote-endpoint = <&pmic_glink_ss0_ss_in>; 771 }; 772 }; 773 774 port@1 { 775 reg = <1>; 776 777 retimer_ss0_ss_in: endpoint { 778 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 779 }; 780 }; 781 782 port@2 { 783 reg = <2>; 784 785 retimer_ss0_con_sbu_out: endpoint { 786 remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; 787 }; 788 }; 789 }; 790 }; 791}; 792 793&i2c4 { 794 clock-frequency = <400000>; 795 796 status = "okay"; 797 798 /* Something @12, @14, @16, @18, @1a */ 799}; 800 801&i2c7 { 802 clock-frequency = <400000>; 803 804 status = "okay"; 805 806 /* Left-side top port */ 807 typec-mux@8 { 808 compatible = "parade,ps8830"; 809 reg = <0x8>; 810 811 reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>; 812 813 clocks = <&rpmhcc RPMH_RF_CLK4>; 814 815 vdd-supply = <&vreg_rtmr1_1p15>; 816 vdd33-supply = <&vreg_rtmr1_3p3>; 817 vdd33-cap-supply = <&vreg_rtmr1_3p3>; 818 vddar-supply = <&vreg_rtmr1_1p15>; 819 vddat-supply = <&vreg_rtmr1_1p15>; 820 vddio-supply = <&vreg_rtmr1_1p8>; 821 822 retimer-switch; 823 orientation-switch; 824 825 ports { 826 #address-cells = <1>; 827 #size-cells = <0>; 828 829 port@0 { 830 reg = <0>; 831 832 retimer_ss1_ss_out: endpoint { 833 remote-endpoint = <&pmic_glink_ss1_ss_in>; 834 }; 835 }; 836 837 port@1 { 838 reg = <1>; 839 840 retimer_ss1_ss_in: endpoint { 841 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 842 }; 843 }; 844 845 port@2 { 846 reg = <2>; 847 848 retimer_ss1_con_sbu_out: endpoint { 849 remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; 850 }; 851 }; 852 }; 853 }; 854}; 855 856&lpass_tlmm { 857 spkr_01_sd_n_active: spkr-01-sd-n-active-state { 858 pins = "gpio12"; 859 function = "gpio"; 860 drive-strength = <16>; 861 bias-disable; 862 }; 863}; 864 865&lpass_vamacro { 866 pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 867 pinctrl-names = "default"; 868 869 vdd-micb-supply = <&vreg_l1b_1p8>; 870 qcom,dmic-sample-rate = <4800000>; 871}; 872 873&mdss { 874 status = "okay"; 875}; 876 877&mdss_dp0 { 878 status = "okay"; 879}; 880 881&mdss_dp0_out { 882 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 883}; 884 885&mdss_dp1 { 886 status = "okay"; 887}; 888 889&mdss_dp1_out { 890 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 891}; 892 893&mdss_dp3 { 894 compatible = "qcom,x1e80100-dp"; 895 /delete-property/ #sound-dai-cells; 896 897 status = "okay"; 898 899 aux-bus { 900 panel: panel { 901 compatible = "edp-panel"; 902 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; 903 power-supply = <&vreg_edp_3p3>; 904 905 pinctrl-0 = <&edp_bl_en>; 906 pinctrl-names = "default"; 907 908 port { 909 edp_panel_in: endpoint { 910 remote-endpoint = <&mdss_dp3_out>; 911 }; 912 }; 913 }; 914 }; 915 916 ports { 917 port@1 { 918 reg = <1>; 919 920 mdss_dp3_out: endpoint { 921 data-lanes = <0 1 2 3>; 922 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 923 924 remote-endpoint = <&edp_panel_in>; 925 }; 926 }; 927 }; 928}; 929 930&mdss_dp3_phy { 931 vdda-phy-supply = <&vreg_l3j_0p8>; 932 vdda-pll-supply = <&vreg_l2j_1p2>; 933 934 status = "okay"; 935}; 936 937&pcie4 { 938 status = "okay"; 939}; 940 941&pcie4_phy { 942 vdda-phy-supply = <&vreg_l3i_0p8>; 943 vdda-pll-supply = <&vreg_l3e_1p2>; 944 945 status = "okay"; 946}; 947 948&pcie4_port0 { 949 wifi@0 { 950 compatible = "pci17cb,1107"; 951 reg = <0x10000 0x0 0x0 0x0 0x0>; 952 953 vddaon-supply = <&vreg_pmu_aon_0p59>; 954 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 955 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 956 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 957 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 958 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 959 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 960 vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 961 vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 962 }; 963}; 964 965&pcie6a { 966 vddpe-3v3-supply = <&vreg_nvme>; 967 968 pinctrl-0 = <&pcie6a_default>; 969 pinctrl-names = "default"; 970 971 status = "okay"; 972}; 973 974&pcie6a_phy { 975 vdda-phy-supply = <&vreg_l1d_0p8>; 976 vdda-pll-supply = <&vreg_l2j_1p2>; 977 978 status = "okay"; 979}; 980 981&pcie6a_port0 { 982 reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 983 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 984}; 985 986&pm8550_gpios { 987 rtmr0_default: rtmr0-reset-n-active-state { 988 pins = "gpio10"; 989 function = "normal"; 990 power-source = <1>; /* 1.8V */ 991 }; 992 993 rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { 994 pins = "gpio11"; 995 function = "normal"; 996 power-source = <1>; /* 1.8V */ 997 }; 998}; 999 1000&pm8550ve_9_gpios { 1001 rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { 1002 pins = "gpio8"; 1003 function = "normal"; 1004 power-source = <1>; /* 1.8V */ 1005 }; 1006}; 1007 1008&pmc8380_3_gpios { 1009 edp_bl_en: edp-bl-en-state { 1010 pins = "gpio4"; 1011 function = "normal"; 1012 power-source = <1>; /* 1.8V */ 1013 input-disable; 1014 output-enable; 1015 }; 1016}; 1017 1018&pmc8380_5_gpios { 1019 rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { 1020 pins = "gpio8"; 1021 function = "normal"; 1022 power-source = <1>; /* 1.8V */ 1023 }; 1024}; 1025 1026&qupv3_0 { 1027 status = "okay"; 1028}; 1029 1030&qupv3_1 { 1031 status = "okay"; 1032}; 1033 1034&qupv3_2 { 1035 status = "okay"; 1036}; 1037 1038&remoteproc_adsp { 1039 firmware-name = "qcom/x1e80100/microsoft/Denali/qcadsp8380.mbn", 1040 "qcom/x1e80100/microsoft/Denali/adsp_dtb.mbn"; 1041 1042 status = "okay"; 1043}; 1044 1045&remoteproc_cdsp { 1046 firmware-name = "qcom/x1e80100/microsoft/Denali/qccdsp8380.mbn", 1047 "qcom/x1e80100/microsoft/Denali/cdsp_dtb.mbn"; 1048 1049 status = "okay"; 1050}; 1051 1052&smb2360_0 { 1053 status = "okay"; 1054}; 1055 1056&smb2360_0_eusb2_repeater { 1057 vdd18-supply = <&vreg_l3d_1p8>; 1058 vdd3-supply = <&vreg_l2b_3p0>; 1059}; 1060 1061&smb2360_1 { 1062 status = "okay"; 1063}; 1064 1065&smb2360_1_eusb2_repeater { 1066 vdd18-supply = <&vreg_l3d_1p8>; 1067 vdd3-supply = <&vreg_l14b_3p0>; 1068}; 1069 1070&smb2360_2 { 1071 status = "okay"; 1072}; 1073 1074&smb2360_2_eusb2_repeater { 1075 vdd18-supply = <&vreg_l3d_1p8>; 1076 vdd3-supply = <&vreg_l8b_3p0>; 1077}; 1078 1079&swr0 { 1080 status = "okay"; 1081 1082 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 1083 pinctrl-names = "default"; 1084 1085 /* WSA8845, Left Speaker */ 1086 left_spkr: speaker@0,0 { 1087 compatible = "sdw20217020400"; 1088 reg = <0 0>; 1089 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 1090 #sound-dai-cells = <0>; 1091 sound-name-prefix = "SpkrLeft"; 1092 vdd-1p8-supply = <&vreg_l15b_1p8>; 1093 vdd-io-supply = <&vreg_l12b_1p2>; 1094 qcom,port-mapping = <1 2 3 7 10 13>; 1095 }; 1096 1097 /* WSA8845, Right Speaker */ 1098 right_spkr: speaker@0,1 { 1099 compatible = "sdw20217020400"; 1100 reg = <0 1>; 1101 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 1102 #sound-dai-cells = <0>; 1103 sound-name-prefix = "SpkrRight"; 1104 vdd-1p8-supply = <&vreg_l15b_1p8>; 1105 vdd-io-supply = <&vreg_l12b_1p2>; 1106 qcom,port-mapping = <4 5 6 7 11 13>; 1107 }; 1108}; 1109 1110&tlmm { 1111 gpio-reserved-ranges = <44 4>, /* SPI (TPM) */ 1112 <238 1>; /* UFS Reset */ 1113 1114 hall_int_n_default: hall-int-n-state { 1115 pins = "gpio2"; 1116 function = "gpio"; 1117 bias-disable; 1118 }; 1119 1120 nvme_reg_en: nvme-reg-en-state { 1121 pins = "gpio18"; 1122 function = "gpio"; 1123 drive-strength = <2>; 1124 bias-disable; 1125 }; 1126 1127 edp_reg_en: edp-reg-en-state { 1128 pins = "gpio70"; 1129 function = "gpio"; 1130 drive-strength = <16>; 1131 bias-disable; 1132 }; 1133 1134 ssam_state: ssam-state-state { 1135 pins = "gpio91"; 1136 function = "gpio"; 1137 bias-disable; 1138 }; 1139 1140 wcn_wlan_bt_en: wcn-wlan-bt-en-state { 1141 pins = "gpio116", "gpio117"; 1142 function = "gpio"; 1143 drive-strength = <2>; 1144 bias-disable; 1145 }; 1146 1147 pcie4_default: pcie4-default-state { 1148 clkreq-n-pins { 1149 pins = "gpio147"; 1150 function = "pcie4_clk"; 1151 drive-strength = <2>; 1152 bias-pull-up; 1153 }; 1154 1155 perst-n-pins { 1156 pins = "gpio146"; 1157 function = "gpio"; 1158 drive-strength = <2>; 1159 bias-disable; 1160 }; 1161 1162 wake-n-pins { 1163 pins = "gpio148"; 1164 function = "gpio"; 1165 drive-strength = <2>; 1166 bias-pull-up; 1167 }; 1168 }; 1169 1170 pcie6a_default: pcie6a-default-state { 1171 perst-n-pins { 1172 pins = "gpio152"; 1173 function = "gpio"; 1174 drive-strength = <2>; 1175 bias-disable; 1176 }; 1177 1178 clkreq-n-pins { 1179 pins = "gpio153"; 1180 function = "pcie6a_clk"; 1181 drive-strength = <2>; 1182 bias-pull-up; 1183 }; 1184 1185 wake-n-pins { 1186 pins = "gpio154"; 1187 function = "gpio"; 1188 drive-strength = <2>; 1189 bias-pull-up; 1190 }; 1191 }; 1192 1193 rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { 1194 pins = "gpio175"; 1195 function = "gpio"; 1196 drive-strength = <2>; 1197 bias-disable; 1198 }; 1199 1200 rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { 1201 pins = "gpio186"; 1202 function = "gpio"; 1203 drive-strength = <2>; 1204 bias-disable; 1205 }; 1206 1207 rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { 1208 pins = "gpio188"; 1209 function = "gpio"; 1210 drive-strength = <2>; 1211 bias-disable; 1212 }; 1213 1214 wcn_sw_en: wcn-sw-en-state { 1215 pins = "gpio214"; 1216 function = "gpio"; 1217 drive-strength = <2>; 1218 bias-disable; 1219 }; 1220 1221 cam_indicator_en: cam-indicator-en-state { 1222 pins = "gpio225"; 1223 function = "gpio"; 1224 drive-strength = <2>; 1225 bias-disable; 1226 }; 1227}; 1228 1229&uart2 { 1230 status = "okay"; 1231 1232 embedded-controller { 1233 compatible = "microsoft,surface-sam"; 1234 1235 interrupts-extended = <&tlmm 91 IRQ_TYPE_EDGE_RISING>; 1236 1237 current-speed = <4000000>; 1238 1239 pinctrl-0 = <&ssam_state>; 1240 pinctrl-names = "default"; 1241 }; 1242}; 1243 1244&uart14 { 1245 status = "okay"; 1246 1247 bluetooth { 1248 compatible = "qcom,wcn7850-bt"; 1249 max-speed = <3200000>; 1250 1251 vddaon-supply = <&vreg_pmu_aon_0p59>; 1252 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 1253 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 1254 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 1255 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 1256 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 1257 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 1258 }; 1259}; 1260 1261&usb_1_ss0_hsphy { 1262 vdd-supply = <&vreg_l3j_0p8>; 1263 vdda12-supply = <&vreg_l2j_1p2>; 1264 1265 phys = <&smb2360_0_eusb2_repeater>; 1266 1267 status = "okay"; 1268}; 1269 1270&usb_1_ss0_qmpphy { 1271 vdda-phy-supply = <&vreg_l2j_1p2>; 1272 vdda-pll-supply = <&vreg_l1j_0p8>; 1273 1274 status = "okay"; 1275}; 1276 1277&usb_1_ss0 { 1278 dr_mode = "host"; 1279 1280 status = "okay"; 1281}; 1282 1283&usb_1_ss0_dwc3_hs { 1284 remote-endpoint = <&pmic_glink_ss0_hs_in>; 1285}; 1286 1287&usb_1_ss0_qmpphy_out { 1288 remote-endpoint = <&retimer_ss0_ss_in>; 1289}; 1290 1291&usb_1_ss1_hsphy { 1292 vdd-supply = <&vreg_l3j_0p8>; 1293 vdda12-supply = <&vreg_l2j_1p2>; 1294 1295 phys = <&smb2360_1_eusb2_repeater>; 1296 1297 status = "okay"; 1298}; 1299 1300&usb_1_ss1_qmpphy { 1301 vdda-phy-supply = <&vreg_l2j_1p2>; 1302 vdda-pll-supply = <&vreg_l2d_0p9>; 1303 1304 status = "okay"; 1305}; 1306 1307&usb_1_ss1 { 1308 dr_mode = "host"; 1309 1310 status = "okay"; 1311}; 1312 1313&usb_1_ss1_dwc3_hs { 1314 remote-endpoint = <&pmic_glink_ss1_hs_in>; 1315}; 1316 1317&usb_1_ss1_qmpphy_out { 1318 remote-endpoint = <&retimer_ss1_ss_in>; 1319}; 1320