1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> 11 12#include "monaco.dtsi" 13#include "monaco-pmics.dtsi" 14#include "monaco-monza-som.dtsi" 15 16/ { 17 model = "Arduino VENTUNO Q"; 18 compatible = "arduino,monza", "qcom,qcs8300"; 19 20 aliases { 21 ethernet0 = ðernet0; 22 i2c1 = &i2c1; 23 serial0 = &uart7; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 gpio-keys { 31 compatible = "gpio-keys"; 32 pinctrl-0 = <&gpio_keys_default>; 33 pinctrl-names = "default"; 34 35 button-home { 36 label = "Home Key"; 37 linux,code = <KEY_HOMEPAGE>; 38 gpios = <&tlmm 79 GPIO_ACTIVE_LOW>; 39 debounce-interval = <60>; 40 }; 41 }; 42 43 hdmi-connector { 44 compatible = "hdmi-connector"; 45 label = "hdmi"; 46 type = "a"; 47 48 port { 49 hdmi_connector_in: endpoint { 50 remote-endpoint = <&adv7535_out>; 51 }; 52 }; 53 }; 54 55 sound { 56 compatible = "qcom,qcs8275-sndcard"; 57 model = "arduino-monza"; 58 audio-routing = "IN12", "Headset Mic12", 59 "Headset Mic12", "MICBIAS", 60 "IN56", "Headset Mic56", 61 "Headset Mic56", "MICBIAS", 62 "MIC1", "MICBIAS", 63 "Headphone", "HPL", 64 "Headphone", "HPR", 65 "Receiver", "RCVL", 66 "Receiver", "RCVR", 67 "Speaker", "SPKL", 68 "Speaker", "SPKR"; 69 70 pinctrl-0 = <&quad_mi2s_active>, <&quad_mclk_active>, <&lpi_i2s4_active>; 71 pinctrl-names = "default"; 72 73 pri-i2s-playback-dai-link { 74 link-name = "Analog Playback"; 75 76 codec { 77 sound-dai = <&max98091>; 78 }; 79 80 cpu { 81 sound-dai = <&q6apmbedai 137>; 82 }; 83 84 platform { 85 sound-dai = <&q6apm>; 86 }; 87 }; 88 89 pri-i2s-capture-dai-link { 90 link-name = "Analog Capture"; 91 92 codec { 93 sound-dai = <&max98091>; 94 }; 95 96 cpu { 97 sound-dai = <&q6apmbedai 138>; 98 }; 99 100 platform { 101 sound-dai = <&q6apm>; 102 }; 103 }; 104 105 hdmi-mi2s-playback-dai-link { 106 link-name = "HDMI Playback"; 107 108 codec { 109 sound-dai = <&adv7535>; 110 }; 111 112 cpu { 113 sound-dai = <&q6apmbedai 145>; 114 }; 115 116 platform { 117 sound-dai = <&q6apm>; 118 }; 119 }; 120 }; 121 122 vdc_3v3: regulator-3v3 { 123 compatible = "regulator-fixed"; 124 regulator-name = "vdc_3v3"; 125 regulator-min-microvolt = <3300000>; 126 regulator-max-microvolt = <3300000>; 127 }; 128 129 vdc_1v8: regulator-1v8 { 130 compatible = "regulator-fixed"; 131 regulator-name = "vdc_1v8"; 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <1800000>; 134 }; 135 136 vdc_5v: regulator-5v0 { 137 compatible = "regulator-fixed"; 138 regulator-name = "vdc_5v"; 139 regulator-min-microvolt = <5000000>; 140 regulator-max-microvolt = <5000000>; 141 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 142 enable-active-high; 143 regulator-always-on; 144 startup-delay-us = <20000>; 145 }; 146 147 vreg_nvme: regulator-3p3-m2 { 148 compatible = "regulator-fixed"; 149 regulator-name = "vreg_m2_3p3"; 150 regulator-min-microvolt = <3300000>; 151 regulator-max-microvolt = <3300000>; 152 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; 153 enable-active-high; 154 startup-delay-us = <20000>; 155 }; 156}; 157 158ðernet0 { 159 phy-mode = "2500base-x"; 160 phy-handle = <&hsgmii_phy0>; 161 162 pinctrl-0 = <ðernet0_default>; 163 pinctrl-names = "default"; 164 165 snps,mtl-rx-config = <&mtl_rx_setup>; 166 snps,mtl-tx-config = <&mtl_tx_setup>; 167 168 status = "okay"; 169 170 mdio { 171 compatible = "snps,dwmac-mdio"; 172 #address-cells = <1>; 173 #size-cells = <0>; 174 175 hsgmii_phy0: ethernet-phy@1c { 176 compatible = "ethernet-phy-id004d.d101"; 177 reg = <0x1c>; 178 reset-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; 179 reset-assert-us = <11000>; 180 reset-deassert-us = <70000>; 181 }; 182 }; 183 184 mtl_rx_setup: rx-queues-config { 185 snps,rx-queues-to-use = <4>; 186 snps,rx-sched-sp; 187 188 queue0 { 189 snps,dcb-algorithm; 190 snps,map-to-dma-channel = <0x0>; 191 snps,route-up; 192 snps,priority = <0x1>; 193 }; 194 195 queue1 { 196 snps,dcb-algorithm; 197 snps,map-to-dma-channel = <0x1>; 198 snps,route-ptp; 199 }; 200 201 queue2 { 202 snps,avb-algorithm; 203 snps,map-to-dma-channel = <0x2>; 204 snps,route-avcp; 205 }; 206 207 queue3 { 208 snps,avb-algorithm; 209 snps,map-to-dma-channel = <0x3>; 210 snps,priority = <0xc>; 211 }; 212 }; 213 214 mtl_tx_setup: tx-queues-config { 215 snps,tx-queues-to-use = <4>; 216 217 queue0 { 218 snps,dcb-algorithm; 219 }; 220 221 queue1 { 222 snps,dcb-algorithm; 223 }; 224 225 queue2 { 226 snps,avb-algorithm; 227 snps,send_slope = <0x1000>; 228 snps,idle_slope = <0x1000>; 229 snps,high_credit = <0x3e800>; 230 snps,low_credit = <0xffc18000>; 231 }; 232 233 queue3 { 234 snps,avb-algorithm; 235 snps,send_slope = <0x1000>; 236 snps,idle_slope = <0x1000>; 237 snps,high_credit = <0x3e800>; 238 snps,low_credit = <0xffc18000>; 239 }; 240 }; 241}; 242 243&i2c12 { 244 clock-frequency = <400000>; 245 246 status = "okay"; 247 248 max98091: audio-codec@10 { 249 compatible = "maxim,max98091"; 250 reg = <0x10>; 251 pinctrl-0 = <&max98091_default>; 252 pinctrl-names = "default"; 253 interrupts-extended = <&tlmm 16 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_16 */ 254 clocks = <&q6prmcc LPASS_CLK_ID_MCLK_3 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; 255 clock-names = "mclk"; 256 #sound-dai-cells = <0>; 257 }; 258 259 adv7535: bridge@3d { 260 compatible = "adi,adv7535"; 261 reg = <0x3d>; 262 pinctrl-0 = <&adv7535_default>; 263 pinctrl-names = "default"; 264 interrupts-extended = <&tlmm 93 IRQ_TYPE_EDGE_FALLING>; 265 avdd-supply = <&vdc_1v8>; 266 dvdd-supply = <&vdc_1v8>; 267 pvdd-supply = <&vdc_1v8>; 268 a2vdd-supply = <&vdc_1v8>; 269 v3p3-supply = <&vdc_3v3>; 270 v1p2-supply = <&vdc_1v8>; 271 adi,dsi-lanes = <4>; 272 #sound-dai-cells = <0>; 273 274 ports { 275 #address-cells = <1>; 276 #size-cells = <0>; 277 278 port@0 { 279 reg = <0>; 280 adv7535_in: endpoint { 281 remote-endpoint = <&mdss_dsi0_out>; 282 }; 283 }; 284 285 port@1 { 286 reg = <1>; 287 adv7535_out: endpoint { 288 remote-endpoint = <&hdmi_connector_in>; 289 }; 290 }; 291 }; 292 }; 293}; 294 295&mdss { 296 status = "okay"; 297}; 298 299&mdss_dp0 { 300 status = "okay"; 301}; 302 303&mdss_dp0_out { 304 data-lanes = <0 1 2 3>; 305 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 306}; 307 308&mdss_dp0_phy { 309 status = "okay"; 310}; 311 312&mdss_dsi0 { 313 status = "okay"; 314}; 315 316&mdss_dsi0_out { 317 remote-endpoint = <&adv7535_in>; 318 data-lanes = <0 1 2 3>; 319}; 320 321&mdss_dsi0_phy { 322 status = "okay"; 323}; 324 325&pcie0 { 326 pinctrl-0 = <&pcie0_default_state>; 327 pinctrl-names = "default"; 328 329 vddpe-3v3-supply = <&vdc_3v3>; 330}; 331 332&pcie1 { 333 pinctrl-0 = <&pcie1_default_state>; 334 pinctrl-names = "default"; 335 336 vddpe-3v3-supply = <&vreg_nvme>; 337}; 338 339&pcieport0 { 340 reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 341 342 pci@0,0 { 343 #address-cells = <3>; 344 #size-cells = <2>; 345 device_type = "pci"; 346 bus-range = <0x01 0xff>; 347 ranges; 348 reg = <0x010000 0x00 0x00 0x00 0x00>; 349 350 pci@2,0 { 351 #address-cells = <3>; 352 #size-cells = <2>; 353 device_type = "pci"; 354 bus-range = <0x00 0xff>; 355 ranges; 356 reg = <0x021000 0x00 0x00 0x00 0x00>; 357 358 usb@0 { 359 compatible = "pci104c,8241"; 360 reg = <0 0 0 0 0>; 361 ti,pwron-active-high; 362 }; 363 }; 364 }; 365}; 366 367&pcieport1 { 368 reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; 369}; 370 371&tlmm { 372 pcie0_default_state: pcie0-default-state { 373 wake-pins { 374 pins = "gpio0"; 375 function = "gpio"; 376 drive-strength = <2>; 377 bias-pull-up; 378 }; 379 380 clkreq-pins { 381 pins = "gpio1"; 382 function = "pcie0_clkreq"; 383 drive-strength = <2>; 384 bias-pull-up; 385 }; 386 387 perst-pins { 388 pins = "gpio2"; 389 function = "gpio"; 390 drive-strength = <2>; 391 bias-pull-up; 392 }; 393 }; 394 395 ethernet0_default: ethernet0-default-state { 396 ethernet0_mdc: ethernet0-mdc-pins { 397 pins = "gpio5"; 398 function = "emac0_mdc"; 399 drive-strength = <16>; 400 bias-pull-up; 401 }; 402 403 ethernet0_mdio: ethernet0-mdio-pins { 404 pins = "gpio6"; 405 function = "emac0_mdio"; 406 drive-strength = <16>; 407 bias-pull-up; 408 }; 409 }; 410 411 max98091_default: max98091-default-state { 412 pins = "gpio16"; 413 function = "gpio"; 414 bias-pull-up; 415 }; 416 417 pcie1_default_state: pcie1-default-state { 418 wake-pins { 419 pins = "gpio21"; 420 function = "gpio"; 421 drive-strength = <2>; 422 bias-pull-up; 423 }; 424 425 clkreq-pins { 426 pins = "gpio22"; 427 function = "pcie1_clkreq"; 428 drive-strength = <2>; 429 bias-pull-up; 430 }; 431 432 perst-pins { 433 pins = "gpio23"; 434 function = "gpio"; 435 drive-strength = <2>; 436 bias-pull-up; 437 }; 438 }; 439 440 gpio_keys_default: gpio-keys-default-state { 441 pins = "gpio79"; 442 function = "gpio"; 443 bias-disable; 444 }; 445 446 adv7535_default: adv7535-default-state { 447 pins = "gpio93"; 448 function = "gpio"; 449 bias-pull-up; 450 }; 451}; 452 453&uart7 { 454 status = "okay"; 455}; 456 457&usb_1 { 458 status = "okay"; 459}; 460 461/* Internally connected to the MCU (e.g. for DFU). */ 462&usb_2 { 463 dr_mode = "host"; 464 465 status = "okay"; 466}; 467