1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2025, Altera Corporation 4 */ 5#include "socfpga_agilex5.dtsi" 6 7/ { 8 model = "SoCFPGA Agilex5 013B SoCDK"; 9 compatible = "intel,socfpga-agilex5-socdk-013b", "intel,socfpga-agilex5"; 10 11 aliases { 12 serial0 = &uart0; 13 ethernet2 = &gmac2; 14 }; 15 16 chosen { 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 leds { 21 compatible = "gpio-leds"; 22 23 led0 { 24 label = "hps_led0"; 25 gpios = <&porta 1 GPIO_ACTIVE_HIGH>; 26 }; 27 28 led1 { 29 label = "hps_led1"; 30 gpios = <&porta 12 GPIO_ACTIVE_HIGH>; 31 }; 32 33 }; 34 35 memory@80000000 { 36 device_type = "memory"; 37 /* We expect the bootloader to fill in the reg */ 38 reg = <0x0 0x80000000 0x0 0x0>; 39 }; 40}; 41 42&gmac2 { 43 status = "okay"; 44 phy-mode = "rgmii-id"; 45 phy-handle = <&emac2_phy0>; 46 max-frame-size = <9000>; 47 48 mdio0 { 49 #address-cells = <1>; 50 #size-cells = <0>; 51 compatible = "snps,dwmac-mdio"; 52 53 emac2_phy0: ethernet-phy@0 { 54 reg = <0>; 55 rxc-skew-ps = <0>; 56 rxdv-skew-ps = <0>; 57 rxd0-skew-ps = <0>; 58 rxd1-skew-ps = <0>; 59 rxd2-skew-ps = <0>; 60 rxd3-skew-ps = <0>; 61 txc-skew-ps = <0>; 62 txen-skew-ps = <60>; 63 txd0-skew-ps = <60>; 64 txd1-skew-ps = <60>; 65 txd2-skew-ps = <60>; 66 txd3-skew-ps = <60>; 67 }; 68 }; 69}; 70 71&gpio0 { 72 status = "okay"; 73}; 74 75&gpio1 { 76 status = "okay"; 77}; 78 79&osc1 { 80 clock-frequency = <25000000>; 81}; 82 83&qspi { 84 status = "okay"; 85 flash@0 { 86 compatible = "jedec,spi-nor"; 87 reg = <0>; 88 spi-max-frequency = <100000000>; 89 m25p,fast-read; 90 cdns,read-delay = <2>; 91 cdns,tshsl-ns = <50>; 92 cdns,tsd2d-ns = <50>; 93 cdns,tchsh-ns = <4>; 94 cdns,tslch-ns = <4>; 95 spi-tx-bus-width = <4>; 96 spi-rx-bus-width = <4>; 97 98 partitions { 99 compatible = "fixed-partitions"; 100 #address-cells = <1>; 101 #size-cells = <1>; 102 103 qspi_boot: partition@0 { 104 label = "u-boot"; 105 reg = <0x0 0x00c00000>; 106 }; 107 108 root: partition@c00000 { 109 label = "root"; 110 reg = <0x00c00000 0x03400000>; 111 }; 112 }; 113 }; 114}; 115 116&smmu { 117 status = "okay"; 118}; 119 120&uart0 { 121 status = "okay"; 122}; 123 124&watchdog0 { 125 status = "okay"; 126}; 127