1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2023 Gateworks Corporation 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/phy/phy-imx8-pcie.h> 9 10/ { 11 connector { 12 compatible = "gpio-usb-b-connector", "usb-b-connector"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_usbcon1>; 15 type = "micro"; 16 label = "Type-C"; 17 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 18 19 port { 20 usb_dr_connector: endpoint { 21 remote-endpoint = <&usb3_dwc>; 22 }; 23 }; 24 }; 25 26 led-controller { 27 compatible = "gpio-leds"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pinctrl_gpio_leds>; 30 31 led-0 { 32 function = LED_FUNCTION_STATUS; 33 color = <LED_COLOR_ID_GREEN>; 34 gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; 35 default-state = "on"; 36 linux,default-trigger = "heartbeat"; 37 }; 38 39 led-1 { 40 function = LED_FUNCTION_STATUS; 41 color = <LED_COLOR_ID_RED>; 42 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; 43 default-state = "off"; 44 }; 45 }; 46 47 pcie0_refclk: clock-pcie0 { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <100000000>; 51 }; 52 53 pps { 54 compatible = "pps-gpio"; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&pinctrl_pps>; 57 gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 58 status = "okay"; 59 }; 60}; 61 62/* off-board header */ 63&ecspi2 { 64 pinctrl-names = "default"; 65 pinctrl-0 = <&pinctrl_spi2>; 66 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 67 status = "okay"; 68}; 69 70&gpio4 { 71 gpio-line-names = 72 "", "", "", "", 73 "", "", "", "", 74 "dio1", "", "", "dio0", 75 "", "", "pci_usb_sel", "", 76 "", "", "", "", 77 "", "", "", "", 78 "dio3", "", "dio2", "", 79 "pci_wdis#", "", "", ""; 80}; 81 82&i2c2 { 83 clock-frequency = <400000>; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&pinctrl_i2c2>; 86 status = "okay"; 87 88 accelerometer@19 { 89 compatible = "st,lis2de12"; 90 reg = <0x19>; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&pinctrl_accel>; 93 st,drdy-int-pin = <1>; 94 interrupt-parent = <&gpio4>; 95 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 96 }; 97}; 98 99&pcie_phy { 100 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 101 fsl,clkreq-unsupported; 102 clocks = <&pcie0_refclk>; 103 clock-names = "ref"; 104 status = "okay"; 105}; 106 107&pcie { 108 pinctrl-names = "default"; 109 pinctrl-0 = <&pinctrl_pcie0>; 110 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 111 status = "okay"; 112}; 113 114/* GPS */ 115&uart1 { 116 pinctrl-names = "default"; 117 pinctrl-0 = <&pinctrl_uart1>; 118 status = "okay"; 119}; 120 121/* off-board header */ 122&uart3 { 123 pinctrl-names = "default"; 124 pinctrl-0 = <&pinctrl_uart3>; 125 status = "okay"; 126}; 127 128/* USB1 Type-C front panel */ 129&usb3_0 { 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_usb1>; 132 fsl,over-current-active-low; 133 status = "okay"; 134}; 135 136&usb3_phy0 { 137 status = "okay"; 138}; 139 140&usb_dwc3_0 { 141 /* dual role is implemented but not a full featured OTG */ 142 adp-disable; 143 hnp-disable; 144 srp-disable; 145 dr_mode = "otg"; 146 usb-role-switch; 147 role-switch-default-mode = "peripheral"; 148 status = "okay"; 149 150 port { 151 usb3_dwc: endpoint { 152 remote-endpoint = <&usb_dr_connector>; 153 }; 154 }; 155}; 156 157/* USB2 - MiniPCIe socket */ 158&usb3_1 { 159 fsl,permanently-attached; 160 fsl,disable-port-power-control; 161 status = "okay"; 162}; 163 164&usb3_phy1 { 165 status = "okay"; 166}; 167 168&usb_dwc3_1 { 169 dr_mode = "host"; 170 status = "okay"; 171}; 172 173&iomuxc { 174 pinctrl-names = "default"; 175 pinctrl-0 = <&pinctrl_hog>; 176 177 pinctrl_hog: hoggrp { 178 fsl,pins = < 179 MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ 180 MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ 181 MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */ 182 MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */ 183 MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */ 184 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */ 185 >; 186 }; 187 188 pinctrl_accel: accelgrp { 189 fsl,pins = < 190 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */ 191 >; 192 }; 193 194 pinctrl_gpio_leds: gpioledgrp { 195 fsl,pins = < 196 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ 197 MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ 198 >; 199 }; 200 201 pinctrl_pcie0: pcie0grp { 202 fsl,pins = < 203 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 204 >; 205 }; 206 207 pinctrl_pps: ppsgrp { 208 fsl,pins = < 209 MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 210 >; 211 }; 212 213 pinctrl_usb1: usb1grp { 214 fsl,pins = < 215 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */ 216 >; 217 }; 218 219 pinctrl_usbcon1: usbcon1grp { 220 fsl,pins = < 221 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */ 222 >; 223 }; 224 225 pinctrl_spi2: spi2grp { 226 fsl,pins = < 227 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140 228 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 229 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 230 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 231 >; 232 }; 233 234 pinctrl_uart1: uart1grp { 235 fsl,pins = < 236 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 237 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 238 >; 239 }; 240 241 pinctrl_uart3: uart3grp { 242 fsl,pins = < 243 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 244 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 245 >; 246 }; 247}; 248