1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (c) 2024 Blaize, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include "blaize-blzp1600-som.dtsi" 9 10/ { 11 model = "Blaize BLZP1600 SoM1600P CB2 Development Board"; 12 13 compatible = "blaize,blzp1600-cb2", "blaize,blzp1600"; 14 15 aliases { 16 serial0 = &uart0; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200"; 21 }; 22}; 23 24&i2c0 { 25 clock-frequency = <100000>; 26 status = "okay"; 27}; 28 29&i2c1 { 30 clock-frequency = <100000>; 31 status = "okay"; 32}; 33 34&i2c3 { 35 clock-frequency = <100000>; 36 status = "okay"; 37 38 gpio_expander: gpio@74 { 39 compatible = "ti,tca9539"; 40 reg = <0x74>; 41 gpio-controller; 42 #gpio-cells = <2>; 43 gpio-line-names = "RSP_PIN_7", /* GPIO_0 */ 44 "RSP_PIN_11", /* GPIO_1 */ 45 "RSP_PIN_13", /* GPIO_2 */ 46 "RSP_PIN_15", /* GPIO_3 */ 47 "RSP_PIN_27", /* GPIO_4 */ 48 "RSP_PIN_29", /* GPIO_5 */ 49 "RSP_PIN_31", /* GPIO_6 */ 50 "RSP_PIN_33", /* GPIO_7 */ 51 "RSP_PIN_37", /* GPIO_8 */ 52 "RSP_PIN_16", /* GPIO_9 */ 53 "RSP_PIN_18", /* GPIO_10 */ 54 "RSP_PIN_22", /* GPIO_11 */ 55 "RSP_PIN_28", /* GPIO_12 */ 56 "RSP_PIN_32", /* GPIO_13 */ 57 "RSP_PIN_36", /* GPIO_14 */ 58 "TP31"; /* GPIO_15 */ 59 }; 60 61 gpio_expander_m2: gpio@75 { 62 compatible = "ti,tca9539"; 63 reg = <0x75>; 64 gpio-controller; 65 #gpio-cells = <2>; 66 gpio-line-names = "M2_W_DIS1_N", /* GPIO_0 */ 67 "M2_W_DIS2_N", /* GPIO_1 */ 68 "M2_UART_WAKE_N", /* GPIO_2 */ 69 "M2_COEX3", /* GPIO_3 */ 70 "M2_COEX_RXD", /* GPIO_4 */ 71 "M2_COEX_TXD", /* GPIO_5 */ 72 "M2_VENDOR_PIN40", /* GPIO_6 */ 73 "M2_VENDOR_PIN42", /* GPIO_7 */ 74 "M2_VENDOR_PIN38", /* GPIO_8 */ 75 "M2_SDIO_RST_N", /* GPIO_9 */ 76 "M2_SDIO_WAKE_N", /* GPIO_10 */ 77 "M2_PETN1", /* GPIO_11 */ 78 "M2_PERP1", /* GPIO_12 */ 79 "M2_PERN1", /* GPIO_13 */ 80 "UIM_SWP", /* GPIO_14 */ 81 "UART1_TO_RSP"; /* GPIO_15 */ 82 }; 83}; 84 85&gpio0 { 86 status = "okay"; 87 gpio-line-names = "PERST_N", /* GPIO_0 */ 88 "LM96063_ALERT_N", /* GPIO_1 */ 89 "INA3221_PV", /* GPIO_2 */ 90 "INA3221_CRIT", /* GPIO_3 */ 91 "INA3221_WARN", /* GPIO_4 */ 92 "INA3221_TC", /* GPIO_5 */ 93 "QSPI0_RST_N", /* GPIO_6 */ 94 "LM96063_TCRIT_N", /* GPIO_7 */ 95 "DSI_TCH_INT", /* GPIO_8 */ 96 "DSI_RST", /* GPIO_9 */ 97 "DSI_BL", /* GPIO_10 */ 98 "DSI_INT", /* GPIO_11 */ 99 "ETH_RST", /* GPIO_12 */ 100 "CSI0_RST", /* GPIO_13 */ 101 "CSI0_PWDN", /* GPIO_14 */ 102 "CSI1_RST", /* GPIO_15 */ 103 "CSI1_PWDN", /* GPIO_16 */ 104 "CSI2_RST", /* GPIO_17 */ 105 "CSI2_PWDN", /* GPIO_18 */ 106 "CSI3_RST", /* GPIO_19 */ 107 "CSI3_PWDN", /* GPIO_20 */ 108 "ADAC_RST", /* GPIO_21 */ 109 "SD_SW_VDD", /* GPIO_22 */ 110 "SD_PON_VDD", /* GPIO_23 */ 111 "GPIO_EXP_INT", /* GPIO_24 */ 112 "BOARD_ID_0", /* GPIO_25 */ 113 "SDIO1_SW_VDD", /* GPIO_26 */ 114 "SDIO1_PON_VDD", /* GPIO_27 */ 115 "SDIO2_SW_VDD", /* GPIO_28 */ 116 "SDIO2_PON_VDD", /* GPIO_29 */ 117 "BOARD_ID_1", /* GPIO_30 */ 118 "BOARD_ID_2"; /* GPIO_31 */ 119}; 120