1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Devices used on die 0 on the Apple T6022 "M2 Ultra" SoC and present on 4 * Apple T6020 / T6021 "M2 Pro" / "M2 Max". 5 * 6 * Copyright The Asahi Linux Contributors 7 */ 8 9 nco: clock-controller@28e03c000 { 10 compatible = "apple,t6020-nco", "apple,t8103-nco"; 11 reg = <0x2 0x8e03c000 0x0 0x14000>; 12 clocks = <&nco_clkref>; 13 #clock-cells = <1>; 14 }; 15 16 aic: interrupt-controller@28e100000 { 17 compatible = "apple,t6020-aic", "apple,aic2"; 18 #interrupt-cells = <4>; 19 interrupt-controller; 20 reg = <0x2 0x8e100000 0x0 0xc000>, 21 <0x2 0x8e10c000 0x0 0x1000>; 22 reg-names = "core", "event"; 23 power-domains = <&ps_aic>; 24 }; 25 26 nub_spmi0: spmi@29e114000 { 27 compatible = "apple,t6020-spmi", "apple,t8103-spmi"; 28 reg = <0x2 0x9e114000 0x0 0x100>; 29 #address-cells = <2>; 30 #size-cells = <0>; 31 32 pmic1: pmic@f { 33 compatible = "apple,maverick-pmic", "apple,spmi-nvmem"; 34 reg = <0xb SPMI_USID>; 35 36 nvmem-layout { 37 compatible = "fixed-layout"; 38 #address-cells = <1>; 39 #size-cells = <1>; 40 41 pm_setting: pm-setting@1405 { 42 reg = <0x1405 0x1>; 43 }; 44 45 rtc_offset: rtc-offset@1411 { 46 reg = <0x1411 0x6>; 47 }; 48 49 boot_stage: boot-stage@6001 { 50 reg = <0x6001 0x1>; 51 }; 52 53 boot_error_count: boot-error-count@6002,0 { 54 reg = <0x6002 0x1>; 55 bits = <0 4>; 56 }; 57 58 panic_count: panic-count@6002,4 { 59 reg = <0x6002 0x1>; 60 bits = <4 4>; 61 }; 62 63 boot_error_stage: boot-error-stage@6003 { 64 reg = <0x6003 0x1>; 65 }; 66 67 shutdown_flag: shutdown-flag@600f,3 { 68 reg = <0x600f 0x1>; 69 bits = <3 1>; 70 }; 71 72 fault_shadow: fault-shadow@867b { 73 reg = <0x867b 0x10>; 74 }; 75 76 socd: socd@8b00 { 77 reg = <0x8b00 0x400>; 78 }; 79 }; 80 }; 81 }; 82 83 wdt: watchdog@29e2c4000 { 84 compatible = "apple,t6020-wdt", "apple,t8103-wdt"; 85 reg = <0x2 0x9e2c4000 0x0 0x4000>; 86 clocks = <&clkref>; 87 interrupt-parent = <&aic>; 88 interrupts = <AIC_IRQ 0 719 IRQ_TYPE_LEVEL_HIGH>; 89 }; 90 91 smc_mbox: mbox@2a2408000 { 92 compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4"; 93 reg = <0x2 0xa2408000 0x0 0x4000>; 94 interrupt-parent = <&aic>; 95 interrupts = <AIC_IRQ 0 862 IRQ_TYPE_LEVEL_HIGH>, 96 <AIC_IRQ 0 863 IRQ_TYPE_LEVEL_HIGH>, 97 <AIC_IRQ 0 864 IRQ_TYPE_LEVEL_HIGH>, 98 <AIC_IRQ 0 865 IRQ_TYPE_LEVEL_HIGH>; 99 interrupt-names = "send-empty", "send-not-empty", 100 "recv-empty", "recv-not-empty"; 101 #mbox-cells = <0>; 102 }; 103 104 smc: smc@2a2400000 { 105 compatible = "apple,t6020-smc", "apple,t8103-smc"; 106 reg = <0x2 0xa2400000 0x0 0x4000>, 107 <0x2 0xa3e00000 0x0 0x100000>; 108 reg-names = "smc", "sram"; 109 mboxes = <&smc_mbox>; 110 111 smc_gpio: gpio { 112 compatible = "apple,smc-gpio"; 113 gpio-controller; 114 #gpio-cells = <2>; 115 }; 116 117 smc_reboot: reboot { 118 compatible = "apple,smc-reboot"; 119 nvmem-cells = <&shutdown_flag>, <&boot_stage>, 120 <&boot_error_count>, <&panic_count>; 121 nvmem-cell-names = "shutdown_flag", "boot_stage", 122 "boot_error_count", "panic_count"; 123 }; 124 125 rtc { 126 compatible = "apple,smc-rtc"; 127 nvmem-cells = <&rtc_offset>; 128 nvmem-cell-names = "rtc_offset"; 129 }; 130 }; 131 132 pinctrl_smc: pinctrl@2a2820000 { 133 compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl"; 134 reg = <0x2 0xa2820000 0x0 0x4000>; 135 136 gpio-controller; 137 #gpio-cells = <2>; 138 gpio-ranges = <&pinctrl_smc 0 0 30>; 139 apple,npins = <30>; 140 141 interrupt-controller; 142 #interrupt-cells = <2>; 143 interrupt-parent = <&aic>; 144 interrupts = <AIC_IRQ 0 851 IRQ_TYPE_LEVEL_HIGH>, 145 <AIC_IRQ 0 852 IRQ_TYPE_LEVEL_HIGH>, 146 <AIC_IRQ 0 853 IRQ_TYPE_LEVEL_HIGH>, 147 <AIC_IRQ 0 854 IRQ_TYPE_LEVEL_HIGH>, 148 <AIC_IRQ 0 855 IRQ_TYPE_LEVEL_HIGH>, 149 <AIC_IRQ 0 856 IRQ_TYPE_LEVEL_HIGH>, 150 <AIC_IRQ 0 857 IRQ_TYPE_LEVEL_HIGH>; 151 }; 152 153 sio_dart: iommu@39b008000 { 154 compatible = "apple,t6020-dart", "apple,t8110-dart"; 155 reg = <0x3 0x9b008000 0x0 0x8000>; 156 interrupt-parent = <&aic>; 157 interrupts = <AIC_IRQ 0 1231 IRQ_TYPE_LEVEL_HIGH>; 158 #iommu-cells = <1>; 159 power-domains = <&ps_sio_cpu>; 160 }; 161 162 fpwm0: pwm@39b030000 { 163 compatible = "apple,t6020-fpwm", "apple,s5l-fpwm"; 164 reg = <0x3 0x9b030000 0x0 0x4000>; 165 power-domains = <&ps_fpwm0>; 166 clocks = <&clkref>; 167 #pwm-cells = <2>; 168 status = "disabled"; 169 }; 170 171 i2c0: i2c@39b040000 { 172 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 173 reg = <0x3 0x9b040000 0x0 0x4000>; 174 clocks = <&clkref>; 175 interrupt-parent = <&aic>; 176 interrupts = <AIC_IRQ 0 1219 IRQ_TYPE_LEVEL_HIGH>; 177 pinctrl-0 = <&i2c0_pins>; 178 pinctrl-names = "default"; 179 power-domains = <&ps_i2c0>; 180 #address-cells = <0x1>; 181 #size-cells = <0x0>; 182 }; 183 184 i2c1: i2c@39b044000 { 185 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 186 reg = <0x3 0x9b044000 0x0 0x4000>; 187 clocks = <&clkref>; 188 interrupt-parent = <&aic>; 189 interrupts = <AIC_IRQ 0 1220 IRQ_TYPE_LEVEL_HIGH>; 190 pinctrl-0 = <&i2c1_pins>; 191 pinctrl-names = "default"; 192 power-domains = <&ps_i2c1>; 193 #address-cells = <0x1>; 194 #size-cells = <0x0>; 195 status = "disabled"; 196 }; 197 198 i2c2: i2c@39b048000 { 199 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 200 reg = <0x3 0x9b048000 0x0 0x4000>; 201 clocks = <&clkref>; 202 interrupt-parent = <&aic>; 203 interrupts = <AIC_IRQ 0 1221 IRQ_TYPE_LEVEL_HIGH>; 204 pinctrl-0 = <&i2c2_pins>; 205 pinctrl-names = "default"; 206 power-domains = <&ps_i2c2>; 207 #address-cells = <0x1>; 208 #size-cells = <0x0>; 209 status = "disabled"; 210 }; 211 212 i2c3: i2c@39b04c000 { 213 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 214 reg = <0x3 0x9b04c000 0x0 0x4000>; 215 clocks = <&clkref>; 216 interrupt-parent = <&aic>; 217 interrupts = <AIC_IRQ 0 1222 IRQ_TYPE_LEVEL_HIGH>; 218 pinctrl-0 = <&i2c3_pins>; 219 pinctrl-names = "default"; 220 power-domains = <&ps_i2c3>; 221 #address-cells = <0x1>; 222 #size-cells = <0x0>; 223 status = "disabled"; 224 }; 225 226 i2c4: i2c@39b050000 { 227 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 228 reg = <0x3 0x9b050000 0x0 0x4000>; 229 clocks = <&clkref>; 230 interrupt-parent = <&aic>; 231 interrupts = <AIC_IRQ 0 1223 IRQ_TYPE_LEVEL_HIGH>; 232 pinctrl-0 = <&i2c4_pins>; 233 pinctrl-names = "default"; 234 power-domains = <&ps_i2c4>; 235 #address-cells = <0x1>; 236 #size-cells = <0x0>; 237 status = "disabled"; 238 }; 239 240 i2c5: i2c@39b054000 { 241 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 242 reg = <0x3 0x9b054000 0x0 0x4000>; 243 clocks = <&clkref>; 244 interrupt-parent = <&aic>; 245 interrupts = <AIC_IRQ 0 1224 IRQ_TYPE_LEVEL_HIGH>; 246 pinctrl-0 = <&i2c5_pins>; 247 pinctrl-names = "default"; 248 power-domains = <&ps_i2c5>; 249 #address-cells = <0x1>; 250 #size-cells = <0x0>; 251 status = "disabled"; 252 }; 253 254 i2c6: i2c@39b054000 { 255 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 256 reg = <0x3 0x9b054000 0x0 0x4000>; 257 clocks = <&clkref>; 258 interrupt-parent = <&aic>; 259 interrupts = <AIC_IRQ 0 1225 IRQ_TYPE_LEVEL_HIGH>; 260 pinctrl-0 = <&i2c6_pins>; 261 pinctrl-names = "default"; 262 power-domains = <&ps_i2c6>; 263 #address-cells = <0x1>; 264 #size-cells = <0x0>; 265 status = "disabled"; 266 }; 267 268 i2c7: i2c@39b054000 { 269 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 270 reg = <0x3 0x9b054000 0x0 0x4000>; 271 clocks = <&clkref>; 272 interrupt-parent = <&aic>; 273 interrupts = <AIC_IRQ 0 1226 IRQ_TYPE_LEVEL_HIGH>; 274 pinctrl-0 = <&i2c7_pins>; 275 pinctrl-names = "default"; 276 power-domains = <&ps_i2c7>; 277 #address-cells = <0x1>; 278 #size-cells = <0x0>; 279 status = "disabled"; 280 }; 281 282 i2c8: i2c@39b054000 { 283 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 284 reg = <0x3 0x9b054000 0x0 0x4000>; 285 clocks = <&clkref>; 286 interrupt-parent = <&aic>; 287 interrupts = <AIC_IRQ 0 1227 IRQ_TYPE_LEVEL_HIGH>; 288 pinctrl-0 = <&i2c8_pins>; 289 pinctrl-names = "default"; 290 power-domains = <&ps_i2c8>; 291 #address-cells = <0x1>; 292 #size-cells = <0x0>; 293 status = "disabled"; 294 }; 295 296 spi1: spi@39b104000 { 297 compatible = "apple,t6020-spi", "apple,t8103-spi"; 298 reg = <0x3 0x9b104000 0x0 0x4000>; 299 interrupt-parent = <&aic>; 300 interrupts = <AIC_IRQ 0 1206 IRQ_TYPE_LEVEL_HIGH>; 301 #address-cells = <1>; 302 #size-cells = <0>; 303 clocks = <&clk_200m>; 304 pinctrl-0 = <&spi1_pins>; 305 pinctrl-names = "default"; 306 power-domains = <&ps_spi1>; 307 status = "disabled"; 308 }; 309 310 spi2: spi@39b108000 { 311 compatible = "apple,t6020-spi", "apple,t8103-spi"; 312 reg = <0x3 0x9b108000 0x0 0x4000>; 313 interrupt-parent = <&aic>; 314 interrupts = <AIC_IRQ 0 1207 IRQ_TYPE_LEVEL_HIGH>; 315 #address-cells = <1>; 316 #size-cells = <0>; 317 clocks = <&clkref>; 318 pinctrl-0 = <&spi2_pins>; 319 pinctrl-names = "default"; 320 power-domains = <&ps_spi2>; 321 status = "disabled"; 322 }; 323 324 spi4: spi@39b110000 { 325 compatible = "apple,t6020-spi", "apple,t8103-spi"; 326 reg = <0x3 0x9b110000 0x0 0x4000>; 327 interrupt-parent = <&aic>; 328 interrupts = <AIC_IRQ 0 1209 IRQ_TYPE_LEVEL_HIGH>; 329 #address-cells = <1>; 330 #size-cells = <0>; 331 clocks = <&clkref>; 332 pinctrl-0 = <&spi4_pins>; 333 pinctrl-names = "default"; 334 power-domains = <&ps_spi4>; 335 status = "disabled"; 336 }; 337 338 serial0: serial@39b200000 { 339 compatible = "apple,s5l-uart"; 340 reg = <0x3 0x9b200000 0x0 0x4000>; 341 reg-io-width = <4>; 342 interrupt-parent = <&aic>; 343 interrupts = <AIC_IRQ 0 1198 IRQ_TYPE_LEVEL_HIGH>; 344 /* 345 * TODO: figure out the clocking properly, there may 346 * be a third selectable clock. 347 */ 348 clocks = <&clkref>, <&clkref>; 349 clock-names = "uart", "clk_uart_baud0"; 350 power-domains = <&ps_uart0>; 351 status = "disabled"; 352 }; 353 354 admac: dma-controller@39b400000 { 355 compatible = "apple,t6020-admac", "apple,t8103-admac"; 356 reg = <0x3 0x9b400000 0x0 0x34000>; 357 #dma-cells = <1>; 358 dma-channels = <16>; 359 interrupts-extended = <0>, 360 <&aic AIC_IRQ 0 1218 IRQ_TYPE_LEVEL_HIGH>, 361 <0>, 362 <0>; 363 iommus = <&sio_dart 2>; 364 power-domains = <&ps_sio_adma>; 365 resets = <&ps_audio_p>; 366 }; 367 368 mca: mca@39b600000 { 369 compatible = "apple,t6020-mca", "apple,t8103-mca"; 370 reg = <0x3 0x9b600000 0x0 0x10000>, 371 <0x3 0x9b500000 0x0 0x20000>; 372 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; 373 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, 374 <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, 375 <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, 376 <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; 377 dma-names = "tx0a", "rx0a", "tx0b", "rx0b", 378 "tx1a", "rx1a", "tx1b", "rx1b", 379 "tx2a", "rx2a", "tx2b", "rx2b", 380 "tx3a", "rx3a", "tx3b", "rx3b"; 381 interrupt-parent = <&aic>; 382 interrupts = <AIC_IRQ 0 1211 IRQ_TYPE_LEVEL_HIGH>, 383 <AIC_IRQ 0 1212 IRQ_TYPE_LEVEL_HIGH>, 384 <AIC_IRQ 0 1213 IRQ_TYPE_LEVEL_HIGH>, 385 <AIC_IRQ 0 1214 IRQ_TYPE_LEVEL_HIGH>; 386 power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, 387 <&ps_mca2>, <&ps_mca3>; 388 resets = <&ps_audio_p>; 389 #sound-dai-cells = <1>; 390 }; 391 392 gpu: gpu@406400000 { 393 compatible = "apple,agx-g14s"; 394 reg = <0x4 0x6400000 0 0x40000>, 395 <0x4 0x4000000 0 0x1000000>; 396 reg-names = "asc", "sgx"; 397 mboxes = <&agx_mbox>; 398 power-domains = <&ps_gfx>; 399 memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, 400 <&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>; 401 memory-region-names = "ttbs", "pagetables", "handoff", 402 "hw-cal-a", "hw-cal-b", "globals"; 403 404 apple,firmware-abi = <0 0 0>; 405 }; 406 407 agx_mbox: mbox@406408000 { 408 compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4"; 409 reg = <0x4 0x6408000 0x0 0x4000>; 410 interrupt-parent = <&aic>; 411 interrupts = <AIC_IRQ 0 1143 IRQ_TYPE_LEVEL_HIGH>, 412 <AIC_IRQ 0 1144 IRQ_TYPE_LEVEL_HIGH>, 413 <AIC_IRQ 0 1145 IRQ_TYPE_LEVEL_HIGH>, 414 <AIC_IRQ 0 1146 IRQ_TYPE_LEVEL_HIGH>; 415 interrupt-names = "send-empty", "send-not-empty", 416 "recv-empty", "recv-not-empty"; 417 #mbox-cells = <0>; 418 }; 419 420 pcie0: pcie@580000000 { 421 compatible = "apple,t6020-pcie"; 422 device_type = "pci"; 423 424 reg = <0x5 0x80000000 0x0 0x1000000>, /* config */ 425 <0x5 0x91000000 0x0 0x4000>, /* rc */ 426 <0x5 0x94008000 0x0 0x4000>, /* port0 */ 427 <0x5 0x95008000 0x0 0x4000>, /* port1 */ 428 <0x5 0x96008000 0x0 0x4000>, /* port2 */ 429 <0x5 0x97008000 0x0 0x4000>, /* port3 */ 430 <0x5 0x9e00c000 0x0 0x4000>, /* phy0 */ 431 <0x5 0x9e010000 0x0 0x4000>, /* phy1 */ 432 <0x5 0x9e014000 0x0 0x4000>, /* phy2 */ 433 <0x5 0x9e018000 0x0 0x4000>; /* phy3 */ 434 reg-names = "config", "rc", 435 "port0", "port1", "port2", "port3", 436 "phy0", "phy1", "phy2", "phy3"; 437 438 interrupt-parent = <&aic>; 439 interrupts = <AIC_IRQ 0 1340 IRQ_TYPE_LEVEL_HIGH>, 440 <AIC_IRQ 0 1344 IRQ_TYPE_LEVEL_HIGH>, 441 <AIC_IRQ 0 1348 IRQ_TYPE_LEVEL_HIGH>, 442 <AIC_IRQ 0 1352 IRQ_TYPE_LEVEL_HIGH>; 443 444 msi-controller; 445 msi-parent = <&pcie0>; 446 msi-ranges = <&aic AIC_IRQ 0 1672 IRQ_TYPE_EDGE_RISING 32>; 447 448 iommu-map = <0x100 &pcie0_dart_0 1 1>, 449 <0x200 &pcie0_dart_1 1 1>, 450 <0x300 &pcie0_dart_2 1 1>, 451 <0x400 &pcie0_dart_3 1 1>; 452 iommu-map-mask = <0xff00>; 453 454 bus-range = <0 4>; 455 #address-cells = <3>; 456 #size-cells = <2>; 457 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, 458 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; 459 460 power-domains = <&ps_apcie_gp_sys>; 461 pinctrl-0 = <&pcie_pins>; 462 pinctrl-names = "default"; 463 464 port00: pci@0,0 { 465 device_type = "pci"; 466 reg = <0x0 0x0 0x0 0x0 0x0>; 467 reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>; 468 469 #address-cells = <3>; 470 #size-cells = <2>; 471 ranges; 472 473 interrupt-controller; 474 #interrupt-cells = <1>; 475 476 interrupt-map-mask = <0 0 0 7>; 477 interrupt-map = <0 0 0 1 &port00 0 0 0 0>, 478 <0 0 0 2 &port00 0 0 0 1>, 479 <0 0 0 3 &port00 0 0 0 2>, 480 <0 0 0 4 &port00 0 0 0 3>; 481 }; 482 483 port01: pci@1,0 { 484 device_type = "pci"; 485 reg = <0x800 0x0 0x0 0x0 0x0>; 486 reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>; 487 488 #address-cells = <3>; 489 #size-cells = <2>; 490 ranges; 491 492 interrupt-controller; 493 #interrupt-cells = <1>; 494 495 interrupt-map-mask = <0 0 0 7>; 496 interrupt-map = <0 0 0 1 &port01 0 0 0 0>, 497 <0 0 0 2 &port01 0 0 0 1>, 498 <0 0 0 3 &port01 0 0 0 2>, 499 <0 0 0 4 &port01 0 0 0 3>; 500 status = "disabled"; 501 }; 502 503 port02: pci@2,0 { 504 device_type = "pci"; 505 reg = <0x1000 0x0 0x0 0x0 0x0>; 506 reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>; 507 508 #address-cells = <3>; 509 #size-cells = <2>; 510 ranges; 511 512 interrupt-controller; 513 #interrupt-cells = <1>; 514 515 interrupt-map-mask = <0 0 0 7>; 516 interrupt-map = <0 0 0 1 &port02 0 0 0 0>, 517 <0 0 0 2 &port02 0 0 0 1>, 518 <0 0 0 3 &port02 0 0 0 2>, 519 <0 0 0 4 &port02 0 0 0 3>; 520 status = "disabled"; 521 }; 522 523 port03: pci@3,0 { 524 device_type = "pci"; 525 reg = <0x1800 0x0 0x0 0x0 0x0>; 526 reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>; 527 528 #address-cells = <3>; 529 #size-cells = <2>; 530 ranges; 531 532 interrupt-controller; 533 #interrupt-cells = <1>; 534 535 interrupt-map-mask = <0 0 0 7>; 536 interrupt-map = <0 0 0 1 &port03 0 0 0 0>, 537 <0 0 0 2 &port03 0 0 0 1>, 538 <0 0 0 3 &port03 0 0 0 2>, 539 <0 0 0 4 &port03 0 0 0 3>; 540 status = "disabled"; 541 }; 542 }; 543 544 pcie0_dart_0: iommu@594000000 { 545 compatible = "apple,t6020-dart", "apple,t8110-dart"; 546 reg = <0x5 0x94000000 0x0 0x4000>; 547 #iommu-cells = <1>; 548 interrupt-parent = <&aic>; 549 interrupts = <AIC_IRQ 0 1341 IRQ_TYPE_LEVEL_HIGH>; 550 power-domains = <&ps_apcie_gp_sys>; 551 }; 552 553 pcie0_dart_1: iommu@595000000 { 554 compatible = "apple,t6020-dart", "apple,t8110-dart"; 555 reg = <0x5 0x95000000 0x0 0x4000>; 556 #iommu-cells = <1>; 557 interrupt-parent = <&aic>; 558 interrupts = <AIC_IRQ 0 1345 IRQ_TYPE_LEVEL_HIGH>; 559 power-domains = <&ps_apcie_gp_sys>; 560 status = "disabled"; 561 }; 562 563 pcie0_dart_2: iommu@596000000 { 564 compatible = "apple,t6020-dart", "apple,t8110-dart"; 565 reg = <0x5 0x96000000 0x0 0x4000>; 566 #iommu-cells = <1>; 567 interrupt-parent = <&aic>; 568 interrupts = <AIC_IRQ 0 1349 IRQ_TYPE_LEVEL_HIGH>; 569 power-domains = <&ps_apcie_gp_sys>; 570 status = "disabled"; 571 }; 572 573 pcie0_dart_3: iommu@597000000 { 574 compatible = "apple,t6020-dart", "apple,t8110-dart"; 575 reg = <0x5 0x97000000 0x0 0x4000>; 576 #iommu-cells = <1>; 577 interrupt-parent = <&aic>; 578 interrupts = <AIC_IRQ 0 1353 IRQ_TYPE_LEVEL_HIGH>; 579 power-domains = <&ps_apcie_gp_sys>; 580 status = "disabled"; 581 }; 582