1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Amlogic, Inc. All rights reserved. 4 */ 5 6#include <dt-bindings/interrupt-controller/irq.h> 7#include <dt-bindings/interrupt-controller/arm-gic.h> 8 9/ { 10 cpus { 11 #address-cells = <2>; 12 #size-cells = <0>; 13 14 cpu0: cpu@0 { 15 device_type = "cpu"; 16 compatible = "arm,cortex-a35"; 17 reg = <0x0 0x0>; 18 enable-method = "psci"; 19 }; 20 21 cpu1: cpu@1 { 22 device_type = "cpu"; 23 compatible = "arm,cortex-a35"; 24 reg = <0x0 0x1>; 25 enable-method = "psci"; 26 }; 27 28 cpu2: cpu@2 { 29 device_type = "cpu"; 30 compatible = "arm,cortex-a35"; 31 reg = <0x0 0x2>; 32 enable-method = "psci"; 33 }; 34 35 cpu3: cpu@3 { 36 device_type = "cpu"; 37 compatible = "arm,cortex-a35"; 38 reg = <0x0 0x3>; 39 enable-method = "psci"; 40 }; 41 }; 42 43 timer { 44 compatible = "arm,armv8-timer"; 45 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 46 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 47 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 48 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 49 }; 50 51 psci { 52 compatible = "arm,psci-1.0"; 53 method = "smc"; 54 }; 55 56 xtal: xtal-clk { 57 compatible = "fixed-clock"; 58 clock-frequency = <24000000>; 59 clock-output-names = "xtal"; 60 #clock-cells = <0>; 61 }; 62 63 soc { 64 compatible = "simple-bus"; 65 #address-cells = <2>; 66 #size-cells = <2>; 67 ranges; 68 69 gic: interrupt-controller@fff01000 { 70 compatible = "arm,gic-400"; 71 #interrupt-cells = <3>; 72 #address-cells = <0>; 73 interrupt-controller; 74 reg = <0x0 0xfff01000 0 0x1000>, 75 <0x0 0xfff02000 0 0x2000>, 76 <0x0 0xfff04000 0 0x2000>, 77 <0x0 0xfff06000 0 0x2000>; 78 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 79 }; 80 81 apb4: apb4@fe000000 { 82 compatible = "simple-bus"; 83 reg = <0x0 0xfe000000 0x0 0x480000>; 84 #address-cells = <2>; 85 #size-cells = <2>; 86 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 87 88 uart_B: serial@7a000 { 89 compatible = "amlogic,meson-s4-uart", 90 "amlogic,meson-ao-uart"; 91 reg = <0x0 0x7a000 0x0 0x18>; 92 interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; 93 status = "disabled"; 94 clocks = <&xtal>, <&xtal>, <&xtal>; 95 clock-names = "xtal", "pclk", "baud"; 96 }; 97 }; 98 }; 99}; 100