xref: /freebsd/sys/contrib/device-tree/src/arm/microchip/at91-sama5d27_wlsom1.dtsi (revision f126890ac5386406dadf7c4cfa9566cbb56537c5) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
4 *
5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
6 *
7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
8 * Author: Eugen Hristev <eugen.hristev@microcihp.com>
9 */
10#include "sama5d2.dtsi"
11#include "sama5d2-pinfunc.h"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/mfd/atmel-flexcom.h>
14#include <dt-bindings/pinctrl/at91.h>
15
16/ {
17	model = "Microchip SAMA5D27 WLSOM1";
18	compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
19
20	aliases {
21		i2c0 = &i2c0;
22	};
23
24	clocks {
25		slow_xtal {
26			clock-frequency = <32768>;
27		};
28
29		main_xtal {
30			clock-frequency = <24000000>;
31		};
32	};
33
34	wifi_pwrseq: wifi_pwrseq {
35		compatible = "mmc-pwrseq-wilc1000";
36		reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
37		powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>;
38		pinctrl-0 = <&pinctrl_wilc_pwrseq>;
39		pinctrl-names = "default";
40	};
41};
42
43&flx1 {
44	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
45
46	uart6: serial@200 {
47		pinctrl-0 = <&pinctrl_flx1_default>;
48		pinctrl-names = "default";
49	};
50};
51
52&i2c0 {
53	pinctrl-0 = <&pinctrl_i2c0_default>;
54	pinctrl-1 = <&pinctrl_i2c0_gpio>;
55	pinctrl-names = "default", "gpio";
56	sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
57	scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
58	status = "okay";
59};
60
61&i2c1 {
62	dmas = <0>, <0>;
63	pinctrl-names = "default", "gpio";
64	pinctrl-0 = <&pinctrl_i2c1_default>;
65	pinctrl-1 = <&pinctrl_i2c1_gpio>;
66	sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
67	scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
68	status = "okay";
69
70	mcp16502@5b {
71		compatible = "microchip,mcp16502";
72		reg = <0x5b>;
73		status = "okay";
74		lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
75
76		regulators {
77			vdd_3v3: VDD_IO {
78				regulator-name = "VDD_IO";
79				regulator-min-microvolt = <3300000>;
80				regulator-max-microvolt = <3300000>;
81				regulator-initial-mode = <2>;
82				regulator-allowed-modes = <2>, <4>;
83				regulator-always-on;
84
85				regulator-state-standby {
86					regulator-on-in-suspend;
87					regulator-mode = <4>;
88				};
89
90				regulator-state-mem {
91					regulator-off-in-suspend;
92					regulator-mode = <4>;
93				};
94			};
95
96			vddio_ddr: VDD_DDR {
97				regulator-name = "VDD_DDR";
98				regulator-min-microvolt = <1200000>;
99				regulator-max-microvolt = <1200000>;
100				regulator-initial-mode = <2>;
101				regulator-allowed-modes = <2>, <4>;
102				regulator-always-on;
103
104				regulator-state-standby {
105					regulator-on-in-suspend;
106					regulator-suspend-microvolt = <1200000>;
107					regulator-changeable-in-suspend;
108					regulator-mode = <4>;
109				};
110
111				regulator-state-mem {
112					regulator-on-in-suspend;
113					regulator-suspend-microvolt = <1200000>;
114					regulator-changeable-in-suspend;
115					regulator-mode = <4>;
116				};
117			};
118
119			vdd_core: VDD_CORE {
120				regulator-name = "VDD_CORE";
121				regulator-min-microvolt = <1250000>;
122				regulator-max-microvolt = <1250000>;
123				regulator-initial-mode = <2>;
124				regulator-allowed-modes = <2>, <4>;
125				regulator-always-on;
126
127				regulator-state-standby {
128					regulator-on-in-suspend;
129					regulator-mode = <4>;
130				};
131
132				regulator-state-mem {
133					regulator-off-in-suspend;
134					regulator-mode = <4>;
135				};
136			};
137
138			vdd_ddr: VDD_OTHER {
139				regulator-name = "VDD_OTHER";
140				regulator-min-microvolt = <1800000>;
141				regulator-max-microvolt = <1800000>;
142				regulator-initial-mode = <2>;
143				regulator-allowed-modes = <2>, <4>;
144				regulator-always-on;
145
146				regulator-state-standby {
147					regulator-on-in-suspend;
148					regulator-suspend-microvolt = <1800000>;
149					regulator-changeable-in-suspend;
150					regulator-mode = <4>;
151				};
152
153				regulator-state-mem {
154					regulator-on-in-suspend;
155					regulator-suspend-microvolt = <1800000>;
156					regulator-changeable-in-suspend;
157					regulator-mode = <4>;
158				};
159			};
160
161			LDO1 {
162				regulator-name = "LDO1";
163				regulator-min-microvolt = <3300000>;
164				regulator-max-microvolt = <3300000>;
165				regulator-always-on;
166
167				regulator-state-standby {
168					regulator-on-in-suspend;
169				};
170
171				regulator-state-mem {
172					regulator-off-in-suspend;
173				};
174			};
175
176			LDO2 {
177				regulator-name = "LDO2";
178				regulator-min-microvolt = <1800000>;
179				regulator-max-microvolt = <3300000>;
180
181				regulator-state-standby {
182					regulator-on-in-suspend;
183				};
184
185				regulator-state-mem {
186					regulator-off-in-suspend;
187				};
188			};
189		};
190	};
191};
192
193&macb0 {
194	pinctrl-names = "default";
195	pinctrl-0 = <&pinctrl_macb0_default>;
196	#address-cells = <1>;
197	#size-cells = <0>;
198	phy-mode = "rmii";
199
200	ethernet-phy@0 {
201		reg = <0x0>;
202		interrupt-parent = <&pioA>;
203		interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
204		pinctrl-names = "default";
205		pinctrl-0 = <&pinctrl_macb0_phy_irq>;
206	};
207};
208
209&pmc {
210	atmel,osc-bypass;
211};
212
213&qspi1 {
214	pinctrl-names = "default";
215	pinctrl-0 = <&pinctrl_qspi1_default>;
216	status = "disabled";
217
218	qspi1_flash: flash@0 {
219		#address-cells = <1>;
220		#size-cells = <1>;
221		compatible = "jedec,spi-nor";
222		reg = <0>;
223		spi-max-frequency = <104000000>;
224		spi-cs-setup-ns = <7>;
225		spi-rx-bus-width = <4>;
226		spi-tx-bus-width = <4>;
227		m25p,fast-read;
228		status = "disabled";
229
230		at91bootstrap@0 {
231			label = "at91bootstrap";
232			reg = <0x0 0x40000>;
233		};
234
235		bootloader@40000 {
236			label = "bootloader";
237			reg = <0x40000 0xc0000>;
238		};
239
240		bootloaderenvred@100000 {
241			label = "bootloader env redundant";
242			reg = <0x100000 0x40000>;
243		};
244
245		bootloaderenv@140000 {
246			label = "bootloader env";
247			reg = <0x140000 0x40000>;
248		};
249
250		dtb@180000 {
251			label = "device tree";
252			reg = <0x180000 0x80000>;
253		};
254
255		kernel@200000 {
256			label = "kernel";
257			reg = <0x200000 0x600000>;
258		};
259	};
260};
261
262&pioA {
263	pinctrl_flx1_default: flx1_usart_default {
264		pinmux = <PIN_PA24__FLEXCOM1_IO0>,
265			 <PIN_PA23__FLEXCOM1_IO1>,
266			 <PIN_PA25__FLEXCOM1_IO3>,
267			 <PIN_PA26__FLEXCOM1_IO4>;
268		bias-disable;
269	};
270
271	pinctrl_i2c0_default: i2c0_default {
272		pinmux = <PIN_PD21__TWD0>,
273			 <PIN_PD22__TWCK0>;
274		bias-disable;
275	};
276
277	pinctrl_i2c0_gpio: i2c0_gpio {
278		pinmux = <PIN_PD21__GPIO>,
279			 <PIN_PD22__GPIO>;
280		bias-disable;
281	};
282
283	pinctrl_i2c1_default: i2c1_default {
284		pinmux = <PIN_PD19__TWD1>,
285			 <PIN_PD20__TWCK1>;
286		bias-disable;
287	};
288
289	pinctrl_i2c1_gpio: i2c1_gpio {
290		pinmux = <PIN_PD19__GPIO>,
291			 <PIN_PD20__GPIO>;
292		bias-disable;
293	};
294
295	pinctrl_macb0_default: macb0_default {
296		pinmux = <PIN_PB14__GTXCK>,
297			 <PIN_PB15__GTXEN>,
298			 <PIN_PB16__GRXDV>,
299			 <PIN_PB17__GRXER>,
300			 <PIN_PB18__GRX0>,
301			 <PIN_PB19__GRX1>,
302			 <PIN_PB20__GTX0>,
303			 <PIN_PB21__GTX1>,
304			 <PIN_PB22__GMDC>,
305			 <PIN_PB23__GMDIO>;
306		bias-disable;
307	};
308
309	pinctrl_macb0_phy_irq: macb0_phy_irq {
310		pinmux = <PIN_PB24__GPIO>;
311		bias-disable;
312	};
313
314	pinctrl_qspi1_default: qspi1_default {
315		pinmux = <PIN_PB5__QSPI1_SCK>,
316			 <PIN_PB6__QSPI1_CS>,
317			 <PIN_PB7__QSPI1_IO0>,
318			 <PIN_PB8__QSPI1_IO1>,
319			 <PIN_PB9__QSPI1_IO2>,
320			 <PIN_PB10__QSPI1_IO3>;
321		bias-pull-up;
322	};
323
324	pinctrl_sdmmc1_default: sdmmc1_default {
325		cmd-data {
326			pinmux = <PIN_PA28__SDMMC1_CMD>,
327				 <PIN_PA18__SDMMC1_DAT0>,
328				 <PIN_PA19__SDMMC1_DAT1>,
329				 <PIN_PA20__SDMMC1_DAT2>,
330				 <PIN_PA21__SDMMC1_DAT3>;
331			bias-disable;
332		};
333
334		conf-ck {
335			pinmux = <PIN_PA22__SDMMC1_CK>;
336			bias-disable;
337		};
338	};
339
340	pinctrl_wilc_default: wilc_default {
341		conf-irq {
342			pinmux = <PIN_PB25__GPIO>;
343			bias-disable;
344		};
345	};
346
347	pinctrl_wilc_pwrseq: wilc_pwrseq {
348		conf-ce-nrst {
349			pinmux = <PIN_PA27__GPIO>,
350				 <PIN_PA29__GPIO>;
351			bias-disable;
352		};
353
354		conf-rtcclk {
355			pinmux = <PIN_PB13__PCK1>;
356			bias-disable;
357		};
358	};
359};
360
361&sdmmc1 {
362	#address-cells = <1>;
363	#size-cells = <0>;
364	bus-width = <4>;
365	pinctrl-names = "default";
366	pinctrl-0 = <&pinctrl_sdmmc1_default>;
367	mmc-pwrseq = <&wifi_pwrseq>;
368	no-1-8-v;
369	non-removable;
370	bus-width = <4>;
371	status = "okay";
372
373	wilc: wifi@0 {
374		reg = <0>;
375		compatible = "microchip,wilc1000";
376		pinctrl-names = "default";
377		pinctrl-0 = <&pinctrl_wilc_default>;
378		clocks = <&pmc PMC_TYPE_SYSTEM 9>;
379		clock-names = "rtc";
380		interrupts = <PIN_PB25 IRQ_TYPE_NONE>;
381		interrupt-parent = <&pioA>;
382		assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
383		assigned-clock-rates = <32768>;
384	};
385};
386
387