1// SPDX-License-Identifier: GPL-2.0+ 2// Copyright (c) 2021 Facebook Inc. 3/dts-v1/; 4 5#include "aspeed-g6.dtsi" 6#include <dt-bindings/gpio/aspeed-gpio.h> 7#include <dt-bindings/usb/pd.h> 8#include <dt-bindings/leds/leds-pca955x.h> 9#include <dt-bindings/interrupt-controller/irq.h> 10#include <dt-bindings/i2c/i2c.h> 11 12/ { 13 model = "Facebook Clemente BMC"; 14 compatible = "facebook,clemente-bmc", "aspeed,ast2600"; 15 16 aliases { 17 serial0 = &uart1; 18 serial2 = &uart3; 19 serial3 = &uart4; 20 serial4 = &uart5; 21 i2c16 = &i2c1mux0ch0; 22 i2c17 = &i2c1mux0ch1; 23 i2c18 = &i2c1mux0ch2; 24 i2c19 = &i2c1mux0ch3; 25 i2c20 = &i2c1mux0ch4; 26 i2c21 = &i2c1mux0ch5; 27 i2c22 = &i2c1mux0ch6; 28 i2c23 = &i2c1mux0ch7; 29 i2c24 = &i2c0mux0ch0; 30 i2c25 = &i2c0mux0ch1; 31 i2c26 = &i2c0mux0ch2; 32 i2c27 = &i2c0mux0ch3; 33 i2c28 = &i2c0mux1ch0; 34 i2c29 = &i2c0mux1ch1; 35 i2c30 = &i2c0mux1ch2; 36 i2c31 = &i2c0mux1ch3; 37 i2c32 = &i2c0mux2ch0; 38 i2c33 = &i2c0mux2ch1; 39 i2c34 = &i2c0mux2ch2; 40 i2c35 = &i2c0mux2ch3; 41 i2c36 = &i2c0mux3ch0; 42 i2c37 = &i2c0mux3ch1; 43 i2c38 = &i2c0mux3ch2; 44 i2c39 = &i2c0mux3ch3; 45 i2c40 = &i2c0mux4ch0; 46 i2c41 = &i2c0mux4ch1; 47 i2c42 = &i2c0mux4ch2; 48 i2c43 = &i2c0mux4ch3; 49 i2c44 = &i2c0mux5ch0; 50 i2c45 = &i2c0mux5ch1; 51 i2c46 = &i2c0mux5ch2; 52 i2c47 = &i2c0mux5ch3; 53 i2c48 = &i2c0mux0ch1mux0ch0; 54 i2c49 = &i2c0mux0ch1mux0ch1; 55 i2c50 = &i2c0mux0ch1mux0ch2; 56 i2c51 = &i2c0mux0ch1mux0ch3; 57 i2c52 = &i2c0mux3ch1mux0ch0; 58 i2c53 = &i2c0mux3ch1mux0ch1; 59 i2c54 = &i2c0mux3ch1mux0ch2; 60 i2c55 = &i2c0mux3ch1mux0ch3; 61 }; 62 63 chosen { 64 stdout-path = "serial4:57600n8"; 65 }; 66 67 iio-hwmon { 68 compatible = "iio-hwmon"; 69 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, 70 <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, 71 <&adc1 2>; 72 }; 73 74 leds { 75 compatible = "gpio-leds"; 76 77 led-0 { 78 label = "bmc_heartbeat_amber"; 79 gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 80 linux,default-trigger = "heartbeat"; 81 }; 82 83 led-1 { 84 label = "fp_id_amber"; 85 default-state = "off"; 86 gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 87 }; 88 89 led-2 { 90 label = "bmc_ready_noled"; 91 gpios = <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>; 92 }; 93 94 led-3 { 95 label = "bmc_ready_cpld_noled"; 96 gpios = <&gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>; 97 }; 98 99 }; 100 101 hdd-leds { 102 compatible = "gpio-leds"; 103 104 led-0 { 105 label = "hdd_led"; 106 gpios = <&io_expander13 1 GPIO_ACTIVE_LOW>; 107 }; 108 }; 109 110 memory@80000000 { 111 device_type = "memory"; 112 reg = <0x80000000 0x80000000>; 113 }; 114 115 p1v8_bmc_aux: regulator-p1v8-bmc-aux { 116 compatible = "regulator-fixed"; 117 regulator-name = "p1v8_bmc_aux"; 118 regulator-min-microvolt = <1800000>; 119 regulator-max-microvolt = <1800000>; 120 regulator-always-on; 121 }; 122 123 p2v5_bmc_aux: regulator-p2v5-bmc-aux { 124 compatible = "regulator-fixed"; 125 regulator-name = "p2v5_bmc_aux"; 126 regulator-min-microvolt = <2500000>; 127 regulator-max-microvolt = <2500000>; 128 regulator-always-on; 129 }; 130 131 reserved-memory { 132 #address-cells = <1>; 133 #size-cells = <1>; 134 ranges; 135 136 ramoops@b3e00000 { 137 compatible = "ramoops"; 138 reg = <0xbb000000 0x200000>; /* 16 * (4 * 0x8000) */ 139 record-size = <0x8000>; 140 console-size = <0x8000>; 141 ftrace-size = <0x8000>; 142 pmsg-size = <0x8000>; 143 max-reason = <3>; 144 }; 145 }; 146 147 spi1_gpio: spi { 148 compatible = "spi-gpio"; 149 #address-cells = <1>; 150 #size-cells = <0>; 151 152 sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 153 mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 154 miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; 155 cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 156 num-chipselects = <1>; 157 158 tpm@0 { 159 compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 160 spi-max-frequency = <33000000>; 161 reg = <0>; 162 }; 163 }; 164}; 165 166&adc0 { 167 vref-supply = <&p1v8_bmc_aux>; 168 status = "okay"; 169 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 172 &pinctrl_adc2_default &pinctrl_adc3_default 173 &pinctrl_adc4_default &pinctrl_adc5_default 174 &pinctrl_adc6_default &pinctrl_adc7_default>; 175}; 176 177&adc1 { 178 vref-supply = <&p2v5_bmc_aux>; 179 status = "okay"; 180 181 pinctrl-names = "default"; 182 pinctrl-0 = <&pinctrl_adc10_default>; 183}; 184 185&ehci0 { 186 status = "okay"; 187}; 188 189&fmc { 190 status = "okay"; 191 flash@0 { 192 status = "okay"; 193 m25p,fast-read; 194 label = "bmc"; 195 spi-max-frequency = <50000000>; 196#include "openbmc-flash-layout-128.dtsi" 197 }; 198 199 flash@1 { 200 status = "okay"; 201 m25p,fast-read; 202 label = "alt-bmc"; 203 spi-max-frequency = <50000000>; 204 }; 205}; 206 207&gpio0 { 208 gpio-line-names = 209 /*A0-A7*/ "","","","","","","","", 210 /*B0-B7*/ "BATTERY_DETECT","PRSNT1_HPM_SCM_N", 211 "BMC_I2C1_FPGA_ALERT_L","BMC_READY", 212 "IOEXP_INT_L","FM_ID_LED", 213 "","", 214 /*C0-C7*/ "BMC_GPIOC0","","","", 215 "PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N", 216 "","BMC_I2C_SSIF_ALERT_L", 217 /*D0-D7*/ "","","","","BMC_GPIOD4","","","", 218 /*E0-E7*/ "BMC_GPIOE0","BMC_GPIOE1","","","","","","", 219 /*F0-F7*/ "","","","","","","","", 220 /*G0-G7*/ "","","","","","", 221 "FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N", 222 /*H0-H7*/ "PWR_BRAKE_L","RUN_POWER_EN", 223 "SHDN_FORCE_L","SHDN_REQ_L", 224 "","","","", 225 /*I0-I7*/ "","","","", 226 "","FLASH_WP_STATUS", 227 "FM_PDB_HEALTH_N","RUN_POWER_PG", 228 /*J0-J7*/ "","","","","","","","", 229 /*K0-K7*/ "","","","","","","","", 230 /*L0-L7*/ "","","","","","","","", 231 /*M0-M7*/ "PCIE_EP_RST_EN","BMC_FRU_WP", 232 "SCM_HPM_STBY_RST_N","SCM_HPM_STBY_EN", 233 "STBY_POWER_PG_3V3","TH500_SHDN_OK_L","","", 234 /*N0-N7*/ "LED_POSTCODE_0","LED_POSTCODE_1", 235 "LED_POSTCODE_2","LED_POSTCODE_3", 236 "LED_POSTCODE_4","LED_POSTCODE_5", 237 "LED_POSTCODE_6","LED_POSTCODE_7", 238 /*O0-O7*/ "HMC_I2C3_FPGA_ALERT_L","FPGA_READY_HMC", 239 "CHASSIS_AC_LOSS_L","BSM_PRSNT_R_N", 240 "PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N", 241 "","USBDBG_IPMI_EN_L", 242 /*P0-P7*/ "PWR_BTN_BMC_N","IPEX_CABLE_PRSNT_L", 243 "ID_RST_BTN_BMC_N","RST_BMC_RSTBTN_OUT_N", 244 "host0-ready","BMC_READY_CPLD","BMC_GPIOP6","BMC_HEARTBEAT_N", 245 /*Q0-Q7*/ "IRQ_PCH_TPM_SPI_N","USB_OC0_REAR_R_N", 246 "UART_MUX_SEL","I2C_MUX_RESET_L", 247 "RSVD_NV_PLT_DETECT","SPI_TPM_INT_L", 248 "CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L", 249 /*R0-R7*/ "THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L", 250 "CPU_BOOT_DONE","PMBUS_GNT_L", 251 "CHASSIS_PWR_BRK_L","PCIE_WAKE_L", 252 "PDB_THERM_OVERT_L","HMC_I2C2_FPGA_ALERT_L", 253 /*S0-S7*/ "","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N", 254 "FM_BMC_DEBUG_SW_N","UID_LED_N", 255 "SYS_FAULT_LED_N","RUN_POWER_FAULT_L", 256 /*T0-T7*/ "","","","","","","","", 257 /*U0-U7*/ "","","","","","","","", 258 /*V0-V7*/ "L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L", 259 "BMC_ID_BEEP_SEL","BMC_I2C0_FPGA_ALERT_L", 260 "SMB_BMC_TMP_ALERT","PWR_LED_N", 261 "SYS_RST_OUT_L","IRQ_TPM_SPI_N", 262 /*W0-W7*/ "","","","","","","","", 263 /*X0-X7*/ "","","","","","","","", 264 /*Y0-Y7*/ "","RST_BMC_SELF_HW", 265 "FM_FLASH_LATCH_N","BMC_EMMC_RST_N", 266 "BMC_GPIOY4","BMC_GPIOY5","","", 267 /*Z0-Z7*/ "","","","","","","BMC_GPIOZ6","BMC_GPIOZ7"; 268}; 269 270&gpio1 { 271 gpio-line-names = 272 /*18A0-18A7*/ "","","","","","","","", 273 /*18B0-18B3*/ "","","","", 274 /*18B4-18B7*/ "FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1","FM_BOARD_BMC_REV_ID2","", 275 /*18C0-18C7*/ "","","PI_BMC_BIOS_ROM_IRQ0_N","","","","","", 276 /*18D0-18D7*/ "","","","","","","","", 277 /*18E0-18E3*/ "","","","AC_PWR_BMC_BTN_N","","","",""; 278}; 279 280&i2c0 { 281 status = "okay"; 282 283 i2c-mux@71 { 284 compatible = "nxp,pca9546"; 285 reg = <0x71>; 286 #address-cells = <1>; 287 #size-cells = <0>; 288 i2c-mux-idle-disconnect; 289 290 i2c0mux0ch0: i2c@0 { 291 #address-cells = <1>; 292 #size-cells = <0>; 293 reg = <0>; 294 }; 295 296 i2c0mux0ch1: i2c@1 { 297 #address-cells = <1>; 298 #size-cells = <0>; 299 reg = <1>; 300 301 // HDD FRU EEPROM 302 eeprom@56 { 303 compatible = "atmel,24c128"; 304 reg = <0x56>; 305 }; 306 307 // E1.S Backplane 308 i2c0mux0ch1mux0: i2c-mux@74 { 309 compatible = "nxp,pca9546"; 310 reg = <0x74>; 311 #address-cells = <1>; 312 #size-cells = <0>; 313 i2c-mux-idle-disconnect; 314 315 i2c0mux0ch1mux0ch0: i2c@0 { 316 #address-cells = <1>; 317 #size-cells = <0>; 318 reg = <0>; 319 320 // HDD NVMe SSD FRU 0 321 eeprom@53 { 322 compatible = "atmel,24c02"; 323 reg = <0x53>; 324 }; 325 }; 326 327 i2c0mux0ch1mux0ch1: i2c@1 { 328 #address-cells = <1>; 329 #size-cells = <0>; 330 reg = <1>; 331 }; 332 333 i2c0mux0ch1mux0ch2: i2c@2 { 334 #address-cells = <1>; 335 #size-cells = <0>; 336 reg = <2>; 337 338 // HDD NVMe SSD FRU 1 339 eeprom@53 { 340 compatible = "atmel,24c02"; 341 reg = <0x53>; 342 }; 343 }; 344 345 i2c0mux0ch1mux0ch3: i2c@3 { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 reg = <3>; 349 }; 350 }; 351 }; 352 353 i2c0mux0ch2: i2c@2 { 354 #address-cells = <1>; 355 #size-cells = <0>; 356 reg = <2>; 357 }; 358 359 i2c0mux0ch3: i2c@3 { 360 #address-cells = <1>; 361 #size-cells = <0>; 362 reg = <3>; 363 }; 364 }; 365 366 i2c-mux@72 { 367 compatible = "nxp,pca9546"; 368 reg = <0x72>; 369 #address-cells = <1>; 370 #size-cells = <0>; 371 i2c-mux-idle-disconnect; 372 373 i2c0mux1ch0: i2c@0 { 374 #address-cells = <1>; 375 #size-cells = <0>; 376 reg = <0>; 377 }; 378 379 i2c0mux1ch1: i2c@1 { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 reg = <1>; 383 384 // IO Mezz 0 IOEXP 385 io_expander7: gpio@20 { 386 compatible = "nxp,pca9535"; 387 reg = <0x20>; 388 gpio-controller; 389 #gpio-cells = <2>; 390 gpio-line-names = 391 "RST_CX7_0", 392 "RST_CX7_1", 393 "CX0_SSD0_PRSNT_L", 394 "CX1_SSD1_PRSNT_L", 395 "CX_BOOT_CMPLT_CX0", 396 "CX_BOOT_CMPLT_CX1", 397 "CX_TWARN_CX0_L", 398 "CX_TWARN_CX1_L", 399 "CX_OVT_SHDN_CX0", 400 "CX_OVT_SHDN_CX1", 401 "FNP_L_CX0", 402 "FNP_L_CX1", 403 "", 404 "MCU_GPIO", 405 "MCU_RST_N", 406 "MCU_RECOVERY_N"; 407 }; 408 409 // IO Mezz 0 FRU EEPROM 410 eeprom@50 { 411 compatible = "atmel,24c64"; 412 reg = <0x50>; 413 }; 414 415 // OSFP 0 FRU EEPROM 416 eeprom@52 { 417 compatible = "atmel,24c128"; 418 reg = <0x52>; 419 }; 420 }; 421 422 i2c0mux1ch2: i2c@2 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 reg = <2>; 426 }; 427 428 i2c0mux1ch3: i2c@3 { 429 #address-cells = <1>; 430 #size-cells = <0>; 431 reg = <3>; 432 }; 433 }; 434 435 i2c-mux@73 { 436 compatible = "nxp,pca9546"; 437 reg = <0x73>; 438 #address-cells = <1>; 439 #size-cells = <0>; 440 i2c-mux-idle-disconnect; 441 442 i2c0mux2ch0: i2c@0 { 443 #address-cells = <1>; 444 #size-cells = <0>; 445 reg = <0>; 446 // IOB0 NIC0 TEMP 447 temperature-sensor@1f { 448 compatible = "ti,tmp421"; 449 reg = <0x1f>; 450 }; 451 }; 452 453 i2c0mux2ch1: i2c@1 { 454 #address-cells = <1>; 455 #size-cells = <0>; 456 reg = <1>; 457 }; 458 459 i2c0mux2ch2: i2c@2 { 460 #address-cells = <1>; 461 #size-cells = <0>; 462 reg = <2>; 463 }; 464 465 i2c0mux2ch3: i2c@3 { 466 #address-cells = <1>; 467 #size-cells = <0>; 468 reg = <3>; 469 // IOB0 NIC1 TEMP 470 temperature-sensor@1f { 471 compatible = "ti,tmp421"; 472 reg = <0x1f>; 473 }; 474 }; 475 }; 476 477 i2c-mux@75 { 478 compatible = "nxp,pca9546"; 479 reg = <0x75>; 480 #address-cells = <1>; 481 #size-cells = <0>; 482 i2c-mux-idle-disconnect; 483 484 i2c0mux3ch0: i2c@0 { 485 #address-cells = <1>; 486 #size-cells = <0>; 487 reg = <0>; 488 }; 489 490 i2c0mux3ch1: i2c@1 { 491 #address-cells = <1>; 492 #size-cells = <0>; 493 reg = <1>; 494 495 // E1.S Backplane HDD FRU EEPROM 496 eeprom@56 { 497 compatible = "atmel,24c128"; 498 reg = <0x56>; 499 }; 500 501 // E1.S Backplane MUX 502 i2c0mux3ch1mux0: i2c-mux@74 { 503 compatible = "nxp,pca9546"; 504 reg = <0x74>; 505 #address-cells = <1>; 506 #size-cells = <0>; 507 i2c-mux-idle-disconnect; 508 509 i2c0mux3ch1mux0ch0: i2c@0 { 510 #address-cells = <1>; 511 #size-cells = <0>; 512 reg = <0>; 513 514 // HDD NVMe SSD FRU 2 515 eeprom@53 { 516 compatible = "atmel,24c02"; 517 reg = <0x53>; 518 }; 519 }; 520 521 i2c0mux3ch1mux0ch1: i2c@1 { 522 #address-cells = <1>; 523 #size-cells = <0>; 524 reg = <1>; 525 }; 526 527 i2c0mux3ch1mux0ch2: i2c@2 { 528 #address-cells = <1>; 529 #size-cells = <0>; 530 reg = <2>; 531 532 // HDD NVMe SSD FRU 3 533 eeprom@53 { 534 compatible = "atmel,24c02"; 535 reg = <0x53>; 536 }; 537 }; 538 539 i2c0mux3ch1mux0ch3: i2c@3 { 540 #address-cells = <1>; 541 #size-cells = <0>; 542 reg = <3>; 543 }; 544 }; 545 }; 546 547 i2c0mux3ch2: i2c@2 { 548 #address-cells = <1>; 549 #size-cells = <0>; 550 reg = <2>; 551 }; 552 553 i2c0mux3ch3: i2c@3 { 554 #address-cells = <1>; 555 #size-cells = <0>; 556 reg = <3>; 557 }; 558 }; 559 560 i2c-mux@76 { 561 compatible = "nxp,pca9546"; 562 reg = <0x76>; 563 #address-cells = <1>; 564 #size-cells = <0>; 565 i2c-mux-idle-disconnect; 566 567 i2c0mux4ch0: i2c@0 { 568 #address-cells = <1>; 569 #size-cells = <0>; 570 reg = <0>; 571 }; 572 573 i2c0mux4ch1: i2c@1 { 574 #address-cells = <1>; 575 #size-cells = <0>; 576 reg = <1>; 577 578 // IO Mezz 1 IOEXP 579 io_expander8: gpio@21 { 580 compatible = "nxp,pca9535"; 581 reg = <0x21>; 582 gpio-controller; 583 #gpio-cells = <2>; 584 gpio-line-names = 585 "SEC_RST_CX7_0", 586 "SEC_RST_CX7_1", 587 "SEC_CX0_SSD0_PRSNT_L", 588 "SEC_CX1_SSD1_PRSNT_L", 589 "SEC_CX_BOOT_CMPLT_CX0", 590 "SEC_CX_BOOT_CMPLT_CX1", 591 "SEC_CX_TWARN_CX0_L", 592 "SEC_CX_TWARN_CX1_L", 593 "SEC_CX_OVT_SHDN_CX0", 594 "SEC_CX_OVT_SHDN_CX1", 595 "SEC_FNP_L_CX0", 596 "SEC_FNP_L_CX1", 597 "", 598 "SEC_MCU_GPIO", 599 "SEC_MCU_RST_N", 600 "SEC_MCU_RECOVERY_N"; 601 }; 602 603 // IO Mezz 1 FRU EEPROM 604 eeprom@50 { 605 compatible = "atmel,24c64"; 606 reg = <0x50>; 607 }; 608 609 // OSFP 1 FRU EEPROM 610 eeprom@52 { 611 compatible = "atmel,24c128"; 612 reg = <0x52>; 613 }; 614 }; 615 616 i2c0mux4ch2: i2c@2 { 617 #address-cells = <1>; 618 #size-cells = <0>; 619 reg = <2>; 620 }; 621 622 i2c0mux4ch3: i2c@3 { 623 #address-cells = <1>; 624 #size-cells = <0>; 625 reg = <3>; 626 }; 627 }; 628 629 i2c-mux@77 { 630 compatible = "nxp,pca9546"; 631 reg = <0x77>; 632 #address-cells = <1>; 633 #size-cells = <0>; 634 i2c-mux-idle-disconnect; 635 636 i2c0mux5ch0: i2c@0 { 637 #address-cells = <1>; 638 #size-cells = <0>; 639 reg = <0>; 640 // IOB1 NIC0 TEMP 641 temperature-sensor@1f { 642 compatible = "ti,tmp421"; 643 reg = <0x1f>; 644 }; 645 }; 646 647 i2c0mux5ch1: i2c@1 { 648 #address-cells = <1>; 649 #size-cells = <0>; 650 reg = <1>; 651 652 // BOOT DRIVE FRU 653 eeprom@53 { 654 compatible = "atmel,24c02"; 655 reg = <0x53>; 656 }; 657 }; 658 659 i2c0mux5ch2: i2c@2 { 660 #address-cells = <1>; 661 #size-cells = <0>; 662 reg = <2>; 663 }; 664 665 i2c0mux5ch3: i2c@3 { 666 #address-cells = <1>; 667 #size-cells = <0>; 668 reg = <3>; 669 // IOB1 NIC1 TEMP 670 temperature-sensor@1f { 671 compatible = "ti,tmp421"; 672 reg = <0x1f>; 673 }; 674 }; 675 }; 676}; 677 678&i2c1 { 679 status = "okay"; 680 681 // PDB 682 power-monitor@12 { 683 compatible = "ti,lm5066i"; 684 reg = <0x12>; 685 shunt-resistor-micro-ohms = <183>; 686 }; 687 688 // PDB 689 power-monitor@14 { 690 compatible = "ti,lm5066i"; 691 reg = <0x14>; 692 shunt-resistor-micro-ohms = <183>; 693 }; 694 695 // Module 0 696 fanctl0: fan-controller@20{ 697 compatible = "maxim,max31790"; 698 reg = <0x20>; 699 }; 700 701 // Module 0 702 fanctl1: fan-controller@23{ 703 compatible = "maxim,max31790"; 704 reg = <0x23>; 705 }; 706 707 // Module 1 708 fanctl2: fan-controller@2c{ 709 compatible = "maxim,max31790"; 710 reg = <0x2c>; 711 }; 712 713 // Module 1 714 fanctl3: fan-controller@2f{ 715 compatible = "maxim,max31790"; 716 reg = <0x2f>; 717 }; 718 719 // Module 0 Leak Sensor 720 adc@34 { 721 compatible = "maxim,max1363"; 722 reg = <0x34>; 723 }; 724 725 // Module 1 Leak Sensor 726 adc@35 { 727 compatible = "maxim,max1363"; 728 reg = <0x35>; 729 }; 730 731 // PDB TEMP SENSOR 732 temperature-sensor@4e { 733 compatible = "ti,tmp1075"; 734 reg = <0x4e>; 735 }; 736 737 // PDB FRU EEPROM 738 eeprom@50 { 739 compatible = "atmel,24c02"; 740 reg = <0x50>; 741 }; 742 743 // PDB 744 vrm@60 { 745 compatible = "renesas,raa228004"; 746 reg = <0x60>; 747 }; 748 749 // PDB 750 vrm@61 { 751 compatible = "renesas,raa228004"; 752 reg = <0x61>; 753 }; 754 755 // Interposer 756 i2c-mux@70 { 757 compatible = "nxp,pca9548"; 758 #address-cells = <1>; 759 #size-cells = <0>; 760 reg = <0x70>; 761 i2c-mux-idle-disconnect; 762 763 i2c1mux0ch0: i2c@0 { 764 #address-cells = <1>; 765 #size-cells = <0>; 766 reg = <0x0>; 767 }; 768 769 i2c1mux0ch1: i2c@1 { 770 #address-cells = <1>; 771 #size-cells = <0>; 772 reg = <0x1>; 773 }; 774 775 i2c1mux0ch2: i2c@2 { 776 #address-cells = <1>; 777 #size-cells = <0>; 778 reg = <0x2>; 779 }; 780 781 i2c1mux0ch3: i2c@3 { 782 #address-cells = <1>; 783 #size-cells = <0>; 784 reg = <0x3>; 785 }; 786 787 i2c1mux0ch4: i2c@4 { 788 #address-cells = <1>; 789 #size-cells = <0>; 790 reg = <0x4>; 791 }; 792 793 i2c1mux0ch5: i2c@5 { 794 #address-cells = <1>; 795 #size-cells = <0>; 796 reg = <0x5>; 797 798 // Interposer TEMP SENSOR 799 temperature-sensor@4f { 800 compatible = "ti,tmp75"; 801 reg = <0x4f>; 802 }; 803 804 // Interposer FRU EEPROM 805 eeprom@54 { 806 compatible = "atmel,24c64"; 807 reg = <0x54>; 808 }; 809 }; 810 811 i2c1mux0ch6: i2c@6 { 812 #address-cells = <1>; 813 #size-cells = <0>; 814 reg = <0x6>; 815 816 // Interposer IOEXP 817 io_expander5: gpio@27 { 818 compatible = "nxp,pca9554"; 819 reg = <0x27>; 820 gpio-controller; 821 #gpio-cells = <2>; 822 gpio-line-names = 823 "JTAG_MUX_SEL", 824 "IOX_BMC_RESET", 825 "RTC_CLR_L", 826 "RTC_U77_ALRT_N", 827 "", 828 "PSU_ALERT_N", 829 "", 830 "RST_P12V_STBY_N"; 831 }; 832 }; 833 834 i2c1mux0ch7: i2c@7 { 835 #address-cells = <1>; 836 #size-cells = <0>; 837 reg = <0x7>; 838 839 // FIO TEMP SENSOR 840 temperature-sensor@4b { 841 compatible = "ti,tmp75"; 842 reg = <0x4b>; 843 }; 844 845 // FIO FRU EEPROM 846 eeprom@51 { 847 compatible = "atmel,24c64"; 848 reg = <0x51>; 849 }; 850 }; 851 }; 852}; 853 854&i2c2 { 855 status = "okay"; 856 // Module 0, Expander @0x20 857 io_expander0: gpio@20 { 858 compatible = "nxp,pca9555"; 859 reg = <0x20>; 860 gpio-controller; 861 #gpio-cells = <2>; 862 gpio-line-names = 863 "FPGA_THERM_OVERT_L-I", 864 "FPGA_READY_BMC-I", 865 "HMC_BMC_DETECT-O", 866 "HMC_PGOOD-O", 867 "", 868 "BMC_STBY_CYCLE-O", 869 "FPGA_EROT_FATAL_ERROR_L-I", 870 "WP_HW_EXT_CTRL_L-O", 871 "EROT_FPGA_RST_L-O", 872 "FPGA_EROT_RECOVERY_L-O", 873 "BMC_EROT_FPGA_SPI_MUX_SEL-O", 874 "USB2_HUB_RST_L-O", 875 "", 876 "SGPIO_EN_L-O", 877 "B2B_IOEXP_INT_L-I", 878 "I2C_BUS_MUX_RESET_L-O"; 879 }; 880 881 // Module 1, Expander @0x21 882 io_expander1: gpio@21 { 883 compatible = "nxp,pca9555"; 884 reg = <0x21>; 885 gpio-controller; 886 #gpio-cells = <2>; 887 gpio-line-names = 888 "SEC_FPGA_THERM_OVERT_L", 889 "SEC_FPGA_READY_BMC", 890 "SEC_HMC_BMC_DETECT", 891 "SEC_HMC_PGOOD", 892 "", 893 "SEC_BMC_SELF_POWER_CYCLE", 894 "SEC_SEC_FPGA_EROT_FATAL_ERROR_L", 895 "SEC_WP_HW_EXT_CTRL_L", 896 "SEC_EROT_FPGA_RST_L", 897 "SEC_FPGA_EROT_RECOVERY_L", 898 "SEC_BMC_EROT_FPGA_SPI_MUX_SEL", 899 "SEC_USB2_HUB_RST_L", 900 "", 901 "SEC_SGPIO_EN_L", 902 "SEC_IOB_IOEXP_INT_L", 903 "SEC_I2C_BUS_MUX_RESET_L"; 904 }; 905 906 // HMC Expander @0x27 907 io_expander2: gpio@27 { 908 compatible = "nxp,pca9555"; 909 reg = <0x27>; 910 gpio-controller; 911 #gpio-cells = <2>; 912 gpio-line-names = 913 "HMC_PRSNT_L-I", 914 "HMC_READY-I", 915 "HMC_EROT_FATAL_ERROR_L-I", 916 "I2C_MUX_SEL-O", 917 "HMC_EROT_SPI_MUX_SEL-O", 918 "HMC_EROT_RECOVERY_L-O", 919 "HMC_EROT_RST_L-O", 920 "GLOBAL_WP_HMC-O", 921 "FPGA_RST_L-O", 922 "USB2_HUB_RST-O", 923 "CPU_UART_MUX_SEL-O", 924 "", 925 "", 926 "", 927 "", 928 ""; 929 }; 930 931 // Module 0 Aux EEPROM 932 eeprom@50 { 933 compatible = "atmel,24c64"; 934 reg = <0x50>; 935 }; 936 937 // Module 1 Aux EEPROM 938 eeprom@51 { 939 compatible = "atmel,24c64"; 940 reg = <0x51>; 941 }; 942}; 943 944&i2c3 { 945 status = "okay"; 946}; 947 948&i2c4 { 949 status = "okay"; 950}; 951 952&i2c5 { 953 status = "okay"; 954}; 955 956&i2c6 { 957 status = "okay"; 958 io_expander3: gpio@21 { 959 compatible = "nxp,pca9555"; 960 reg = <0x21>; 961 gpio-controller; 962 #gpio-cells = <2>; 963 gpio-line-names = 964 "RTC_MUX_SEL", 965 "PCI_MUX_SEL", 966 "TPM_MUX_SEL", 967 "FAN_MUX-SEL", 968 "SGMII_MUX_SEL", 969 "DP_MUX_SEL", 970 "UPHY3_USB_SEL", 971 "NCSI_MUX_SEL", 972 "BMC_PHY_RST", 973 "RTC_CLR_L", 974 "BMC_12V_CTRL", 975 "PS_RUN_IO0_PG", 976 "", 977 "", 978 "", 979 ""; 980 }; 981 982 rtc@6f { 983 compatible = "nuvoton,nct3018y"; 984 reg = <0x6f>; 985 }; 986}; 987 988&i2c7 { 989 status = "okay"; 990}; 991 992&i2c8 { 993 status = "okay"; 994}; 995 996&i2c9 { 997 status = "okay"; 998 // SCM TEMP SENSOR BOARD 999 temperature-sensor@4b { 1000 compatible = "national,lm75b"; 1001 reg = <0x4b>; 1002 }; 1003 1004 // SCM CPLD IOEXP 1005 io_expander4: gpio@4f { 1006 compatible = "nxp,pca9555"; 1007 reg = <0x4f>; 1008 gpio-controller; 1009 #gpio-cells = <2>; 1010 gpio-line-names = 1011 "stby_power_en_cpld", 1012 "stby_power_gd_cpld", 1013 "", 1014 "", 1015 "", 1016 "", 1017 "", 1018 "", 1019 "", 1020 "", 1021 "shdn_force_l_cpld", 1022 "", 1023 "", 1024 "", 1025 "", 1026 ""; 1027 }; 1028 1029 // SCM FRU EEPROM 1030 eeprom@50 { 1031 compatible = "atmel,24c64"; 1032 reg = <0x50>; 1033 }; 1034 1035 // BSM FRU EEPROM 1036 eeprom@56 { 1037 compatible = "atmel,24c64"; 1038 reg = <0x56>; 1039 }; 1040}; 1041 1042&i2c10 { 1043 status = "okay"; 1044 multi-master; 1045 mctp-controller; 1046 mctp@10 { 1047 compatible = "mctp-i2c-controller"; 1048 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 1049 }; 1050 1051 // OCP NIC0 TEMP 1052 temperature-sensor@1f { 1053 compatible = "ti,tmp421"; 1054 reg = <0x1f>; 1055 }; 1056 1057 // OCP NIC0 FRU EEPROM 1058 eeprom@50 { 1059 compatible = "atmel,24c64"; 1060 reg = <0x50>; 1061 }; 1062}; 1063 1064&i2c11 { 1065 status = "okay"; 1066 1067 ssif-bmc@10 { 1068 compatible = "ssif-bmc"; 1069 reg = <0x10>; 1070 }; 1071}; 1072 1073&i2c12 { 1074 status = "okay"; 1075 multi-master; 1076 1077 // HPM 1 FRU EEPROM 1078 eeprom@50 { 1079 compatible = "atmel,24c64"; 1080 reg = <0x50>; 1081 }; 1082 // CBC 2 FRU 1083 eeprom@54 { 1084 compatible = "atmel,24c02"; 1085 reg = <0x54>; 1086 }; 1087 // CBC 3 FRU 1088 eeprom@55 { 1089 compatible = "atmel,24c02"; 1090 reg = <0x55>; 1091 }; 1092}; 1093 1094&i2c13 { 1095 status = "okay"; 1096 multi-master; 1097 1098 // HPM FRU EEPROM 1099 eeprom@50 { 1100 compatible = "atmel,24c64"; 1101 reg = <0x50>; 1102 }; 1103 1104 // CBC 0 FRU 1105 eeprom@54 { 1106 compatible = "atmel,24c02"; 1107 reg = <0x54>; 1108 }; 1109 1110 // CBC 1 FRU 1111 eeprom@55 { 1112 compatible = "atmel,24c02"; 1113 reg = <0x55>; 1114 }; 1115 1116 // HMC FRU EEPROM 1117 eeprom@57 { 1118 compatible = "atmel,24c02"; 1119 reg = <0x57>; 1120 }; 1121}; 1122 1123&i2c14 { 1124 status = "okay"; 1125 1126 // PDB CPLD IOEXP 0x10 1127 io_expander9: gpio@10 { 1128 compatible = "nxp,pca9555"; 1129 interrupt-parent = <&gpio0>; 1130 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 1131 reg = <0x10>; 1132 gpio-controller; 1133 #gpio-cells = <2>; 1134 gpio-line-names = 1135 "wSequence_Latch_State_N", 1136 "wP12V_N1N2_RUNTIME_FLT_N", 1137 "wP12V_FAN_RUNTIME_FLT_N", 1138 "wP12V_AUX_RUNTIME_FLT_N", 1139 "wHost_PERST_SEQPWR_FLT_N", 1140 "wP12V_N1N2_SEQPWR_FLT_N", 1141 "wP12V_FAN_SEQPWR_FLT_N", 1142 "wP12V_AUX_SEQPWR_FLT_N", 1143 "wP12V_RUNTIME_FLT_NIC1_N", 1144 "wAUX_RUNTIME_FLT_NIC1_N", 1145 "wP12V_SEQPWR_FLT_NIC1_N", 1146 "wAUX_SEQPWR_FLT_NIC1_N", 1147 "wP12V_RUNTIME_FLT_NIC0_N", 1148 "wAUX_RUNTIME_FLT_NIC0_N", 1149 "wP12V_SEQPWR_FLT_NIC0_N", 1150 "wAUX_SEQPWR_FLT_NIC0_N"; 1151 }; 1152 1153 // PDB CPLD IOEXP 0x11 1154 io_expander10: gpio@11 { 1155 compatible = "nxp,pca9555"; 1156 interrupt-parent = <&gpio0>; 1157 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 1158 reg = <0x11>; 1159 gpio-controller; 1160 #gpio-cells = <2>; 1161 gpio-line-names = 1162 "FM_P12V_NIC1_FLTB_R_N", 1163 "FM_P3V3_NIC1_FAULT_R_N", 1164 "FM_P12V_NIC0_FLTB_R_N", 1165 "FM_P3V3_NIC0_FAULT_R_N", 1166 "P48V_HS2_FAULT_N_PLD", 1167 "P48V_HS1_FAULT_N_PLD", 1168 "P12V_AUX_FAN_OC_PLD_N", 1169 "P12V_AUX_FAN_FAULT_PLD_N", 1170 "", 1171 "", 1172 "", 1173 "", 1174 "", 1175 "FM_SYS_THROTTLE_N", 1176 "OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N", 1177 "OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N"; 1178 }; 1179 1180 // PDB CPLD IOEXP 0x12 1181 io_expander11: gpio@12 { 1182 compatible = "nxp,pca9555"; 1183 interrupt-parent = <&gpio0>; 1184 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 1185 reg = <0x12>; 1186 gpio-controller; 1187 #gpio-cells = <2>; 1188 gpio-line-names = 1189 "P12V_AUX_PSU_SMB_ALERT_R_L", 1190 "P12V_SCM_SENSE_ALERT_R_N", 1191 "P12V_AUX_NIC1_SENSE_ALERT_R_N", 1192 "P12V_AUX_NIC0_SENSE_ALERT_R_N", 1193 "NODEB_PSU_SMB_ALERT_R_L", 1194 "NODEA_PSU_SMB_ALERT_R_L", 1195 "P12V_AUX_FAN_ALERT_PLD_N", 1196 "P52V_SENSE_ALERT_PLD_N", 1197 "PRSNT_RJ45_FIO_N_R", 1198 "FM_MAIN_PWREN_RMC_EN_ISO_R", 1199 "CHASSIS3_LEAK_Q_N_PLD", 1200 "CHASSIS2_LEAK_Q_N_PLD", 1201 "CHASSIS1_LEAK_Q_N_PLD", 1202 "CHASSIS0_LEAK_Q_N_PLD", 1203 "", 1204 "SMB_RJ45_FIO_TMP_ALERT"; 1205 }; 1206 1207 // PDB CPLD IOEXP 0x13 1208 io_expander12: gpio@13 { 1209 compatible = "nxp,pca9555"; 1210 interrupt-parent = <&gpio0>; 1211 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 1212 reg = <0x13>; 1213 gpio-controller; 1214 #gpio-cells = <2>; 1215 gpio-line-names = 1216 "FAN_7_PRESENT_N", 1217 "FAN_6_PRESENT_N", 1218 "FAN_5_PRESENT_N", 1219 "FAN_4_PRESENT_N", 1220 "FAN_3_PRESENT_N", 1221 "FAN_2_PRESENT_N", 1222 "FAN_1_PRESENT_N", 1223 "FAN_0_PRESENT_N", 1224 "HP_LVC3_OCP_V3_2_PRSNT2_PLD_N", 1225 "HP_LVC3_OCP_V3_1_PRSNT2_PLD_N", 1226 "PRSNT_HDDBD_POWER_CABLE_N", 1227 "PRSNT_OSFP0_POWER_CABLE_N", 1228 "PRSNT_CHASSIS3_LEAK_CABLE_R_N", 1229 "PRSNT_CHASSIS2_LEAK_CABLE_R_N", 1230 "PRSNT_CHASSIS1_LEAK_CABLE_R_N", 1231 "PRSNT_CHASSIS0_LEAK_CABLE_R_N"; 1232 }; 1233 1234 // PDB CPLD IOEXP 0x14 1235 io_expander13: gpio@14 { 1236 compatible = "nxp,pca9555"; 1237 reg = <0x14>; 1238 gpio-controller; 1239 #gpio-cells = <2>; 1240 gpio-line-names = 1241 "rmc_en_dc_pwr_on", 1242 "HDD_LED_N", 1243 "", 1244 "", 1245 "", 1246 "", 1247 "", 1248 "", 1249 "leak_config_0", 1250 "leak_config_1", 1251 "leak_config_2", 1252 "leak_config_3", 1253 "mfg_led_test_mode_l", 1254 "small_leak_err_inj", 1255 "large_leak_err_inj", 1256 ""; 1257 }; 1258}; 1259 1260&i2c15 { 1261 status = "okay"; 1262 multi-master; 1263 mctp-controller; 1264 mctp@10 { 1265 compatible = "mctp-i2c-controller"; 1266 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 1267 }; 1268 1269 // OCP NIC1 TEMP 1270 temperature-sensor@1f { 1271 compatible = "ti,tmp421"; 1272 reg = <0x1f>; 1273 }; 1274 1275 // OCP NIC1 FRU EEPROM 1276 eeprom@52 { 1277 compatible = "atmel,24c64"; 1278 reg = <0x52>; 1279 }; 1280}; 1281 1282&mac2 { 1283 status = "okay"; 1284 pinctrl-names = "default"; 1285 pinctrl-0 = <&pinctrl_ncsi3_default>; 1286 use-ncsi; 1287}; 1288 1289&mac3 { 1290 status = "okay"; 1291 pinctrl-names = "default"; 1292 pinctrl-0 = <&pinctrl_ncsi4_default>; 1293 use-ncsi; 1294}; 1295 1296&uart1 { 1297 status = "okay"; 1298}; 1299 1300&uart3 { 1301 status = "okay"; 1302}; 1303 1304&uart4 { 1305 status = "okay"; 1306}; 1307 1308&uart5 { 1309 status = "okay"; 1310}; 1311 1312&wdt1 { 1313 status = "okay"; 1314 pinctrl-names = "default"; 1315 pinctrl-0 = <&pinctrl_wdtrst1_default>; 1316 aspeed,reset-type = "soc"; 1317 aspeed,external-signal; 1318 aspeed,ext-push-pull; 1319 aspeed,ext-active-high; 1320 aspeed,ext-pulse-duration = <256>; 1321}; 1322