1// SPDX-License-Identifier: GPL-2.0-or-later 2 3/dts-v1/; 4#include "aspeed-g6.dtsi" 5#include <dt-bindings/gpio/aspeed-gpio.h> 6#include <dt-bindings/i2c/i2c.h> 7 8/ { 9 model = "Facebook Anacapa BMC"; 10 compatible = "facebook,anacapa-bmc", "aspeed,ast2600"; 11 12 aliases { 13 serial0 = &uart1; 14 serial1 = &uart2; 15 serial2 = &uart3; 16 serial3 = &uart4; 17 serial4 = &uart5; 18 i2c16 = &i2c0mux0ch0; 19 i2c17 = &i2c0mux0ch1; 20 i2c18 = &i2c0mux0ch2; 21 i2c19 = &i2c0mux0ch3; 22 i2c20 = &i2c1mux0ch0; 23 i2c21 = &i2c1mux0ch1; 24 i2c22 = &i2c1mux0ch2; 25 i2c23 = &i2c1mux0ch3; 26 i2c24 = &i2c4mux0ch0; 27 i2c25 = &i2c4mux0ch1; 28 i2c26 = &i2c4mux0ch2; 29 i2c27 = &i2c4mux0ch3; 30 i2c28 = &i2c4mux0ch4; 31 i2c29 = &i2c4mux0ch5; 32 i2c30 = &i2c4mux0ch6; 33 i2c31 = &i2c4mux0ch7; 34 i2c32 = &i2c8mux0ch0; 35 i2c33 = &i2c8mux0ch1; 36 i2c34 = &i2c8mux0ch2; 37 i2c35 = &i2c8mux0ch3; 38 i2c36 = &i2c10mux0ch0; 39 i2c37 = &i2c10mux0ch1; 40 i2c38 = &i2c10mux0ch2; 41 i2c39 = &i2c10mux0ch3; 42 i2c40 = &i2c10mux0ch4; 43 i2c41 = &i2c10mux0ch5; 44 i2c42 = &i2c10mux0ch6; 45 i2c43 = &i2c10mux0ch7; 46 i2c44 = &i2c11mux0ch0; 47 i2c45 = &i2c11mux0ch1; 48 i2c46 = &i2c11mux0ch2; 49 i2c47 = &i2c11mux0ch3; 50 i2c48 = &i2c11mux0ch4; 51 i2c49 = &i2c11mux0ch5; 52 i2c50 = &i2c11mux0ch6; 53 i2c51 = &i2c11mux0ch7; 54 i2c52 = &i2c13mux0ch0; 55 i2c53 = &i2c13mux0ch1; 56 i2c54 = &i2c13mux0ch2; 57 i2c55 = &i2c13mux0ch3; 58 i2c56 = &i2c13mux0ch4; 59 i2c57 = &i2c13mux0ch5; 60 i2c58 = &i2c13mux0ch6; 61 i2c59 = &i2c13mux0ch7; 62 }; 63 64 chosen { 65 stdout-path = "serial4:57600n8"; 66 }; 67 68 iio-hwmon { 69 compatible = "iio-hwmon"; 70 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, 71 <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, 72 <&adc1 2>; 73 }; 74 75 leds { 76 compatible = "gpio-leds"; 77 78 led-0 { 79 label = "bmc_heartbeat_amber"; 80 gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 81 linux,default-trigger = "heartbeat"; 82 }; 83 84 led-1 { 85 label = "fp_id_amber"; 86 default-state = "off"; 87 gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 88 }; 89 }; 90 91 memory@80000000 { 92 device_type = "memory"; 93 reg = <0x80000000 0x80000000>; 94 }; 95 96 reserved-memory { 97 #address-cells = <1>; 98 #size-cells = <1>; 99 ranges; 100 101 video_engine_memory: video { 102 size = <0x02c00000>; 103 alignment = <0x00100000>; 104 compatible = "shared-dma-pool"; 105 reusable; 106 }; 107 108 gfx_memory: framebuffer { 109 size = <0x01000000>; 110 alignment = <0x01000000>; 111 compatible = "shared-dma-pool"; 112 reusable; 113 }; 114 }; 115 116 p3v3_bmc_aux: regulator-p3v3-bmc-aux { 117 compatible = "regulator-fixed"; 118 regulator-name = "p3v3_bmc_aux"; 119 regulator-min-microvolt = <3300000>; 120 regulator-max-microvolt = <3300000>; 121 regulator-always-on; 122 }; 123 124 spi_gpio: spi { 125 compatible = "spi-gpio"; 126 #address-cells = <1>; 127 #size-cells = <0>; 128 129 sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 130 mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 131 miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; 132 cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 133 num-chipselects = <1>; 134 status = "okay"; 135 136 tpm@0 { 137 compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 138 spi-max-frequency = <33000000>; 139 reg = <0>; 140 }; 141 }; 142}; 143 144&adc0 { 145 aspeed,int-vref-microvolt = <2500000>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 148 &pinctrl_adc2_default &pinctrl_adc3_default 149 &pinctrl_adc4_default &pinctrl_adc5_default 150 &pinctrl_adc6_default &pinctrl_adc7_default>; 151 status = "okay"; 152}; 153 154&adc1 { 155 aspeed,int-vref-microvolt = <2500000>; 156 pinctrl-names = "default"; 157 pinctrl-0 = <&pinctrl_adc10_default>; 158 status = "okay"; 159}; 160 161&ehci1 { 162 status = "okay"; 163}; 164 165&fmc { 166 status = "okay"; 167 168 flash@0 { 169 status = "okay"; 170 m25p,fast-read; 171 label = "bmc"; 172 spi-max-frequency = <50000000>; 173#include "openbmc-flash-layout-128.dtsi" 174 }; 175 176 flash@1 { 177 status = "okay"; 178 m25p,fast-read; 179 label = "alt-bmc"; 180 spi-max-frequency = <50000000>; 181 }; 182}; 183 184&gfx { 185 status = "okay"; 186 memory-region = <&gfx_memory>; 187}; 188 189&gpio0 { 190 gpio-line-names = 191 192 /*A0-A7*/ 193 "","","","","","","","", 194 195 /*B0-B7*/ 196 "BATTERY_DETECT", "", "", "BMC_READY", 197 "", "FM_ID_LED", "", "", 198 199 /*C0-C7*/ 200 "","","","","","","","", 201 202 /*D0-D7*/ 203 "","","","","","","","", 204 205 /*E0-E7*/ 206 "","","","","","","","", 207 208 /*F0-F7*/ 209 "","","","","","","","", 210 211 /*G0-G7*/ 212 "FM_MUX1_SEL", "", "", "", 213 "", "", "FM_DEBUG_PORT_PRSNT_N", "FM_BMC_DBP_PRESENT_N", 214 215 /*H0-H7*/ 216 "","","","","","","","", 217 218 /*I0-I7*/ 219 "", "", "", "", 220 "", "FLASH_WP_STATUS", "BMC_JTAG_MUX_SEL", "", 221 222 /*J0-J7*/ 223 "","","","","","","","", 224 225 /*K0-K7*/ 226 "","","","","","","","", 227 228 /*L0-L7*/ 229 "","","","","","","","", 230 231 /*M0-M7*/ 232 "", "BMC_FRU_WP", "", "", 233 "", "", "", "", 234 235 /*N0-N7*/ 236 "LED_POSTCODE_0", "LED_POSTCODE_1", "LED_POSTCODE_2", "LED_POSTCODE_3", 237 "LED_POSTCODE_4", "LED_POSTCODE_5", "LED_POSTCODE_6", "LED_POSTCODE_7", 238 239 /*O0-O7*/ 240 "","","","","","","","", 241 242 /*P0-P7*/ 243 "PWR_BTN_BMC_BUF_N", "", "ID_RST_BTN_BMC_N", "", 244 "PWR_LED", "", "", "BMC_HEARTBEAT_N", 245 246 /*Q0-Q7*/ 247 "","","","","","","","", 248 249 /*R0-R7*/ 250 "","","","","","","","", 251 252 /*S0-S7*/ 253 "", "", "SYS_BMC_PWRBTN_N", "", 254 "", "", "", "RUN_POWER_FAULT", 255 256 /*T0-T7*/ 257 "","","","","","","","", 258 259 /*U0-U7*/ 260 "","","","","","","","", 261 262 /*V0-V7*/ 263 "","","","","","","","", 264 265 /*W0-W7*/ 266 "","","","","","","","", 267 268 /*X0-X7*/ 269 "","","","","","","","", 270 271 /*Y0-Y7*/ 272 "","","","","","","","", 273 274 /*Z0-Z7*/ 275 "SPI_BMC_TPM_CS2_N", "", "", "SPI_BMC_TPM_CLK", 276 "SPI_BMC_TPM_MOSI", "SPI_BMC_TPM_MISO", "", ""; 277}; 278 279&gpio1 { 280 gpio-line-names = 281 /*18A0-18A7*/ 282 "","","","","","","","", 283 284 /*18B0-18B7*/ 285 "","","","", 286 "FM_BOARD_BMC_REV_ID0", "FM_BOARD_BMC_REV_ID1", 287 "FM_BOARD_BMC_REV_ID2", "", 288 289 /*18C0-18C7*/ 290 "","","","","","","","", 291 292 /*18D0-18D7*/ 293 "","","","","","","","", 294 295 /*18E0-18E3*/ 296 "FM_BMC_PROT_LS_EN", "AC_PWR_BMC_BTN_N", "", ""; 297}; 298 299// L Bridge Board 300&i2c0 { 301 status = "okay"; 302 303 eeprom@50 { 304 compatible = "atmel,24c2048"; 305 reg = <0x50>; 306 pagesize = <128>; 307 }; 308 309 i2c-mux@70 { 310 compatible = "nxp,pca9546"; 311 reg = <0x70>; 312 #address-cells = <1>; 313 #size-cells = <0>; 314 i2c-mux-idle-disconnect; 315 316 i2c0mux0ch0: i2c@0 { 317 reg = <0>; 318 #address-cells = <1>; 319 #size-cells = <0>; 320 }; 321 i2c0mux0ch1: i2c@1 { 322 reg = <1>; 323 #address-cells = <1>; 324 #size-cells = <0>; 325 }; 326 i2c0mux0ch2: i2c@2 { 327 reg = <2>; 328 #address-cells = <1>; 329 #size-cells = <0>; 330 }; 331 i2c0mux0ch3: i2c@3 { 332 reg = <3>; 333 #address-cells = <1>; 334 #size-cells = <0>; 335 }; 336 }; 337}; 338 339// R Bridge Board 340&i2c1 { 341 status = "okay"; 342 343 eeprom@50 { 344 compatible = "atmel,24c2048"; 345 reg = <0x50>; 346 pagesize = <128>; 347 }; 348 349 i2c-mux@70 { 350 compatible = "nxp,pca9546"; 351 reg = <0x70>; 352 #address-cells = <1>; 353 #size-cells = <0>; 354 i2c-mux-idle-disconnect; 355 356 i2c1mux0ch0: i2c@0 { 357 reg = <0>; 358 #address-cells = <1>; 359 #size-cells = <0>; 360 }; 361 i2c1mux0ch1: i2c@1 { 362 reg = <1>; 363 #address-cells = <1>; 364 #size-cells = <0>; 365 }; 366 i2c1mux0ch2: i2c@2 { 367 reg = <2>; 368 #address-cells = <1>; 369 #size-cells = <0>; 370 }; 371 i2c1mux0ch3: i2c@3 { 372 reg = <3>; 373 #address-cells = <1>; 374 #size-cells = <0>; 375 }; 376 }; 377}; 378 379// MB - E1.S 380&i2c4 { 381 status = "okay"; 382 383 i2c-mux@70 { 384 compatible = "nxp,pca9548"; 385 reg = <0x70>; 386 #address-cells = <1>; 387 #size-cells = <0>; 388 i2c-mux-idle-disconnect; 389 390 i2c4mux0ch0: i2c@0 { 391 reg = <0>; 392 #address-cells = <1>; 393 #size-cells = <0>; 394 }; 395 i2c4mux0ch1: i2c@1 { 396 reg = <1>; 397 #address-cells = <1>; 398 #size-cells = <0>; 399 }; 400 i2c4mux0ch2: i2c@2 { 401 reg = <2>; 402 #address-cells = <1>; 403 #size-cells = <0>; 404 }; 405 i2c4mux0ch3: i2c@3 { 406 reg = <3>; 407 #address-cells = <1>; 408 #size-cells = <0>; 409 }; 410 i2c4mux0ch4: i2c@4 { 411 reg = <4>; 412 #address-cells = <1>; 413 #size-cells = <0>; 414 }; 415 i2c4mux0ch5: i2c@5 { 416 reg = <5>; 417 #address-cells = <1>; 418 #size-cells = <0>; 419 }; 420 i2c4mux0ch6: i2c@6 { 421 reg = <6>; 422 #address-cells = <1>; 423 #size-cells = <0>; 424 }; 425 i2c4mux0ch7: i2c@7 { 426 reg = <7>; 427 #address-cells = <1>; 428 #size-cells = <0>; 429 }; 430 }; 431}; 432 433// AMC 434&i2c5 { 435 status = "okay"; 436}; 437 438// MB 439&i2c6 { 440 status = "okay"; 441 442 // HPM FRU 443 eeprom@50 { 444 compatible = "atmel,24c256"; 445 reg = <0x50>; 446 }; 447}; 448 449// SCM 450&i2c7 { 451 status = "okay"; 452 453 454}; 455 456// MB - PDB 457&i2c8 { 458 status = "okay"; 459 460 i2c-mux@72 { 461 compatible = "nxp,pca9546"; 462 reg = <0x72>; 463 #address-cells = <1>; 464 #size-cells = <0>; 465 i2c-mux-idle-disconnect; 466 467 i2c8mux0ch0: i2c@0 { 468 reg = <0>; 469 #address-cells = <1>; 470 #size-cells = <0>; 471 472 adc@1f { 473 compatible = "ti,adc128d818"; 474 reg = <0x1f>; 475 ti,mode = /bits/ 8 <1>; 476 }; 477 478 gpio@22 { 479 compatible = "nxp,pca9555"; 480 reg = <0x22>; 481 gpio-controller; 482 #gpio-cells = <2>; 483 484 gpio-line-names = 485 "RPDB_FAN_FULL_SPEED_R_N", "RPDB_I2C_TEMP75_U8_ALERT_R_N", 486 "RPDB_I2C_TMP432_U29_ALERT_R_N", "RPDB_GLOBAL_WP", 487 "RPDB_FAN_CT_FAN_FAIL_R_N", "", 488 "", "", 489 "RPDB_ALERT_P50V_HSC2_R_N", "RPDB_ALERT_P50V_HSC3_R_N", 490 "RPDB_ALERT_P50V_HSC4_R_N", "RPDB_ALERT_P50V_STBY_R_N", 491 "RPDB_I2C_P12V_MB_VRM_ALERT_R_N", 492 "RPDB_I2C_P12V_STBY_VRM_ALERT_R_N", 493 "RPDB_PGD_P3V3_STBY_PWRGD_R", 494 "RPDB_P12V_STBY_VRM_PWRGD_BUF_R"; 495 }; 496 497 gpio@24 { 498 compatible = "nxp,pca9555"; 499 reg = <0x24>; 500 gpio-controller; 501 #gpio-cells = <2>; 502 503 gpio-line-names = 504 "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R", 505 "RPDB_PWRGD_P50V_HSC4_SYS_R", 506 "RPDB_PWRGD_P50V_STBY_SYS_BUF_R", 507 "RPDB_P50V_FAN1_R2_PG", "RPDB_P50V_FAN2_R2_PG", 508 "RPDB_P50V_FAN3_R2_PG", "RPDB_P50V_FAN4_R2_PG", 509 "", "RPDB_FAN1_PRSNT_N_R", 510 "", "RPDB_FAN2_PRSNT_N_R", 511 "RPDB_FAN3_PRSNT_N_R", "RPDB_FAN4_PRSNT_N_R", 512 "", ""; 513 }; 514 515 // R-PDB FRU 516 eeprom@50 { 517 compatible = "atmel,24c128"; 518 reg = <0x50>; 519 }; 520 }; 521 i2c8mux0ch1: i2c@1 { 522 reg = <1>; 523 #address-cells = <1>; 524 #size-cells = <0>; 525 526 gpio@22 { 527 compatible = "nxp,pca9555"; 528 reg = <0x22>; 529 gpio-controller; 530 #gpio-cells = <2>; 531 532 gpio-line-names = 533 "LPDB_FAN_FULL_SPEED_R_N","LPDB_I2C_TEMP75_U8_ALERT_R_N", 534 "LPDB_I2C_TMP432_U29_ALERT_R_N","LPDB_GLOBAL_WP", 535 "LPDB_FAN_CT_FAN_FAIL_R_N","", 536 "","", 537 "LPDB_ALERT_P50V_HSC0_R_N","LPDB_ALERT_P50V_HSC1_R_N", 538 "LPDB_ALERT_P50V_HSC5_R_N","LPDB_I2C_P12V_SW_VRM_ALERT_R_N", 539 "LPDB_EAM0_PRSNT_MOS_N_R","LPDB_EAM1_PRSNT_MOS_N_R", 540 "LPDB_PWRGD_P50V_HSC5_SYS_R",""; 541 }; 542 543 gpio@24 { 544 compatible = "nxp,pca9555"; 545 reg = <0x24>; 546 gpio-controller; 547 #gpio-cells = <2>; 548 549 gpio-line-names = 550 "LPDB_P50V_FAN1_R2_PG","LPDB_P50V_FAN2_R2_PG", 551 "LPDB_P50V_FAN3_R2_PG","LPDB_P50V_FAN4_R2_PG", 552 "LPDB_P50V_FAN5_R2_PG","LPDB_FAN1_PRSNT_N_R", 553 "LPDB_FAN2_PRSNT_N_R","LPDB_FAN3_PRSNT_N_R", 554 "LPDB_FAN4_PRSNT_N_R","LPDB_FAN5_PRSNT_N_R", 555 "","", 556 "","", 557 "",""; 558 }; 559 560 // L-PDB FRU 561 eeprom@50 { 562 compatible = "atmel,24c128"; 563 reg = <0x50>; 564 }; 565 }; 566 i2c8mux0ch2: i2c@2 { 567 reg = <2>; 568 #address-cells = <1>; 569 #size-cells = <0>; 570 }; 571 i2c8mux0ch3: i2c@3 { 572 reg = <3>; 573 #address-cells = <1>; 574 #size-cells = <0>; 575 }; 576 }; 577}; 578 579// SCM 580&i2c9 { 581 status = "okay"; 582 583 // SCM FRU 584 eeprom@50 { 585 compatible = "atmel,24c128"; 586 reg = <0x50>; 587 }; 588 589 // BSM FRU 590 eeprom@56 { 591 compatible = "atmel,24c64"; 592 reg = <0x56>; 593 }; 594}; 595 596// R Bridge Board 597&i2c10 { 598 status = "okay"; 599 600 i2c-mux@71 { 601 compatible = "nxp,pca9548"; 602 reg = <0x71>; 603 #address-cells = <1>; 604 #size-cells = <0>; 605 i2c-mux-idle-disconnect; 606 607 i2c10mux0ch0: i2c@0 { 608 reg = <0>; 609 #address-cells = <1>; 610 #size-cells = <0>; 611 }; 612 i2c10mux0ch1: i2c@1 { 613 reg = <1>; 614 #address-cells = <1>; 615 #size-cells = <0>; 616 }; 617 i2c10mux0ch2: i2c@2 { 618 reg = <2>; 619 #address-cells = <1>; 620 #size-cells = <0>; 621 }; 622 i2c10mux0ch3: i2c@3 { 623 reg = <3>; 624 #address-cells = <1>; 625 #size-cells = <0>; 626 }; 627 i2c10mux0ch4: i2c@4 { 628 reg = <4>; 629 #address-cells = <1>; 630 #size-cells = <0>; 631 }; 632 i2c10mux0ch5: i2c@5 { 633 reg = <5>; 634 #address-cells = <1>; 635 #size-cells = <0>; 636 637 gpio@22 { 638 compatible = "nxp,pca9555"; 639 reg = <0x22>; 640 gpio-controller; 641 #gpio-cells = <2>; 642 643 gpio-line-names = 644 "","", 645 "","RBB_CPLD_REFRESH_IN_PRGRS_R_L", 646 "RBB_EAM0_NIC_CBL_PRSNT_R_L","RBB_EAM1_NIC_CBL_PRSNT_R_L", 647 "RBB_AINIC_JTAG_MUX_R2_SEL","RBB_SPI_MUX0_R2_SEL", 648 "RBB_AINIC_PRSNT_R_L","RBB_AINIC_OE_R_N", 649 "RBB_AINIC_BOARD_R2_ID","RBB_RST_USB2_HUB_R_N", 650 "RBB_RST_FT4222_R_N","RBB_RST_MCP2210_R_N", 651 "",""; 652 }; 653 654 // R Bridge Board FRU 655 eeprom@52 { 656 compatible = "atmel,24c256"; 657 reg = <0x52>; 658 }; 659 }; 660 i2c10mux0ch6: i2c@6 { 661 reg = <6>; 662 #address-cells = <1>; 663 #size-cells = <0>; 664 }; 665 i2c10mux0ch7: i2c@7 { 666 reg = <7>; 667 #address-cells = <1>; 668 #size-cells = <0>; 669 }; 670 }; 671}; 672 673// L Bridge Board 674&i2c11 { 675 status = "okay"; 676 677 i2c-mux@71 { 678 compatible = "nxp,pca9548"; 679 reg = <0x71>; 680 #address-cells = <1>; 681 #size-cells = <0>; 682 i2c-mux-idle-disconnect; 683 684 i2c11mux0ch0: i2c@0 { 685 reg = <0>; 686 #address-cells = <1>; 687 #size-cells = <0>; 688 }; 689 i2c11mux0ch1: i2c@1 { 690 reg = <1>; 691 #address-cells = <1>; 692 #size-cells = <0>; 693 }; 694 i2c11mux0ch2: i2c@2 { 695 reg = <2>; 696 #address-cells = <1>; 697 #size-cells = <0>; 698 }; 699 i2c11mux0ch3: i2c@3 { 700 reg = <3>; 701 #address-cells = <1>; 702 #size-cells = <0>; 703 }; 704 i2c11mux0ch4: i2c@4 { 705 reg = <4>; 706 #address-cells = <1>; 707 #size-cells = <0>; 708 }; 709 i2c11mux0ch5: i2c@5 { 710 reg = <5>; 711 #address-cells = <1>; 712 #size-cells = <0>; 713 714 gpio@22 { 715 compatible = "nxp,pca9555"; 716 reg = <0x22>; 717 gpio-controller; 718 #gpio-cells = <2>; 719 720 gpio-line-names = 721 "","", 722 "","LBB_CPLD_REFRESH_IN_PRGRS_R_L", 723 "LBB_EAM0_NIC_CBL_PRSNT_R_L","LBB_EAM1_NIC_CBL_PRSNT_R_L", 724 "LBB_AINIC_JTAG_MUX_R2_SEL","LBB_SPI_MUX0_R2_SEL", 725 "LBB_AINIC_PRSNT_R_L","LBB_AINIC_OE_R_N", 726 "LBB_AINIC_BOARD_R2_ID","LBB_RST_USB2_HUB_R_N", 727 "LBB_RST_FT4222_R_N","LBB_RST_MCP2210_R_N", 728 "",""; 729 }; 730 731 // L Bridge Board FRU 732 eeprom@52 { 733 compatible = "atmel,24c256"; 734 reg = <0x52>; 735 }; 736 }; 737 i2c11mux0ch6: i2c@6 { 738 reg = <6>; 739 #address-cells = <1>; 740 #size-cells = <0>; 741 }; 742 i2c11mux0ch7: i2c@7 { 743 reg = <7>; 744 #address-cells = <1>; 745 #size-cells = <0>; 746 }; 747 }; 748}; 749 750// Debug Card 751&i2c12 { 752 status = "okay"; 753}; 754 755// MB 756&i2c13 { 757 status = "okay"; 758 759 i2c-mux@70 { 760 compatible = "nxp,pca9548"; 761 reg = <0x70>; 762 #address-cells = <1>; 763 #size-cells = <0>; 764 i2c-mux-idle-disconnect; 765 766 i2c13mux0ch0: i2c@0 { 767 reg = <0>; 768 #address-cells = <1>; 769 #size-cells = <0>; 770 }; 771 i2c13mux0ch1: i2c@1 { 772 reg = <1>; 773 #address-cells = <1>; 774 #size-cells = <0>; 775 }; 776 i2c13mux0ch2: i2c@2 { 777 reg = <2>; 778 #address-cells = <1>; 779 #size-cells = <0>; 780 }; 781 i2c13mux0ch3: i2c@3 { 782 reg = <3>; 783 #address-cells = <1>; 784 #size-cells = <0>; 785 786 adc@1f { 787 compatible = "ti,adc128d818"; 788 reg = <0x1f>; 789 ti,mode = /bits/ 8 <1>; 790 }; 791 }; 792 i2c13mux0ch4: i2c@4 { 793 reg = <4>; 794 #address-cells = <1>; 795 #size-cells = <0>; 796 797 // HPM BRD ID FRU 798 eeprom@51 { 799 compatible = "atmel,24c256"; 800 reg = <0x51>; 801 }; 802 }; 803 i2c13mux0ch5: i2c@5 { 804 reg = <5>; 805 #address-cells = <1>; 806 #size-cells = <0>; 807 }; 808 i2c13mux0ch6: i2c@6 { 809 reg = <6>; 810 #address-cells = <1>; 811 #size-cells = <0>; 812 }; 813 i2c13mux0ch7: i2c@7 { 814 reg = <7>; 815 #address-cells = <1>; 816 #size-cells = <0>; 817 818 nfc@28 { 819 compatible = "nxp,nxp-nci-i2c"; 820 reg = <0x28>; 821 822 interrupt-parent = <&sgpiom0>; 823 interrupts = <156 IRQ_TYPE_LEVEL_HIGH>; 824 825 enable-gpios = <&sgpiom0 241 GPIO_ACTIVE_HIGH>; 826 }; 827 }; 828 }; 829}; 830 831// SCM 832&i2c14 { 833 status = "okay"; 834}; 835 836&i2c15 { 837 status = "okay"; 838}; 839 840&kcs2 { 841 aspeed,lpc-io-reg = <0xca8>; 842 status = "okay"; 843}; 844 845&kcs3 { 846 aspeed,lpc-io-reg = <0xca2>; 847 status = "okay"; 848}; 849 850&lpc_ctrl { 851 status = "okay"; 852}; 853 854&mac2 { 855 status = "okay"; 856 pinctrl-names = "default"; 857 pinctrl-0 = <&pinctrl_ncsi3_default>; 858 use-ncsi; 859}; 860 861&sgpiom0 { 862 ngpios = <128>; 863 bus-frequency = <2000000>; 864 gpio-line-names = 865 /*in - out - in - out */ 866 /* A0-A7 line 0-15 */ 867 "", "FM_CPU0_SYS_RESET_N", "", "CPU0_KBRST_N", 868 "", "FM_CPU0_PROCHOT_trigger_N", "", "FM_CLR_CMOS_R_P0", 869 "", "Force_I3C_SEL", "", "SYSTEM_Force_Run_AC_Cycle", 870 "", "", "", "", 871 872 /* B0-B7 line 16-31 */ 873 "Channel0_leakage_EAM3", "FM_CPU_FPGA_JTAG_MUX_SEL", 874 "Channel1_leakage_EAM0", "FM_SCM_JTAG_MUX_SEL", 875 "Channel2_leakage_Manifold1", "FM_BRIDGE_JTAG_MUX_SEL", 876 "Channel3_leakage", "FM_CPU0_NMI_SYNC_FLOOD_N", 877 "Channel4_leakage_Manifold2", "", 878 "Channel5_leakage_EAM1", "", 879 "Channel6_leakage_CPU_DIMM", "", 880 "Channel7_leakage_EAM2", "", 881 882 /* C0-C7 line 32-47 */ 883 "RSVD_RMC_GPIO3", "", "", "", 884 "", "", "", "", 885 "LEAK_DETECT_RMC_N", "", "", "", 886 "", "", "", "", 887 888 /* D0-D7 line 48-63 */ 889 "PWRGD_PDB_EAMHSC0_CPLD_PG_R", "", 890 "PWRGD_PDB_EAMHSC1_CPLD_PG_R", "", 891 "PWRGD_PDB_EAMHSC2_CPLD_PG_R", "", 892 "PWRGD_PDB_EAMHSC3_CPLD_PG_R", "", 893 "AMC_BRD_PRSNT_CPLD_L", "", "", "", 894 "", "", "", "", 895 896 /* E0-E7 line 64-79 */ 897 "AMC_PDB_EAMHSC0_CPLD_EN_R", "", 898 "AMC_PDB_EAMHSC1_CPLD_EN_R", "", 899 "AMC_PDB_EAMHSC2_CPLD_EN_R", "", 900 "AMC_PDB_EAMHSC3_CPLD_EN_R", "", 901 "", "", "", "", 902 "", "", "", "", 903 904 /* F0-F7 line 80-95 */ 905 "PWRGD_PVDDCR_CPU1_P0", "SGPIO_READY", 906 "PWRGD_PVDDCR_CPU0_P0", "", 907 "", "", "", "", 908 "", "", "", "", 909 910 /* G0-G7 line 96-111 */ 911 "PWRGD_PVDDCR_SOC_P0", "", 912 "PWRGD_PVDDIO_P0", "", 913 "PWRGD_PVDDIO_MEM_S3_P0", "", 914 "PWRGD_CHMP_CPU0_FPGA", "", 915 "PWRGD_CHIL_CPU0_FPGA", "", 916 "PWRGD_CHEH_CPU0_FPGA", "", 917 "PWRGD_CHAD_CPU0_FPGA", "FM_BMC_READY_PLD", 918 "", "", 919 920 /* H0-H7 line 112-127 */ 921 "PWRGD_P3V3", "", 922 "P12V_DDR_IP_PWRGD_R", "", 923 "P12V_DDR_AH_PWRGD_R", "", 924 "PWRGD_P12V_VRM1_CPLD_PG_R", "", 925 "PWRGD_P12V_VRM0_CPLD_PG_R", "", 926 "PWRGD_PDB_HSC4_CPLD_PG_R", "", 927 "PWRGD_PVDD18_S5_P0_PG", "", 928 "PWRGD_PVDD33_S5_P0_PG", "", 929 930 /* I0-I7 line 128-143 */ 931 "EAM0_BRD_PRSNT_R_L", "", 932 "EAM1_BRD_PRSNT_R_L", "", 933 "EAM2_BRD_PRSNT_R_L", "", 934 "EAM3_BRD_PRSNT_R_L", "", 935 "EAM0_CPU_MOD_PWR_GD_R", "", 936 "EAM1_CPU_MOD_PWR_GD_R", "", 937 "EAM2_CPU_MOD_PWR_GD_R", "", 938 "EAM3_CPU_MOD_PWR_GD_R", "", 939 940 /* J0-J7 line 144-159 */ 941 "PRSNT_L_BIRDGE_R", "", 942 "PRSNT_R_BIRDGE_R", "", 943 "BRIDGE_L_MAIN_PG_R", "", 944 "BRIDGE_R_MAIN_PG_R", "", 945 "BRIDGE_L_STBY_PG_R", "", 946 "BRIDGE_R_STBY_PG_R", "", 947 "", "", "", "", 948 949 /* K0-K7 line 160-175 */ 950 "ADC_I2C_ALERT_N", "", 951 "TEMP_I2C_ALERT_R_L", "", 952 "CPU0_VR_SMB_ALERT_CPLD_N", "", 953 "COVER_INTRUDER_R_N", "", 954 "HANDLE_INTRUDER_CPLD_N", "", 955 "IRQ_MCIO_CPLD_WAKE_R_N", "", 956 "APML_CPU0_ALERT_R_N", "", 957 "PDB_ALERT_R_N", "", 958 959 /* L0-L7 line 176-191 */ 960 "CPU0_SP7R1", "", "CPU0_SP7R2", "", 961 "CPU0_SP7R3", "", "CPU0_SP7R4", "", 962 "CPU0_CORETYPE0", "", "CPU0_CORETYPE1", "", 963 "CPU0_CORETYPE2", "", "FM_BIOS_POST_CMPLT_R_N", "", 964 965 /* M0-M7 line 192-207 */ 966 "EAM0_SMERR_CPLD_R_L", "", 967 "EAM1_SMERR_CPLD_R_L", "", 968 "EAM2_SMERR_CPLD_R_L", "", 969 "EAM3_SMERR_CPLD_R_L", "", 970 "CPU0_SMERR_N_R", "", 971 "CPU0_NV_SAVE_N_R", "", 972 "PDB_PWR_LOSS_CPLD_N", "", 973 "IRQ_BMC_SMI_ACTIVE_R_N", "", 974 975 /* N0-N7 line 208-223 */ 976 "AMCROT_BMC_S5_RDY_R", "", 977 "AMC_RDY_R", "", 978 "AMC_STBY_PGOOD_R", "", 979 "CPU_AMC_SLP_S5_R_L", "", 980 "AMC_CPU_EAMPG_R", "", 981 "", "", "", "", 982 983 /* O0-O7 line 224-239 */ 984 "HPM_PWR_FAIL", "Port80_b0", 985 "FM_DIMM_IP_FAIL", "Port80_b1", 986 "FM_DIMM_AH_FAIL", "Port80_b2", 987 "HPM_AMC_THERMTRIP_R_L", "Port80_b3", 988 "FM_CPU0_THERMTRIP_N", "Port80_b4", 989 "PVDDCR_SOC_P0_OCP_L", "Port80_b5", 990 "CPLD_SGPIO_RDY", "Port80_b6", 991 "", "Port80_b7", 992 993 /* P0-P7 line 240-255 */ 994 "CPU0_SLP_S5_N_R", "NFC_VEN", 995 "CPU0_SLP_S3_N_R", "", 996 "FM_CPU0_PWRGD", "", 997 "PWRGD_RMC", "", 998 "FM_RST_CPU0_RESET_N", "", 999 "FM_PWRGD_CPU0_PWROK", "", 1000 "wS5_PWR_Ready", "", 1001 "wS0_ON_N", "PWRGD_P1V0_AUX"; 1002 status = "okay"; 1003}; 1004 1005// BIOS Flash 1006&spi2 { 1007 pinctrl-names = "default"; 1008 pinctrl-0 = <&pinctrl_spi2_default>; 1009 status = "okay"; 1010 reg = <0x1e631000 0xc4>, <0x50000000 0x8000000>; 1011 1012 flash@0 { 1013 compatible = "jedec,spi-nor"; 1014 label = "pnor"; 1015 spi-max-frequency = <12000000>; 1016 spi-tx-bus-width = <2>; 1017 spi-rx-bus-width = <2>; 1018 status = "okay"; 1019 }; 1020}; 1021 1022// HOST BIOS Debug 1023&uart1 { 1024 status = "okay"; 1025}; 1026 1027&uart3 { 1028 status = "okay"; 1029}; 1030 1031&uart4 { 1032 status = "okay"; 1033}; 1034 1035// BMC Debug Console 1036&uart5 { 1037 status = "okay"; 1038}; 1039 1040&uart_routing { 1041 status = "okay"; 1042}; 1043 1044&uhci { 1045 status = "okay"; 1046}; 1047 1048&vhub { 1049 status = "okay"; 1050 pinctrl-names = "default"; 1051}; 1052 1053&video { 1054 status = "okay"; 1055 memory-region = <&video_engine_memory>; 1056}; 1057 1058&wdt1 { 1059 pinctrl-names = "default"; 1060 pinctrl-0 = <&pinctrl_wdtrst1_default>; 1061 aspeed,reset-type = "soc"; 1062 aspeed,external-signal; 1063 aspeed,ext-push-pull; 1064 aspeed,ext-active-high; 1065 aspeed,ext-pulse-duration = <256>; 1066 status = "okay"; 1067}; 1068