xref: /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h (revision 7ef62cebc2f965b0f640263e179276928885e33d)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H
7 #define _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H
8 
9 /* LPASS_CORE_CC clocks */
10 #define LPASS_CORE_CC_DIG_PLL				0
11 #define LPASS_CORE_CC_DIG_PLL_OUT_MAIN_DIV_CLK_SRC	1
12 #define LPASS_CORE_CC_DIG_PLL_OUT_ODD			2
13 #define LPASS_CORE_CC_CORE_CLK				3
14 #define LPASS_CORE_CC_CORE_CLK_SRC			4
15 #define LPASS_CORE_CC_EXT_IF0_CLK_SRC			5
16 #define LPASS_CORE_CC_EXT_IF0_IBIT_CLK			6
17 #define LPASS_CORE_CC_EXT_IF1_CLK_SRC			7
18 #define LPASS_CORE_CC_EXT_IF1_IBIT_CLK			8
19 #define LPASS_CORE_CC_LPM_CORE_CLK			9
20 #define LPASS_CORE_CC_LPM_MEM0_CORE_CLK			10
21 #define LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK		11
22 #define LPASS_CORE_CC_EXT_MCLK0_CLK			12
23 #define LPASS_CORE_CC_EXT_MCLK0_CLK_SRC			13
24 
25 /* LPASS_CORE_CC power domains */
26 #define LPASS_CORE_CC_LPASS_CORE_HM_GDSC		0
27 
28 #endif
29