xref: /freebsd/sys/contrib/device-tree/Bindings/ufs/rockchip,rk3576-ufshc.yaml (revision 8ccc0d235c226d84112561d453c49904398d085c) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ufs/rockchip,rk3576-ufshc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip UFS Host Controller
8
9maintainers:
10  - Shawn Lin <shawn.lin@rock-chips.com>
11
12allOf:
13  - $ref: ufs-common.yaml
14
15properties:
16  compatible:
17    const: rockchip,rk3576-ufshc
18
19  reg:
20    maxItems: 5
21
22  reg-names:
23    items:
24      - const: hci
25      - const: mphy
26      - const: hci_grf
27      - const: mphy_grf
28      - const: hci_apb
29
30  clocks:
31    maxItems: 4
32
33  clock-names:
34    items:
35      - const: core
36      - const: pclk
37      - const: pclk_mphy
38      - const: ref_out
39
40  power-domains:
41    maxItems: 1
42
43  resets:
44    maxItems: 4
45
46  reset-names:
47    items:
48      - const: biu
49      - const: sys
50      - const: ufs
51      - const: grf
52
53  reset-gpios:
54    maxItems: 1
55    description: |
56      GPIO specifiers for host to reset the whole UFS device including PHY and
57      memory. This gpio is active low and should choose the one whose high output
58      voltage is lower than 1.5V based on the UFS spec.
59
60required:
61  - compatible
62  - reg
63  - reg-names
64  - clocks
65  - clock-names
66  - interrupts
67  - power-domains
68  - resets
69  - reset-names
70  - reset-gpios
71
72unevaluatedProperties: false
73
74examples:
75  - |
76    #include <dt-bindings/clock/rockchip,rk3576-cru.h>
77    #include <dt-bindings/reset/rockchip,rk3576-cru.h>
78    #include <dt-bindings/interrupt-controller/arm-gic.h>
79    #include <dt-bindings/power/rockchip,rk3576-power.h>
80    #include <dt-bindings/pinctrl/rockchip.h>
81    #include <dt-bindings/gpio/gpio.h>
82
83    soc {
84        #address-cells = <2>;
85        #size-cells = <2>;
86
87        ufshc: ufshc@2a2d0000 {
88            compatible = "rockchip,rk3576-ufshc";
89            reg = <0x0 0x2a2d0000 0x0 0x10000>,
90                  <0x0 0x2b040000 0x0 0x10000>,
91                  <0x0 0x2601f000 0x0 0x1000>,
92                  <0x0 0x2603c000 0x0 0x1000>,
93                  <0x0 0x2a2e0000 0x0 0x10000>;
94            reg-names = "hci", "mphy", "hci_grf", "mphy_grf", "hci_apb";
95            clocks = <&cru ACLK_UFS_SYS>, <&cru PCLK_USB_ROOT>, <&cru PCLK_MPHY>,
96                     <&cru CLK_REF_UFS_CLKOUT>;
97            clock-names = "core", "pclk", "pclk_mphy", "ref_out";
98            interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
99            power-domains = <&power RK3576_PD_USB>;
100            resets = <&cru SRST_A_UFS_BIU>, <&cru SRST_A_UFS_SYS>, <&cru SRST_A_UFS>,
101                     <&cru SRST_P_UFS_GRF>;
102            reset-names = "biu", "sys", "ufs", "grf";
103            reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>;
104        };
105    };
106