xref: /freebsd/sys/contrib/device-tree/Bindings/sound/mediatek,mt8173-afe-pcm.yaml (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/mediatek,mt8173-afe-pcm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek AFE PCM controller for MT8173
8
9maintainers:
10  - Trevor Wu <trevor.wu@mediatek.com>
11
12properties:
13  compatible:
14    const: mediatek,mt8173-afe-pcm
15
16  reg:
17    maxItems: 1
18
19  interrupts:
20    maxItems: 1
21
22  clocks:
23    items:
24      - description: audio infra sys clock
25      - description: audio top mux
26      - description: audio intbus mux
27      - description: apll1 clock
28      - description: apll2 clock
29      - description: i2s0 mclk mux
30      - description: i2s1 mclk mux
31      - description: i2s2 mclk mux
32      - description: i2s3 mclk mux
33      - description: i2s3 bclk mux
34
35  clock-names:
36    items:
37      - const: infra_sys_audio_clk
38      - const: top_pdn_audio
39      - const: top_pdn_aud_intbus
40      - const: bck0
41      - const: bck1
42      - const: i2s0_m
43      - const: i2s1_m
44      - const: i2s2_m
45      - const: i2s3_m
46      - const: i2s3_b
47
48  power-domains:
49    maxItems: 1
50
51  memory-region:
52    description: memory region for audio DMA buffers
53    maxItems: 1
54
55required:
56  - compatible
57  - reg
58  - interrupts
59  - clocks
60  - clock-names
61  - power-domains
62
63additionalProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/clock/mt8173-clk.h>
68    #include <dt-bindings/interrupt-controller/arm-gic.h>
69    #include <dt-bindings/interrupt-controller/irq.h>
70    #include <dt-bindings/power/mt8173-power.h>
71
72    mt8173-afe-pcm@11220000 {
73        compatible = "mediatek,mt8173-afe-pcm";
74        reg = <0x11220000 0x1000>;
75        interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_FALLING>;
76        power-domains = <&spm MT8173_POWER_DOMAIN_AUDIO>;
77        clocks = <&infracfg CLK_INFRA_AUDIO>,
78                 <&topckgen CLK_TOP_AUDIO_SEL>,
79                 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
80                 <&topckgen CLK_TOP_APLL1_DIV0>,
81                 <&topckgen CLK_TOP_APLL2_DIV0>,
82                 <&topckgen CLK_TOP_I2S0_M_SEL>,
83                 <&topckgen CLK_TOP_I2S1_M_SEL>,
84                 <&topckgen CLK_TOP_I2S2_M_SEL>,
85                 <&topckgen CLK_TOP_I2S3_M_SEL>,
86                 <&topckgen CLK_TOP_I2S3_B_SEL>;
87         clock-names = "infra_sys_audio_clk",
88                       "top_pdn_audio",
89                       "top_pdn_aud_intbus",
90                       "bck0",
91                       "bck1",
92                       "i2s0_m",
93                       "i2s1_m",
94                       "i2s2_m",
95                       "i2s3_m",
96                       "i2s3_b";
97          memory-region = <&afe_dma_mem>;
98    };
99