1Binding for Cadence UART Controller 2 3Required properties: 4- compatible : 5 Use "xlnx,xuartps","cdns,uart-r1p8" for Zynq-7xxx SoC. 6 Use "xlnx,zynqmp-uart","cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC. 7- reg: Should contain UART controller registers location and length. 8- interrupts: Should contain UART controller interrupts. 9- clocks: Must contain phandles to the UART clocks 10 See ../clocks/clock-bindings.txt for details. 11- clock-names: Tuple to identify input clocks, must contain "uart_clk" and "pclk" 12 See ../clocks/clock-bindings.txt for details. 13 14 15Optional properties: 16- cts-override : Override the CTS modem status signal. This signal will 17 always be reported as active instead of being obtained from the modem status 18 register. Define this if your serial port does not use this pin 19 20Example: 21 uart@e0000000 { 22 compatible = "cdns,uart-r1p8"; 23 clocks = <&clkc 23>, <&clkc 40>; 24 clock-names = "uart_clk", "pclk"; 25 reg = <0xE0000000 0x1000>; 26 interrupts = <0 27 4>; 27 }; 28