xref: /freebsd/sys/contrib/device-tree/Bindings/pinctrl/mediatek,mt8196-pinctrl.yaml (revision ae5de77ed78ae54d86cead5604869212e8008e6b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8196-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek MT8196 Pin Controller
8
9maintainers:
10  - Lei Xue <lei.xue@mediatek.com>
11  - Cathy Xu <ot_cathy.xu@mediatek.com>
12
13description:
14  The MediaTek's MT8196 Pin controller is used to control SoC pins.
15
16properties:
17  compatible:
18    const: mediatek,mt8196-pinctrl
19
20  reg:
21    items:
22      - description: gpio base
23      - description: rt group IO
24      - description: rm1 group IO
25      - description: rm2 group IO
26      - description: rb group IO
27      - description: bm1 group IO
28      - description: bm2 group IO
29      - description: bm3 group IO
30      - description: lt group IO
31      - description: lm1 group IO
32      - description: lm2 group IO
33      - description: lb1 group IO
34      - description: lb2 group IO
35      - description: tm1 group IO
36      - description: tm2 group IO
37      - description: tm3 group IO
38      - description: eint0 group IO
39      - description: eint1 group IO
40      - description: eint2 group IO
41      - description: eint3 group IO
42      - description: eint4 group IO
43
44  reg-names:
45    items:
46      - const: base
47      - const: rt
48      - const: rm1
49      - const: rm2
50      - const: rb
51      - const: bm1
52      - const: bm2
53      - const: bm3
54      - const: lt
55      - const: lm1
56      - const: lm2
57      - const: lb1
58      - const: lb2
59      - const: tm1
60      - const: tm2
61      - const: tm3
62      - const: eint0
63      - const: eint1
64      - const: eint2
65      - const: eint3
66      - const: eint4
67
68  interrupts:
69    description: The interrupt outputs to sysirq.
70    maxItems: 1
71
72  interrupt-controller: true
73
74  '#interrupt-cells':
75    const: 2
76
77  gpio-controller: true
78
79  '#gpio-cells':
80    description:
81      Number of cells in GPIO specifier, should be two. The first cell is the
82      pin number, the second cell is used to specify optional parameters which
83      are defined in <dt-bindings/gpio/gpio.h>.
84    const: 2
85
86  gpio-ranges:
87    maxItems: 1
88
89  gpio-line-names: true
90
91# PIN CONFIGURATION NODES
92patternProperties:
93  '-pins$':
94    type: object
95    additionalProperties: false
96
97    patternProperties:
98      '^pins':
99        type: object
100        $ref: /schemas/pinctrl/pincfg-node.yaml
101        additionalProperties: false
102        description:
103          A pinctrl node should contain at least one subnode representing the
104          pinctrl groups available on the machine. Each subnode will list the
105          pins it needs, and how they should be configured, with regard to muxer
106          configuration, pullups, drive strength, input enable/disable and input
107          schmitt.
108
109        properties:
110          pinmux:
111            description:
112              Integer array, represents gpio pin number and mux setting.
113              Supported pin number and mux varies for different SoCs, and are
114              defined as macros in arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h
115              directly, for this SoC.
116
117          drive-strength:
118            enum: [2, 4, 6, 8, 10, 12, 14, 16]
119
120          bias-pull-down:
121            oneOf:
122              - type: boolean
123              - enum: [100, 101, 102, 103]
124                description: mt8196 pull down PUPD/R0/R1 type define value.
125              - enum: [75000, 5000]
126                description: mt8196 pull down RSEL type si unit value(ohm).
127            description: |
128              For pull down type is normal, it doesn't need add R1R0 define
129              and resistance value.
130              For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
131              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
132              "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
133              "MTK_PUPD_SET_R1R0_11" define in mt8196.
134              For pull down type is PD/RSEL, it can add resistance value(ohm)
135              to set different resistance by identifying property
136              "mediatek,rsel-resistance-in-si-unit". It can support resistance
137              value(ohm) "75000" & "5000" in mt8196.
138
139          bias-pull-up:
140            oneOf:
141              - type: boolean
142              - enum: [100, 101, 102, 103]
143                description: mt8196 pull up PUPD/R0/R1 type define value.
144              - enum: [1000, 1500, 2000, 3000, 4000, 5000, 75000]
145                description: mt8196 pull up RSEL type si unit value(ohm).
146            description: |
147              For pull up type is normal, it don't need add R1R0 define
148              and resistance value.
149              For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
150              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
151              "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
152              "MTK_PUPD_SET_R1R0_11" define in mt8196.
153              For pull up type is PU/RSEL, it can add resistance value(ohm)
154              to set different resistance by identifying property
155              "mediatek,rsel-resistance-in-si-unit". It can support resistance
156              value(ohm) "1000" & "1500" & "2000" & "3000" & "4000" & "5000" &
157              "75000" in mt8196.
158
159          bias-disable: true
160
161          output-high: true
162
163          output-low: true
164
165          input-enable: true
166
167          input-disable: true
168
169          input-schmitt-enable: true
170
171          input-schmitt-disable: true
172
173        required:
174          - pinmux
175
176required:
177  - compatible
178  - reg
179  - interrupts
180  - interrupt-controller
181  - '#interrupt-cells'
182  - gpio-controller
183  - '#gpio-cells'
184  - gpio-ranges
185
186additionalProperties: false
187
188examples:
189  - |
190    #include <dt-bindings/pinctrl/mt65xx.h>
191    #include <dt-bindings/interrupt-controller/arm-gic.h>
192    #define PINMUX_GPIO99__FUNC_SCL0 (MTK_PIN_NO(99) | 1)
193    #define PINMUX_GPIO100__FUNC_SDA0 (MTK_PIN_NO(100) | 1)
194
195    pio: pinctrl@1002d000 {
196        compatible = "mediatek,mt8196-pinctrl";
197        reg = <0x1002d000 0x1000>,
198              <0x12000000 0x1000>,
199              <0x12020000 0x1000>,
200              <0x12040000 0x1000>,
201              <0x12060000 0x1000>,
202              <0x12820000 0x1000>,
203              <0x12840000 0x1000>,
204              <0x12860000 0x1000>,
205              <0x13000000 0x1000>,
206              <0x13020000 0x1000>,
207              <0x13040000 0x1000>,
208              <0x130f0000 0x1000>,
209              <0x13110000 0x1000>,
210              <0x13800000 0x1000>,
211              <0x13820000 0x1000>,
212              <0x13860000 0x1000>,
213              <0x12080000 0x1000>,
214              <0x12880000 0x1000>,
215              <0x13080000 0x1000>,
216              <0x13880000 0x1000>,
217              <0x1c54a000 0x1000>;
218        reg-names = "base", "rt", "rm1", "rm2", "rb" , "bm1",
219                    "bm2", "bm3", "lt", "lm1", "lm2", "lb1",
220                    "lb2", "tm1", "tm2", "tm3", "eint0", "eint1",
221                    "eint2", "eint3", "eint4";
222        gpio-controller;
223        #gpio-cells = <2>;
224        gpio-ranges = <&pio 0 0 271>;
225        interrupt-controller;
226        interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0>;
227        #interrupt-cells = <2>;
228
229        i2c0-pins {
230            pins {
231                pinmux = <PINMUX_GPIO99__FUNC_SCL0>,
232                         <PINMUX_GPIO100__FUNC_SDA0>;
233                bias-disable;
234            };
235        };
236    };
237