xref: /freebsd/sys/contrib/device-tree/Bindings/pinctrl/fsl,imx7ulp-iomuxc1.yaml (revision ae5de77ed78ae54d86cead5604869212e8008e6b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/fsl,imx7ulp-iomuxc1.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX7ULP IOMUX Controller
8
9description: |
10  i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7
11  ports and IOMUXC DDR for DDR interface.
12
13  Note: This binding doc is only for the IOMUXC1 support in A7 Domain and it
14  only supports generic pin config.
15
16  Please refer to fsl,imx-pinctrl.txt in this directory for common binding
17  part and usage.
18
19maintainers:
20  - Frank Li <Frank.Li@nxp.com>
21
22properties:
23  compatible:
24    const: fsl,imx7ulp-iomuxc1
25
26  reg:
27    maxItems: 1
28
29patternProperties:
30  'grp$':
31    type: object
32    description:
33      Pinctrl node's client devices use subnodes for desired pin configuration.
34      Client device subnodes use below standard properties.
35
36    properties:
37      fsl,pins:
38        description:
39          Each entry consists of 5 integers which represents the mux
40          and config setting for one pin. The first 4 integers
41          <mux_conf_reg input_reg mux_mode input_val> are specified
42          using a PIN_FUNC_ID macro, which can be found in
43          imx7ulp-pinfunc.h in the device tree source folder.
44          The last integer CONFIG is the pad setting value like
45          pull-up on this pin.
46
47          Please refer to i.MX7ULP Reference Manual for detailed
48          CONFIG settings.
49        $ref: /schemas/types.yaml#/definitions/uint32-matrix
50        items:
51          items:
52            - description: |
53                "mux_conf_reg" indicates the offset of mux register.
54            - description: |
55                "input_reg" indicates the offset of select input register.
56            - description: |
57                "mux_mode" indicates the mux value to be applied.
58            - description: |
59                "input_val" indicates the select input value to be applied.
60            - description: |
61                CONFIG bits definition:
62                  PAD_CTL_OBE           (1 << 17)
63                  PAD_CTL_IBE           (1 << 16)
64                  PAD_CTL_LK            (1 << 16)
65                  PAD_CTL_DSE_HI        (1 << 6)
66                  PAD_CTL_DSE_STD       (0 << 6)
67                  PAD_CTL_ODE           (1 << 5)
68                  PAD_CTL_PUSH_PULL     (0 << 5)
69                  PAD_CTL_SRE_SLOW      (1 << 2)
70                  PAD_CTL_SRE_STD       (0 << 2)
71                  PAD_CTL_PE            (1 << 0)
72
73    required:
74      - fsl,pins
75
76    additionalProperties: false
77
78required:
79  - compatible
80  - reg
81
82allOf:
83  - $ref: pinctrl.yaml#
84
85unevaluatedProperties: false
86
87examples:
88  - |
89    pinctrl@40ac0000 {
90        compatible = "fsl,imx7ulp-iomuxc1";
91        reg = <0x40ac0000 0x1000>;
92
93        lpuart4grp {
94            fsl,pins = <
95                0x000c 0x0248 0x4 0x1 0x1
96                0x0008 0x024c 0x4 0x1 0x1
97            >;
98        };
99    };
100