1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/amazon,al-alpine-v3-pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Amazon Annapurna Labs Alpine v3 PCIe Host Bridge 8 9maintainers: 10 - Jonathan Chocron <jonnyc@amazon.com> 11 12description: 13 Amazon's Annapurna Labs PCIe Host Controller is based on the Synopsys 14 DesignWare PCI controller. 15 16allOf: 17 - $ref: snps,dw-pcie.yaml# 18 19properties: 20 compatible: 21 enum: 22 - amazon,al-alpine-v2-pcie 23 - amazon,al-alpine-v3-pcie 24 25 reg: 26 items: 27 - description: PCIe ECAM space 28 - description: AL proprietary registers 29 - description: Designware PCIe registers 30 31 reg-names: 32 items: 33 - const: config 34 - const: controller 35 - const: dbi 36 37 interrupts: 38 maxItems: 1 39 40unevaluatedProperties: false 41 42required: 43 - compatible 44 - reg 45 - reg-names 46 47examples: 48 - | 49 #include <dt-bindings/interrupt-controller/arm-gic.h> 50 51 bus { 52 #address-cells = <2>; 53 #size-cells = <2>; 54 55 pcie@fb600000 { 56 compatible = "amazon,al-alpine-v3-pcie"; 57 reg = <0x0 0xfb600000 0x0 0x00100000 58 0x0 0xfd800000 0x0 0x00010000 59 0x0 0xfd810000 0x0 0x00001000>; 60 reg-names = "config", "controller", "dbi"; 61 bus-range = <0 255>; 62 device_type = "pci"; 63 #address-cells = <3>; 64 #size-cells = <2>; 65 #interrupt-cells = <1>; 66 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 67 interrupt-map-mask = <0x00 0 0 7>; 68 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */ 69 ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>; 70 }; 71 }; 72