1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/dsa/microchip,lan937x.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: LAN937x Ethernet Switch Series 8 9maintainers: 10 - UNGLinuxDriver@microchip.com 11 12allOf: 13 - $ref: dsa.yaml#/$defs/ethernet-ports 14 15properties: 16 compatible: 17 enum: 18 - microchip,lan9370 19 - microchip,lan9371 20 - microchip,lan9372 21 - microchip,lan9373 22 - microchip,lan9374 23 24 reg: 25 maxItems: 1 26 27 spi-max-frequency: 28 maximum: 50000000 29 30 reset-gpios: 31 description: Optional gpio specifier for a reset line 32 maxItems: 1 33 34 mdio: 35 $ref: /schemas/net/mdio.yaml# 36 unevaluatedProperties: false 37 38patternProperties: 39 "^(ethernet-)?ports$": 40 additionalProperties: true 41 patternProperties: 42 "^(ethernet-)?port@[0-7]$": 43 allOf: 44 - if: 45 properties: 46 phy-mode: 47 contains: 48 enum: 49 - rgmii 50 - rgmii-id 51 - rgmii-txid 52 - rgmii-rxid 53 then: 54 properties: 55 rx-internal-delay-ps: 56 enum: [0, 2000] 57 default: 0 58 tx-internal-delay-ps: 59 enum: [0, 2000] 60 default: 0 61 62required: 63 - compatible 64 - reg 65 66unevaluatedProperties: false 67 68examples: 69 - | 70 #include <dt-bindings/gpio/gpio.h> 71 72 macb0 { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 fixed-link { 77 speed = <1000>; 78 full-duplex; 79 }; 80 }; 81 82 spi { 83 #address-cells = <1>; 84 #size-cells = <0>; 85 86 lan9374: switch@0 { 87 compatible = "microchip,lan9374"; 88 reg = <0>; 89 spi-max-frequency = <44000000>; 90 91 ethernet-ports { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 port@0 { 96 reg = <0>; 97 label = "lan1"; 98 phy-mode = "internal"; 99 phy-handle = <&t1phy0>; 100 }; 101 102 port@1 { 103 reg = <1>; 104 label = "lan2"; 105 phy-mode = "internal"; 106 phy-handle = <&t1phy1>; 107 }; 108 109 port@2 { 110 reg = <2>; 111 label = "lan4"; 112 phy-mode = "internal"; 113 phy-handle = <&t1phy2>; 114 }; 115 116 port@3 { 117 reg = <3>; 118 label = "lan6"; 119 phy-mode = "internal"; 120 phy-handle = <&t1phy3>; 121 }; 122 123 port@4 { 124 reg = <4>; 125 phy-mode = "rgmii"; 126 tx-internal-delay-ps = <2000>; 127 rx-internal-delay-ps = <2000>; 128 ethernet = <&macb0>; 129 130 fixed-link { 131 speed = <1000>; 132 full-duplex; 133 }; 134 }; 135 136 port@5 { 137 reg = <5>; 138 label = "lan7"; 139 phy-mode = "rgmii"; 140 tx-internal-delay-ps = <2000>; 141 rx-internal-delay-ps = <2000>; 142 143 fixed-link { 144 speed = <1000>; 145 full-duplex; 146 }; 147 }; 148 149 port@6 { 150 reg = <6>; 151 label = "lan5"; 152 phy-mode = "internal"; 153 phy-handle = <&t1phy6>; 154 }; 155 156 port@7 { 157 reg = <7>; 158 label = "lan3"; 159 phy-mode = "internal"; 160 phy-handle = <&t1phy7>; 161 }; 162 }; 163 164 mdio { 165 #address-cells = <1>; 166 #size-cells = <0>; 167 168 t1phy0: ethernet-phy@0{ 169 reg = <0x0>; 170 }; 171 172 t1phy1: ethernet-phy@1{ 173 reg = <0x1>; 174 }; 175 176 t1phy2: ethernet-phy@2{ 177 reg = <0x2>; 178 }; 179 180 t1phy3: ethernet-phy@3{ 181 reg = <0x3>; 182 }; 183 184 t1phy6: ethernet-phy@6{ 185 reg = <0x6>; 186 }; 187 188 t1phy7: ethernet-phy@7{ 189 reg = <0x7>; 190 }; 191 }; 192 }; 193 }; 194