1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/airoha,en7581-npu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Airoha Network Processor Unit for EN7581 SoC 8 9maintainers: 10 - Lorenzo Bianconi <lorenzo@kernel.org> 11 12description: 13 The Airoha Network Processor Unit (NPU) provides a configuration interface 14 to implement wired and wireless hardware flow offloading programming Packet 15 Processor Engine (PPE) flow table. 16 17properties: 18 compatible: 19 enum: 20 - airoha,en7581-npu 21 22 reg: 23 maxItems: 1 24 25 interrupts: 26 items: 27 - description: mbox host irq line 28 - description: watchdog0 irq line 29 - description: watchdog1 irq line 30 - description: watchdog2 irq line 31 - description: watchdog3 irq line 32 - description: watchdog4 irq line 33 - description: watchdog5 irq line 34 - description: watchdog6 irq line 35 - description: watchdog7 irq line 36 - description: wlan irq line0 37 - description: wlan irq line1 38 - description: wlan irq line2 39 - description: wlan irq line3 40 - description: wlan irq line4 41 - description: wlan irq line5 42 43 memory-region: 44 maxItems: 1 45 description: 46 Memory used to store NPU firmware binary. 47 48required: 49 - compatible 50 - reg 51 - interrupts 52 - memory-region 53 54additionalProperties: false 55 56examples: 57 - | 58 #include <dt-bindings/interrupt-controller/arm-gic.h> 59 #include <dt-bindings/interrupt-controller/irq.h> 60 soc { 61 #address-cells = <2>; 62 #size-cells = <2>; 63 64 npu@1e900000 { 65 compatible = "airoha,en7581-npu"; 66 reg = <0 0x1e900000 0 0x313000>; 67 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 68 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 69 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 70 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 71 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 72 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 73 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 74 <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 75 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 76 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 77 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 78 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 79 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 80 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 81 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 82 memory-region = <&npu_binary>; 83 }; 84 }; 85