xref: /freebsd/sys/contrib/device-tree/Bindings/mailbox/sophgo,cv1800b-mailbox.yaml (revision ae5de77ed78ae54d86cead5604869212e8008e6b)
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/sophgo,cv1800b-mailbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Sophgo CV1800/SG2000 mailbox controller
8
9maintainers:
10  - Yuntao Dai <d1581209858@live.com>
11  - Junhui Liu <junhui.liu@pigmoral.tech>
12
13description:
14  Mailboxes integrated in Sophgo CV1800/SG2000 SoCs have 8 channels, each
15  shipping an 8-byte FIFO. Any processor can write to an arbitrary channel
16  and raise interrupts to receivers. Sending messages to itself is also
17  supported.
18
19properties:
20  compatible:
21    const: sophgo,cv1800b-mailbox
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    maxItems: 1
28
29  "#mbox-cells":
30    const: 2
31    description: |
32      <&phandle channel target>
33      phandle : Label name of mailbox controller
34      channel : 0-7, Channel index
35      target  : 0-3, Target processor ID
36
37      Sophgo CV1800/SG2000 SoCs include the following processors, numbered as:
38      <0> Cortex-A53 (Only available on CV181X/SG200X)
39      <1> C906B
40      <2> C906L
41      <3> 8051
42
43required:
44  - compatible
45  - reg
46  - interrupts
47  - "#mbox-cells"
48
49additionalProperties: false
50
51examples:
52  - |
53    #include <dt-bindings/interrupt-controller/irq.h>
54
55    mailbox@1900000 {
56        compatible = "sophgo,cv1800b-mailbox";
57        reg = <0x01900000 0x1000>;
58        interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
59        #mbox-cells = <2>;
60    };
61