1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/dac/adi,ad3530r.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Analog Devices AD3530R and Similar DACs 8 9maintainers: 10 - Kim Seer Paller <kimseer.paller@analog.com> 11 12description: | 13 The AD3530/AD3530R (8-channel) and AD3531/AD3531R (4-channel) are low-power, 14 16-bit, buffered voltage output digital-to-analog converters (DACs) with 15 software-programmable gain controls, providing full-scale output spans of 2.5V 16 or 5V for reference voltages of 2.5V. These devices operate from a single 2.7V 17 to 5.5V supply and are guaranteed monotonic by design. The "R" variants 18 include a 2.5V, 5ppm/°C internal reference, which is disabled by default. 19 Datasheet can be found here: 20 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3530_ad530r.pdf 21 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3531-ad3531r.pdf 22 23properties: 24 compatible: 25 enum: 26 - adi,ad3530 27 - adi,ad3530r 28 - adi,ad3531 29 - adi,ad3531r 30 31 reg: 32 maxItems: 1 33 34 spi-max-frequency: 35 maximum: 50000000 36 37 vdd-supply: 38 description: Power Supply Input. 39 40 iovdd-supply: 41 description: Digital Power Supply Input. 42 43 io-channels: 44 description: 45 ADC channel used to monitor internal die temperature, output voltages, and 46 current of a selected channel via the MUXOUT pin. 47 maxItems: 1 48 49 ref-supply: 50 description: 51 Reference Input/Output. The voltage at the REF pin sets the full-scale 52 range of all channels. If not provided the internal reference is used and 53 also provided on the VREF pin. 54 55 reset-gpios: 56 description: 57 Active low signal that is falling edge sensitive. When it is deasserted, 58 the digital core initialization is performed and all DAC registers except 59 the Interface Configuration A register are reset to their default values. 60 maxItems: 1 61 62 ldac-gpios: 63 description: 64 LDAC pin to be used as a hardware trigger to update the DAC channels. If 65 not present, the DAC channels are updated by Software LDAC. 66 maxItems: 1 67 68 adi,range-double: 69 description: 70 Configure the output range for all channels. If the property is present, 71 the output will range from 0V to 2Vref. If the property is not present, 72 the output will range from 0V to Vref. 73 type: boolean 74 75required: 76 - compatible 77 - reg 78 - vdd-supply 79 - iovdd-supply 80 81allOf: 82 - $ref: /schemas/spi/spi-peripheral-props.yaml# 83 84unevaluatedProperties: false 85 86examples: 87 - | 88 spi { 89 #address-cells = <1>; 90 #size-cells = <0>; 91 dac@0 { 92 compatible = "adi,ad3530r"; 93 reg = <0>; 94 spi-max-frequency = <1000000>; 95 96 vdd-supply = <&vdd>; 97 iovdd-supply = <&iovdd>; 98 }; 99 }; 100... 101