1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/ti/ti,am625-oldi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Texas Instruments AM625 OLDI Transmitter 8 9maintainers: 10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 11 - Aradhya Bhatia <aradhya.bhatia@linux.dev> 12 13description: 14 The AM625 TI Keystone OpenLDI transmitter (OLDI TX) supports serialized RGB 15 pixel data transmission between host and flat panel display over LVDS (Low 16 Voltage Differential Sampling) interface. The OLDI TX consists of 7-to-1 data 17 serializers, and 4-data and 1-clock LVDS outputs. It supports the LVDS output 18 formats "jeida-18", "jeida-24" and "vesa-18", and can accept 24-bit RGB or 19 padded and un-padded 18-bit RGB bus formats as input. 20 21properties: 22 reg: 23 maxItems: 1 24 25 clocks: 26 maxItems: 1 27 description: serial clock input for the OLDI transmitters 28 29 clock-names: 30 const: serial 31 32 ti,companion-oldi: 33 $ref: /schemas/types.yaml#/definitions/phandle 34 description: 35 phandle to companion OLDI transmitter. This property is required for both 36 the OLDI TXes if they are expected to work either in dual-lvds mode or in 37 clone mode. This property should point to the other OLDI TX's phandle. 38 39 ti,secondary-oldi: 40 type: boolean 41 description: 42 Boolean property to mark the OLDI transmitter as the secondary one, when the 43 OLDI hardware is expected to run as a companion HW, in cases of dual-lvds 44 mode or clone mode. The primary OLDI hardware is responsible for all the 45 hardware configuration. 46 47 ti,oldi-io-ctrl: 48 $ref: /schemas/types.yaml#/definitions/phandle 49 description: 50 phandle to syscon device node mapping OLDI IO_CTRL registers found in the 51 control MMR region. These registers are required to toggle the I/O lane 52 power, and control its electrical characteristics. 53 54 ports: 55 $ref: /schemas/graph.yaml#/properties/ports 56 57 properties: 58 port@0: 59 $ref: /schemas/graph.yaml#/properties/port 60 description: Parallel RGB input port 61 62 port@1: 63 $ref: /schemas/graph.yaml#/properties/port 64 description: LVDS output port 65 66 required: 67 - port@0 68 - port@1 69 70required: 71 - reg 72 - clocks 73 - clock-names 74 - ti,oldi-io-ctrl 75 - ports 76 77additionalProperties: false 78 79... 80