xref: /freebsd/sys/contrib/device-tree/Bindings/display/msm/dpu-msm8998.yaml (revision 370e009188ba90c3290b1479aa06ec98b66e140a) 
1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DPU dt properties for MSM8998 target
8
9maintainers:
10  - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
11
12description: |
13  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15  bindings of MDSS and DPU are mentioned for MSM8998 target.
16
17properties:
18  compatible:
19    items:
20      - const: qcom,msm8998-mdss
21
22  reg:
23    maxItems: 1
24
25  reg-names:
26    const: mdss
27
28  power-domains:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: Display AHB clock
34      - description: Display AXI clock
35      - description: Display core clock
36
37  clock-names:
38    items:
39      - const: iface
40      - const: bus
41      - const: core
42
43  interrupts:
44    maxItems: 1
45
46  interrupt-controller: true
47
48  "#address-cells": true
49
50  "#size-cells": true
51
52  "#interrupt-cells":
53    const: 1
54
55  iommus:
56    items:
57      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
58
59  ranges: true
60
61patternProperties:
62  "^display-controller@[0-9a-f]+$":
63    type: object
64    description: Node containing the properties of DPU.
65
66    properties:
67      compatible:
68        items:
69          - const: qcom,msm8998-dpu
70
71      reg:
72        items:
73          - description: Address offset and size for mdp register set
74          - description: Address offset and size for regdma register set
75          - description: Address offset and size for vbif register set
76          - description: Address offset and size for non-realtime vbif register set
77
78      reg-names:
79        items:
80          - const: mdp
81          - const: regdma
82          - const: vbif
83          - const: vbif_nrt
84
85      clocks:
86        items:
87          - description: Display ahb clock
88          - description: Display axi clock
89          - description: Display mem-noc clock
90          - description: Display core clock
91          - description: Display vsync clock
92
93      clock-names:
94        items:
95          - const: iface
96          - const: bus
97          - const: mnoc
98          - const: core
99          - const: vsync
100
101      interrupts:
102        maxItems: 1
103
104      power-domains:
105        maxItems: 1
106
107      operating-points-v2: true
108      ports:
109        $ref: /schemas/graph.yaml#/properties/ports
110        description: |
111          Contains the list of output ports from DPU device. These ports
112          connect to interfaces that are external to the DPU hardware,
113          such as DSI, DP etc. Each output port contains an endpoint that
114          describes how it is connected to an external interface.
115
116        properties:
117          port@0:
118            $ref: /schemas/graph.yaml#/properties/port
119            description: DPU_INTF1 (DSI1)
120
121          port@1:
122            $ref: /schemas/graph.yaml#/properties/port
123            description: DPU_INTF2 (DSI2)
124
125        required:
126          - port@0
127          - port@1
128
129    required:
130      - compatible
131      - reg
132      - reg-names
133      - clocks
134      - interrupts
135      - power-domains
136      - operating-points-v2
137      - ports
138
139required:
140  - compatible
141  - reg
142  - reg-names
143  - power-domains
144  - clocks
145  - interrupts
146  - interrupt-controller
147  - iommus
148  - ranges
149
150additionalProperties: false
151
152examples:
153  - |
154    #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
155    #include <dt-bindings/interrupt-controller/arm-gic.h>
156    #include <dt-bindings/power/qcom-rpmpd.h>
157
158    mdss: display-subsystem@c900000 {
159        compatible = "qcom,msm8998-mdss";
160        reg = <0x0c900000 0x1000>;
161        reg-names = "mdss";
162
163        clocks = <&mmcc MDSS_AHB_CLK>,
164                 <&mmcc MDSS_AXI_CLK>,
165                 <&mmcc MDSS_MDP_CLK>;
166        clock-names = "iface", "bus", "core";
167
168        #address-cells = <1>;
169        #interrupt-cells = <1>;
170        #size-cells = <1>;
171
172        interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
173        interrupt-controller;
174        iommus = <&mmss_smmu 0>;
175
176        power-domains = <&mmcc MDSS_GDSC>;
177        ranges;
178
179        display-controller@c901000 {
180            compatible = "qcom,msm8998-dpu";
181            reg = <0x0c901000 0x8f000>,
182                  <0x0c9a8e00 0xf0>,
183                  <0x0c9b0000 0x2008>,
184                  <0x0c9b8000 0x1040>;
185            reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
186
187            clocks = <&mmcc MDSS_AHB_CLK>,
188                     <&mmcc MDSS_AXI_CLK>,
189                     <&mmcc MNOC_AHB_CLK>,
190                     <&mmcc MDSS_MDP_CLK>,
191                     <&mmcc MDSS_VSYNC_CLK>;
192            clock-names = "iface", "bus", "mnoc", "core", "vsync";
193
194            interrupt-parent = <&mdss>;
195            interrupts = <0>;
196            operating-points-v2 = <&mdp_opp_table>;
197            power-domains = <&rpmpd MSM8998_VDDMX>;
198
199            ports {
200                #address-cells = <1>;
201                #size-cells = <0>;
202
203                port@0 {
204                    reg = <0>;
205                    dpu_intf1_out: endpoint {
206                        remote-endpoint = <&dsi0_in>;
207                    };
208                };
209
210                port@1 {
211                    reg = <1>;
212                    dpu_intf2_out: endpoint {
213                        remote-endpoint = <&dsi1_in>;
214                    };
215                };
216            };
217        };
218    };
219...
220