xref: /freebsd/sys/contrib/device-tree/Bindings/clock/rockchip,rk3308-cru.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* Rockchip RK3308 Clock and Reset Unit
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotThe RK3308 clock controller generates and supplies clock to various
4*c66ec88fSEmmanuel Vadotcontrollers within the SoC and also implements a reset controller for SoC
5*c66ec88fSEmmanuel Vadotperipherals.
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel VadotRequired Properties:
8*c66ec88fSEmmanuel Vadot
9*c66ec88fSEmmanuel Vadot- compatible: CRU should be "rockchip,rk3308-cru"
10*c66ec88fSEmmanuel Vadot- reg: physical base address of the controller and length of memory mapped
11*c66ec88fSEmmanuel Vadot  region.
12*c66ec88fSEmmanuel Vadot- #clock-cells: should be 1.
13*c66ec88fSEmmanuel Vadot- #reset-cells: should be 1.
14*c66ec88fSEmmanuel Vadot
15*c66ec88fSEmmanuel VadotOptional Properties:
16*c66ec88fSEmmanuel Vadot
17*c66ec88fSEmmanuel Vadot- rockchip,grf: phandle to the syscon managing the "general register files"
18*c66ec88fSEmmanuel Vadot  If missing, pll rates are not changeable, due to the missing pll lock status.
19*c66ec88fSEmmanuel Vadot
20*c66ec88fSEmmanuel VadotEach clock is assigned an identifier and client nodes can use this identifier
21*c66ec88fSEmmanuel Vadotto specify the clock which they consume. All available clocks are defined as
22*c66ec88fSEmmanuel Vadotpreprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be
23*c66ec88fSEmmanuel Vadotused in device tree sources. Similar macros exist for the reset sources in
24*c66ec88fSEmmanuel Vadotthese files.
25*c66ec88fSEmmanuel Vadot
26*c66ec88fSEmmanuel VadotExternal clocks:
27*c66ec88fSEmmanuel Vadot
28*c66ec88fSEmmanuel VadotThere are several clocks that are generated outside the SoC. It is expected
29*c66ec88fSEmmanuel Vadotthat they are defined using standard clock bindings with following
30*c66ec88fSEmmanuel Vadotclock-output-names:
31*c66ec88fSEmmanuel Vadot - "xin24m" - crystal input - required,
32*c66ec88fSEmmanuel Vadot - "xin32k" - rtc clock - optional,
33*c66ec88fSEmmanuel Vadot - "mclk_i2s0_8ch_in", "mclk_i2s1_8ch_in", "mclk_i2s2_8ch_in",
34*c66ec88fSEmmanuel Vadot   "mclk_i2s3_8ch_in", "mclk_i2s0_2ch_in",
35*c66ec88fSEmmanuel Vadot   "mclk_i2s1_2ch_in" - external I2S or SPDIF clock - optional,
36*c66ec88fSEmmanuel Vadot - "mac_clkin" - external MAC clock - optional
37*c66ec88fSEmmanuel Vadot
38*c66ec88fSEmmanuel VadotExample: Clock controller node:
39*c66ec88fSEmmanuel Vadot
40*c66ec88fSEmmanuel Vadot	cru: clock-controller@ff500000 {
41*c66ec88fSEmmanuel Vadot		compatible = "rockchip,rk3308-cru";
42*c66ec88fSEmmanuel Vadot		reg = <0x0 0xff500000 0x0 0x1000>;
43*c66ec88fSEmmanuel Vadot		rockchip,grf = <&grf>;
44*c66ec88fSEmmanuel Vadot		#clock-cells = <1>;
45*c66ec88fSEmmanuel Vadot		#reset-cells = <1>;
46*c66ec88fSEmmanuel Vadot	};
47*c66ec88fSEmmanuel Vadot
48*c66ec88fSEmmanuel VadotExample: UART controller node that consumes the clock generated by the clock
49*c66ec88fSEmmanuel Vadot  controller:
50*c66ec88fSEmmanuel Vadot
51*c66ec88fSEmmanuel Vadot	uart0: serial@ff0a0000 {
52*c66ec88fSEmmanuel Vadot		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
53*c66ec88fSEmmanuel Vadot		reg = <0x0 0xff0a0000 0x0 0x100>;
54*c66ec88fSEmmanuel Vadot		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
55*c66ec88fSEmmanuel Vadot		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
56*c66ec88fSEmmanuel Vadot		clock-names = "baudclk", "apb_pclk";
57*c66ec88fSEmmanuel Vadot		reg-shift = <2>;
58*c66ec88fSEmmanuel Vadot		reg-io-width = <4>;
59*c66ec88fSEmmanuel Vadot		status = "disabled";
60*c66ec88fSEmmanuel Vadot	};
61