xref: /freebsd/sys/contrib/dev/mediatek/mt76/mt76x02_util.c (revision 8ba4d145d351db26e07695b8e90697398c5dfec2)
1 // SPDX-License-Identifier: ISC
2 /*
3  * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
4  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
5  */
6 
7 #include <linux/module.h>
8 #include "mt76x02.h"
9 
10 #define MT76x02_CCK_RATE(_idx, _rate) {					\
11 	.bitrate = _rate,					\
12 	.flags = IEEE80211_RATE_SHORT_PREAMBLE,			\
13 	.hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx),		\
14 	.hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)),	\
15 }
16 
17 struct ieee80211_rate mt76x02_rates[] = {
18 	MT76x02_CCK_RATE(0, 10),
19 	MT76x02_CCK_RATE(1, 20),
20 	MT76x02_CCK_RATE(2, 55),
21 	MT76x02_CCK_RATE(3, 110),
22 	OFDM_RATE(0, 60),
23 	OFDM_RATE(1, 90),
24 	OFDM_RATE(2, 120),
25 	OFDM_RATE(3, 180),
26 	OFDM_RATE(4, 240),
27 	OFDM_RATE(5, 360),
28 	OFDM_RATE(6, 480),
29 	OFDM_RATE(7, 540),
30 };
31 EXPORT_SYMBOL_GPL(mt76x02_rates);
32 
33 static const struct ieee80211_iface_limit mt76x02_if_limits[] = {
34 	{
35 		.max = 1,
36 		.types = BIT(NL80211_IFTYPE_ADHOC)
37 	}, {
38 		.max = 8,
39 		.types = BIT(NL80211_IFTYPE_STATION) |
40 #ifdef CONFIG_MAC80211_MESH
41 			 BIT(NL80211_IFTYPE_MESH_POINT) |
42 #endif
43 			 BIT(NL80211_IFTYPE_P2P_CLIENT) |
44 			 BIT(NL80211_IFTYPE_P2P_GO) |
45 			 BIT(NL80211_IFTYPE_AP)
46 	 },
47 };
48 
49 static const struct ieee80211_iface_limit mt76x02u_if_limits[] = {
50 	{
51 		.max = 1,
52 		.types = BIT(NL80211_IFTYPE_ADHOC)
53 	}, {
54 		.max = 2,
55 		.types = BIT(NL80211_IFTYPE_STATION) |
56 #ifdef CONFIG_MAC80211_MESH
57 			 BIT(NL80211_IFTYPE_MESH_POINT) |
58 #endif
59 			 BIT(NL80211_IFTYPE_P2P_CLIENT) |
60 			 BIT(NL80211_IFTYPE_P2P_GO) |
61 			 BIT(NL80211_IFTYPE_AP)
62 	},
63 };
64 
65 static const struct ieee80211_iface_combination mt76x02_if_comb[] = {
66 	{
67 		.limits = mt76x02_if_limits,
68 		.n_limits = ARRAY_SIZE(mt76x02_if_limits),
69 		.max_interfaces = 8,
70 		.num_different_channels = 1,
71 		.beacon_int_infra_match = true,
72 		.radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
73 				       BIT(NL80211_CHAN_WIDTH_20) |
74 				       BIT(NL80211_CHAN_WIDTH_40) |
75 				       BIT(NL80211_CHAN_WIDTH_80),
76 	}
77 };
78 
79 static const struct ieee80211_iface_combination mt76x02u_if_comb[] = {
80 	{
81 		.limits = mt76x02u_if_limits,
82 		.n_limits = ARRAY_SIZE(mt76x02u_if_limits),
83 		.max_interfaces = 2,
84 		.num_different_channels = 1,
85 		.beacon_int_infra_match = true,
86 	}
87 };
88 
89 static void
mt76x02_led_set_config(struct mt76_phy * mphy,u8 delay_on,u8 delay_off)90 mt76x02_led_set_config(struct mt76_phy *mphy, u8 delay_on, u8 delay_off)
91 {
92 	struct mt76x02_dev *dev = container_of(mphy->dev, struct mt76x02_dev,
93 					       mt76);
94 	u32 val;
95 
96 	val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xff) |
97 	      FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
98 	      FIELD_PREP(MT_LED_STATUS_ON, delay_on);
99 
100 	mt76_wr(dev, MT_LED_S0(mphy->leds.pin), val);
101 	mt76_wr(dev, MT_LED_S1(mphy->leds.pin), val);
102 
103 	val = MT_LED_CTRL_REPLAY(mphy->leds.pin) |
104 	      MT_LED_CTRL_KICK(mphy->leds.pin);
105 	if (mphy->leds.al)
106 		val |= MT_LED_CTRL_POLARITY(mphy->leds.pin);
107 	mt76_wr(dev, MT_LED_CTRL, val);
108 }
109 
110 static int
mt76x02_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)111 mt76x02_led_set_blink(struct led_classdev *led_cdev,
112 		      unsigned long *delay_on,
113 		      unsigned long *delay_off)
114 {
115 	struct mt76_phy *mphy = container_of(led_cdev, struct mt76_phy,
116 					     leds.cdev);
117 	u8 delta_on, delta_off;
118 
119 	delta_off = max_t(u8, *delay_off / 10, 1);
120 	delta_on = max_t(u8, *delay_on / 10, 1);
121 
122 	mt76x02_led_set_config(mphy, delta_on, delta_off);
123 
124 	return 0;
125 }
126 
127 static void
mt76x02_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)128 mt76x02_led_set_brightness(struct led_classdev *led_cdev,
129 			   enum led_brightness brightness)
130 {
131 	struct mt76_phy *mphy = container_of(led_cdev, struct mt76_phy,
132 					     leds.cdev);
133 
134 	if (!brightness)
135 		mt76x02_led_set_config(mphy, 0, 0xff);
136 	else
137 		mt76x02_led_set_config(mphy, 0xff, 0);
138 }
139 
mt76x02_init_device(struct mt76x02_dev * dev)140 int mt76x02_init_device(struct mt76x02_dev *dev)
141 {
142 	struct ieee80211_hw *hw = mt76_hw(dev);
143 	struct wiphy *wiphy = hw->wiphy;
144 
145 	INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work);
146 
147 	hw->queues = 4;
148 	hw->max_rates = 1;
149 	hw->max_report_rates = 7;
150 	hw->max_rate_tries = 1;
151 	hw->extra_tx_headroom = 2;
152 
153 	if (mt76_is_usb(&dev->mt76)) {
154 		hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) +
155 					 MT_DMA_HDR_LEN;
156 		wiphy->iface_combinations = mt76x02u_if_comb;
157 		wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02u_if_comb);
158 	} else {
159 		INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work);
160 
161 		mt76x02_dfs_init_detector(dev);
162 
163 		wiphy->reg_notifier = mt76x02_regd_notifier;
164 		wiphy->iface_combinations = mt76x02_if_comb;
165 		wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb);
166 
167 		/* init led callbacks */
168 		if (IS_ENABLED(CONFIG_MT76_LEDS)) {
169 			dev->mphy.leds.cdev.brightness_set =
170 					mt76x02_led_set_brightness;
171 			dev->mphy.leds.cdev.blink_set = mt76x02_led_set_blink;
172 		}
173 	}
174 
175 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
176 
177 	hw->sta_data_size = sizeof(struct mt76x02_sta);
178 	hw->vif_data_size = sizeof(struct mt76x02_vif);
179 
180 	ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
181 	ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
182 	ieee80211_hw_set(hw, NEEDS_UNIQUE_STA_ADDR);
183 
184 	dev->mt76.global_wcid.idx = 255;
185 	dev->mt76.global_wcid.hw_key_idx = -1;
186 	dev->slottime = 9;
187 
188 	if (is_mt76x2(dev)) {
189 		dev->mphy.sband_2g.sband.ht_cap.cap |=
190 				IEEE80211_HT_CAP_LDPC_CODING;
191 		dev->mphy.sband_5g.sband.ht_cap.cap |=
192 				IEEE80211_HT_CAP_LDPC_CODING;
193 		dev->mphy.chainmask = 0x202;
194 		dev->mphy.antenna_mask = 3;
195 	} else {
196 		dev->mphy.chainmask = 0x101;
197 		dev->mphy.antenna_mask = 1;
198 	}
199 
200 	return 0;
201 }
202 EXPORT_SYMBOL_GPL(mt76x02_init_device);
203 
mt76x02_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)204 void mt76x02_configure_filter(struct ieee80211_hw *hw,
205 			      unsigned int changed_flags,
206 			      unsigned int *total_flags, u64 multicast)
207 {
208 	struct mt76x02_dev *dev = hw->priv;
209 	u32 flags = 0;
210 
211 #define MT76_FILTER(_flag, _hw) do { \
212 		flags |= *total_flags & FIF_##_flag;			\
213 		dev->mt76.rxfilter &= ~(_hw);				\
214 		dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw);	\
215 	} while (0)
216 
217 	mutex_lock(&dev->mt76.mutex);
218 
219 	dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS;
220 
221 	MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR);
222 	MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR);
223 	MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK |
224 			     MT_RX_FILTR_CFG_CTS |
225 			     MT_RX_FILTR_CFG_CFEND |
226 			     MT_RX_FILTR_CFG_CFACK |
227 			     MT_RX_FILTR_CFG_BA |
228 			     MT_RX_FILTR_CFG_CTRL_RSV);
229 	MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL);
230 
231 	*total_flags = flags;
232 	mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
233 
234 	mutex_unlock(&dev->mt76.mutex);
235 }
236 EXPORT_SYMBOL_GPL(mt76x02_configure_filter);
237 
mt76x02_sta_add(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)238 int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
239 		    struct ieee80211_sta *sta)
240 {
241 	struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
242 	struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
243 	struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
244 	int idx = 0;
245 
246 	memset(msta, 0, sizeof(*msta));
247 
248 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT76x02_N_WCIDS);
249 	if (idx < 0)
250 		return -ENOSPC;
251 
252 	msta->vif = mvif;
253 	msta->wcid.sta = 1;
254 	msta->wcid.idx = idx;
255 	msta->wcid.hw_key_idx = -1;
256 	mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr);
257 	mt76x02_mac_wcid_set_drop(dev, idx, false);
258 	ewma_pktlen_init(&msta->pktlen);
259 
260 	if (vif->type == NL80211_IFTYPE_AP)
261 		set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
262 
263 	return 0;
264 }
265 EXPORT_SYMBOL_GPL(mt76x02_sta_add);
266 
mt76x02_sta_remove(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)267 void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
268 			struct ieee80211_sta *sta)
269 {
270 	struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
271 	struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
272 	int idx = wcid->idx;
273 
274 	mt76x02_mac_wcid_set_drop(dev, idx, true);
275 	mt76x02_mac_wcid_setup(dev, idx, 0, NULL);
276 }
277 EXPORT_SYMBOL_GPL(mt76x02_sta_remove);
278 
279 static void
mt76x02_vif_init(struct mt76x02_dev * dev,struct ieee80211_vif * vif,unsigned int idx)280 mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif,
281 		 unsigned int idx)
282 {
283 	struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
284 	struct mt76_txq *mtxq;
285 
286 	memset(mvif, 0, sizeof(*mvif));
287 
288 	mvif->idx = idx;
289 	mvif->group_wcid.idx = MT_VIF_WCID(idx);
290 	mt76_wcid_init(&mvif->group_wcid, 0);
291 
292 	mtxq = (struct mt76_txq *)vif->txq->drv_priv;
293 	rcu_assign_pointer(dev->mt76.wcid[MT_VIF_WCID(idx)], &mvif->group_wcid);
294 	mtxq->wcid = MT_VIF_WCID(idx);
295 }
296 
297 int
mt76x02_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)298 mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
299 {
300 	struct mt76x02_dev *dev = hw->priv;
301 	unsigned int idx = 0;
302 
303 	/* Allow to change address in HW if we create first interface. */
304 	if (!dev->mt76.vif_mask &&
305 	    (((vif->addr[0] ^ dev->mphy.macaddr[0]) & ~GENMASK(4, 1)) ||
306 	     memcmp(vif->addr + 1, dev->mphy.macaddr + 1, ETH_ALEN - 1)))
307 		mt76x02_mac_setaddr(dev, vif->addr);
308 
309 	if (vif->addr[0] & BIT(1))
310 		idx = 1 + (((dev->mphy.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
311 
312 	/*
313 	 * Client mode typically only has one configurable BSSID register,
314 	 * which is used for bssidx=0. This is linked to the MAC address.
315 	 * Since mac80211 allows changing interface types, and we cannot
316 	 * force the use of the primary MAC address for a station mode
317 	 * interface, we need some other way of configuring a per-interface
318 	 * remote BSSID.
319 	 * The hardware provides an AP-Client feature, where bssidx 0-7 are
320 	 * used for AP mode and bssidx 8-15 for client mode.
321 	 * We shift the station interface bss index by 8 to force the
322 	 * hardware to recognize the BSSID.
323 	 * The resulting bssidx mismatch for unicast frames is ignored by hw.
324 	 */
325 	if (vif->type == NL80211_IFTYPE_STATION)
326 		idx += 8;
327 
328 	/* vif is already set or idx is 8 for AP/Mesh/... */
329 	if (dev->mt76.vif_mask & BIT_ULL(idx) ||
330 	    (vif->type != NL80211_IFTYPE_STATION && idx > 7))
331 		return -EBUSY;
332 
333 	dev->mt76.vif_mask |= BIT_ULL(idx);
334 
335 	mt76x02_vif_init(dev, vif, idx);
336 	return 0;
337 }
338 EXPORT_SYMBOL_GPL(mt76x02_add_interface);
339 
mt76x02_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)340 void mt76x02_remove_interface(struct ieee80211_hw *hw,
341 			      struct ieee80211_vif *vif)
342 {
343 	struct mt76x02_dev *dev = hw->priv;
344 	struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
345 
346 	dev->mt76.vif_mask &= ~BIT_ULL(mvif->idx);
347 	rcu_assign_pointer(dev->mt76.wcid[mvif->group_wcid.idx], NULL);
348 	mt76_wcid_cleanup(&dev->mt76, &mvif->group_wcid);
349 }
350 EXPORT_SYMBOL_GPL(mt76x02_remove_interface);
351 
mt76x02_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_ampdu_params * params)352 int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
353 			 struct ieee80211_ampdu_params *params)
354 {
355 	enum ieee80211_ampdu_mlme_action action = params->action;
356 	struct ieee80211_sta *sta = params->sta;
357 	struct mt76x02_dev *dev = hw->priv;
358 	struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
359 	struct ieee80211_txq *txq = sta->txq[params->tid];
360 	u16 tid = params->tid;
361 	u16 ssn = params->ssn;
362 	struct mt76_txq *mtxq;
363 	int ret = 0;
364 
365 	if (!txq)
366 		return -EINVAL;
367 
368 	mtxq = (struct mt76_txq *)txq->drv_priv;
369 
370 	mutex_lock(&dev->mt76.mutex);
371 	switch (action) {
372 	case IEEE80211_AMPDU_RX_START:
373 		mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid,
374 				   ssn, params->buf_size);
375 		mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
376 		break;
377 	case IEEE80211_AMPDU_RX_STOP:
378 		mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
379 		mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
380 			   BIT(16 + tid));
381 		break;
382 	case IEEE80211_AMPDU_TX_OPERATIONAL:
383 		mtxq->aggr = true;
384 		mtxq->send_bar = false;
385 		ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn);
386 		break;
387 	case IEEE80211_AMPDU_TX_STOP_FLUSH:
388 	case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
389 		mtxq->aggr = false;
390 		break;
391 	case IEEE80211_AMPDU_TX_START:
392 		mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
393 		ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
394 		break;
395 	case IEEE80211_AMPDU_TX_STOP_CONT:
396 		mtxq->aggr = false;
397 		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
398 		break;
399 	}
400 	mutex_unlock(&dev->mt76.mutex);
401 
402 	return ret;
403 }
404 EXPORT_SYMBOL_GPL(mt76x02_ampdu_action);
405 
mt76x02_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)406 int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
407 		    struct ieee80211_vif *vif, struct ieee80211_sta *sta,
408 		    struct ieee80211_key_conf *key)
409 {
410 	struct mt76x02_dev *dev = hw->priv;
411 	struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
412 	struct mt76x02_sta *msta;
413 	struct mt76_wcid *wcid;
414 	int idx = key->keyidx;
415 	int ret;
416 
417 	/* fall back to sw encryption for unsupported ciphers */
418 	switch (key->cipher) {
419 	case WLAN_CIPHER_SUITE_WEP40:
420 	case WLAN_CIPHER_SUITE_WEP104:
421 	case WLAN_CIPHER_SUITE_TKIP:
422 	case WLAN_CIPHER_SUITE_CCMP:
423 		break;
424 	default:
425 		return -EOPNOTSUPP;
426 	}
427 
428 	/*
429 	 * The hardware does not support per-STA RX GTK, fall back
430 	 * to software mode for these.
431 	 */
432 	if ((vif->type == NL80211_IFTYPE_ADHOC ||
433 	     vif->type == NL80211_IFTYPE_MESH_POINT) &&
434 	    (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
435 	     key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
436 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
437 		return -EOPNOTSUPP;
438 
439 	/*
440 	 * In USB AP mode, broadcast/multicast frames are setup in beacon
441 	 * data registers and sent via HW beacons engine, they require to
442 	 * be already encrypted.
443 	 */
444 	if (mt76_is_usb(&dev->mt76) &&
445 	    vif->type == NL80211_IFTYPE_AP &&
446 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
447 		return -EOPNOTSUPP;
448 
449 	/* MT76x0 GTK offloading does not work with more than one VIF */
450 	if (is_mt76x0(dev) && !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
451 		return -EOPNOTSUPP;
452 
453 	msta = sta ? (struct mt76x02_sta *)sta->drv_priv : NULL;
454 	wcid = msta ? &msta->wcid : &mvif->group_wcid;
455 
456 	if (cmd != SET_KEY) {
457 		if (idx == wcid->hw_key_idx) {
458 			wcid->hw_key_idx = -1;
459 			wcid->sw_iv = false;
460 		}
461 
462 		return 0;
463 	}
464 
465 	key->hw_key_idx = wcid->idx;
466 	wcid->hw_key_idx = idx;
467 	if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) {
468 		key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
469 		wcid->sw_iv = true;
470 	}
471 	mt76_wcid_key_setup(&dev->mt76, wcid, key);
472 
473 	if (!msta) {
474 		if (key || wcid->hw_key_idx == idx) {
475 			ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key);
476 			if (ret)
477 				return ret;
478 		}
479 
480 		return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key);
481 	}
482 
483 	return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key);
484 }
485 EXPORT_SYMBOL_GPL(mt76x02_set_key);
486 
mt76x02_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,u16 queue,const struct ieee80211_tx_queue_params * params)487 int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
488 		    unsigned int link_id, u16 queue,
489 		    const struct ieee80211_tx_queue_params *params)
490 {
491 	struct mt76x02_dev *dev = hw->priv;
492 	u8 cw_min = 5, cw_max = 10, qid;
493 	u32 val;
494 
495 	qid = dev->mphy.q_tx[queue]->hw_idx;
496 
497 	if (params->cw_min)
498 		cw_min = fls(params->cw_min);
499 	if (params->cw_max)
500 		cw_max = fls(params->cw_max);
501 
502 	val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |
503 	      FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
504 	      FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
505 	      FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
506 	mt76_wr(dev, MT_EDCA_CFG_AC(qid), val);
507 
508 	val = mt76_rr(dev, MT_WMM_TXOP(qid));
509 	val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid));
510 	val |= params->txop << MT_WMM_TXOP_SHIFT(qid);
511 	mt76_wr(dev, MT_WMM_TXOP(qid), val);
512 
513 	val = mt76_rr(dev, MT_WMM_AIFSN);
514 	val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid));
515 	val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid);
516 	mt76_wr(dev, MT_WMM_AIFSN, val);
517 
518 	val = mt76_rr(dev, MT_WMM_CWMIN);
519 	val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid));
520 	val |= cw_min << MT_WMM_CWMIN_SHIFT(qid);
521 	mt76_wr(dev, MT_WMM_CWMIN, val);
522 
523 	val = mt76_rr(dev, MT_WMM_CWMAX);
524 	val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid));
525 	val |= cw_max << MT_WMM_CWMAX_SHIFT(qid);
526 	mt76_wr(dev, MT_WMM_CWMAX, val);
527 
528 	return 0;
529 }
530 EXPORT_SYMBOL_GPL(mt76x02_conf_tx);
531 
mt76x02_set_tx_ackto(struct mt76x02_dev * dev)532 void mt76x02_set_tx_ackto(struct mt76x02_dev *dev)
533 {
534 	u8 ackto, sifs, slottime = dev->slottime;
535 
536 	/* As defined by IEEE 802.11-2007 17.3.8.6 */
537 	slottime += 3 * dev->coverage_class;
538 	mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG,
539 		       MT_BKOFF_SLOT_CFG_SLOTTIME, slottime);
540 
541 	sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG,
542 			      MT_XIFS_TIME_CFG_OFDM_SIFS);
543 
544 	ackto = slottime + sifs;
545 	mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG,
546 		       MT_TX_TIMEOUT_CFG_ACKTO, ackto);
547 }
548 EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto);
549 
mt76x02_set_coverage_class(struct ieee80211_hw * hw,s16 coverage_class)550 void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
551 				s16 coverage_class)
552 {
553 	struct mt76x02_dev *dev = hw->priv;
554 
555 	mutex_lock(&dev->mt76.mutex);
556 	dev->coverage_class = max_t(s16, coverage_class, 0);
557 	mt76x02_set_tx_ackto(dev);
558 	mutex_unlock(&dev->mt76.mutex);
559 }
560 EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class);
561 
mt76x02_set_rts_threshold(struct ieee80211_hw * hw,u32 val)562 int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
563 {
564 	struct mt76x02_dev *dev = hw->priv;
565 
566 	if (val != ~0 && val > 0xffff)
567 		return -EINVAL;
568 
569 	mutex_lock(&dev->mt76.mutex);
570 	mt76x02_mac_set_rts_thresh(dev, val);
571 	mutex_unlock(&dev->mt76.mutex);
572 
573 	return 0;
574 }
575 EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold);
576 
mt76x02_sta_rate_tbl_update(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)577 void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
578 				 struct ieee80211_vif *vif,
579 				 struct ieee80211_sta *sta)
580 {
581 	struct mt76x02_dev *dev = hw->priv;
582 	struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
583 	struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates);
584 	struct ieee80211_tx_rate rate = {};
585 
586 	if (!rates)
587 		return;
588 
589 	rate.idx = rates->rate[0].idx;
590 	rate.flags = rates->rate[0].flags;
591 	mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
592 }
593 EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
594 
mt76x02_remove_hdr_pad(struct sk_buff * skb,int len)595 void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
596 {
597 	int hdrlen;
598 
599 	if (!len)
600 		return;
601 
602 	hdrlen = ieee80211_get_hdrlen_from_skb(skb);
603 	memmove(skb->data + len, skb->data, hdrlen);
604 	skb_pull(skb, len);
605 }
606 EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
607 
mt76x02_sw_scan_complete(struct ieee80211_hw * hw,struct ieee80211_vif * vif)608 void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
609 			      struct ieee80211_vif *vif)
610 {
611 	struct mt76x02_dev *dev = hw->priv;
612 
613 	clear_bit(MT76_SCANNING, &dev->mphy.state);
614 	if (dev->cal.gain_init_done) {
615 		/* Restore AGC gain and resume calibration after scanning. */
616 		dev->cal.low_gain = -1;
617 		ieee80211_queue_delayed_work(hw, &dev->cal_work, 0);
618 	}
619 }
620 EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete);
621 
mt76x02_sta_ps(struct mt76_dev * mdev,struct ieee80211_sta * sta,bool ps)622 void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta,
623 		    bool ps)
624 {
625 	struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
626 	struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
627 	int idx = msta->wcid.idx;
628 
629 	mt76_stop_tx_queues(&dev->mphy, sta, true);
630 	if (mt76_is_mmio(mdev))
631 		mt76x02_mac_wcid_set_drop(dev, idx, ps);
632 }
633 EXPORT_SYMBOL_GPL(mt76x02_sta_ps);
634 
mt76x02_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * info,u64 changed)635 void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
636 			      struct ieee80211_vif *vif,
637 			      struct ieee80211_bss_conf *info,
638 			      u64 changed)
639 {
640 	struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
641 	struct mt76x02_dev *dev = hw->priv;
642 
643 	mutex_lock(&dev->mt76.mutex);
644 
645 	if (changed & BSS_CHANGED_BSSID)
646 		mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid);
647 
648 	if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT)
649 		mt76x02_mac_set_tx_protection(dev, info->use_cts_prot,
650 					      info->ht_operation_mode);
651 
652 	if (changed & BSS_CHANGED_BEACON_INT) {
653 		mt76_rmw_field(dev, MT_BEACON_TIME_CFG,
654 			       MT_BEACON_TIME_CFG_INTVAL,
655 			       info->beacon_int << 4);
656 		dev->mt76.beacon_int = info->beacon_int;
657 	}
658 
659 	if (changed & BSS_CHANGED_BEACON_ENABLED)
660 		mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon);
661 
662 	if (changed & BSS_CHANGED_ERP_PREAMBLE)
663 		mt76x02_mac_set_short_preamble(dev, info->use_short_preamble);
664 
665 	if (changed & BSS_CHANGED_ERP_SLOT) {
666 		int slottime = info->use_short_slot ? 9 : 20;
667 
668 		dev->slottime = slottime;
669 		mt76x02_set_tx_ackto(dev);
670 	}
671 
672 	mutex_unlock(&dev->mt76.mutex);
673 }
674 EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed);
675 
mt76x02_config_mac_addr_list(struct mt76x02_dev * dev)676 void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev)
677 {
678 	struct ieee80211_hw *hw = mt76_hw(dev);
679 	struct wiphy *wiphy = hw->wiphy;
680 	int i;
681 
682 	for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
683 		u8 *addr = dev->macaddr_list[i].addr;
684 
685 		memcpy(addr, dev->mphy.macaddr, ETH_ALEN);
686 
687 		if (!i)
688 			continue;
689 
690 		addr[0] |= BIT(1);
691 		addr[0] ^= ((i - 1) << 2);
692 	}
693 	wiphy->addresses = dev->macaddr_list;
694 	wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list);
695 }
696 EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
697 
698 MODULE_DESCRIPTION("MediaTek MT76x02 helpers");
699 MODULE_LICENSE("Dual BSD/GPL");
700