xref: /freebsd/sys/cddl/contrib/opensolaris/uts/intel/dtrace/fasttrap_isa.c (revision 8d20be1e22095c27faf8fe8b2f0d089739cc742e)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  *
21  * Portions Copyright 2010 The FreeBSD Foundation
22  *
23  * $FreeBSD$
24  */
25 
26 /*
27  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
28  * Use is subject to license terms.
29  */
30 
31 #if defined(sun)
32 #pragma ident	"%Z%%M%	%I%	%E% SMI"
33 #endif
34 
35 #include <sys/fasttrap_isa.h>
36 #include <sys/fasttrap_impl.h>
37 #include <sys/dtrace.h>
38 #include <sys/dtrace_impl.h>
39 #include <sys/cmn_err.h>
40 #if defined(sun)
41 #include <sys/regset.h>
42 #include <sys/privregs.h>
43 #include <sys/segments.h>
44 #include <sys/x86_archext.h>
45 #else
46 #include <cddl/dev/dtrace/dtrace_cddl.h>
47 #include <sys/types.h>
48 #include <sys/proc.h>
49 #include <sys/dtrace_bsd.h>
50 #include <cddl/dev/dtrace/i386/regset.h>
51 #include <machine/segments.h>
52 #include <machine/reg.h>
53 #include <machine/pcb.h>
54 #endif
55 #include <sys/sysmacros.h>
56 #if defined(sun)
57 #include <sys/trap.h>
58 #include <sys/archsystm.h>
59 #else
60 #include <sys/ptrace.h>
61 
62 static int
63 proc_ops(int op, proc_t *p, void *kaddr, off_t uaddr, size_t len)
64 {
65 	struct iovec iov;
66 	struct uio uio;
67 
68 	iov.iov_base = kaddr;
69 	iov.iov_len = len;
70 	uio.uio_offset = uaddr;
71 	uio.uio_iov = &iov;
72 	uio.uio_resid = len;
73 	uio.uio_iovcnt = 1;
74 	uio.uio_segflg = UIO_SYSSPACE;
75 	uio.uio_td = curthread;
76 	uio.uio_rw = op;
77 	PHOLD(p);
78 	if (proc_rwmem(p, &uio) < 0) {
79 		PRELE(p);
80 		return (-1);
81 	}
82 	PRELE(p);
83 
84 	return (0);
85 }
86 
87 static int
88 uread(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
89 {
90 
91 	return (proc_ops(UIO_READ, p, kaddr, uaddr, len));
92 }
93 
94 static int
95 uwrite(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
96 {
97 
98 	return (proc_ops(UIO_WRITE, p, kaddr, uaddr, len));
99 }
100 #endif /* sun */
101 #ifdef __i386__
102 #define	r_rax	r_eax
103 #define	r_rbx	r_ebx
104 #define	r_rip	r_eip
105 #define	r_rflags r_eflags
106 #define	r_rsp	r_esp
107 #define	r_rbp	r_ebp
108 #endif
109 
110 /*
111  * Lossless User-Land Tracing on x86
112  * ---------------------------------
113  *
114  * The execution of most instructions is not dependent on the address; for
115  * these instructions it is sufficient to copy them into the user process's
116  * address space and execute them. To effectively single-step an instruction
117  * in user-land, we copy out the following sequence of instructions to scratch
118  * space in the user thread's ulwp_t structure.
119  *
120  * We then set the program counter (%eip or %rip) to point to this scratch
121  * space. Once execution resumes, the original instruction is executed and
122  * then control flow is redirected to what was originally the subsequent
123  * instruction. If the kernel attemps to deliver a signal while single-
124  * stepping, the signal is deferred and the program counter is moved into the
125  * second sequence of instructions. The second sequence ends in a trap into
126  * the kernel where the deferred signal is then properly handled and delivered.
127  *
128  * For instructions whose execute is position dependent, we perform simple
129  * emulation. These instructions are limited to control transfer
130  * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
131  * of %rip-relative addressing that means that almost any instruction can be
132  * position dependent. For all the details on how we emulate generic
133  * instructions included %rip-relative instructions, see the code in
134  * fasttrap_pid_probe() below where we handle instructions of type
135  * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
136  */
137 
138 #define	FASTTRAP_MODRM_MOD(modrm)	(((modrm) >> 6) & 0x3)
139 #define	FASTTRAP_MODRM_REG(modrm)	(((modrm) >> 3) & 0x7)
140 #define	FASTTRAP_MODRM_RM(modrm)	((modrm) & 0x7)
141 #define	FASTTRAP_MODRM(mod, reg, rm)	(((mod) << 6) | ((reg) << 3) | (rm))
142 
143 #define	FASTTRAP_SIB_SCALE(sib)		(((sib) >> 6) & 0x3)
144 #define	FASTTRAP_SIB_INDEX(sib)		(((sib) >> 3) & 0x7)
145 #define	FASTTRAP_SIB_BASE(sib)		((sib) & 0x7)
146 
147 #define	FASTTRAP_REX_W(rex)		(((rex) >> 3) & 1)
148 #define	FASTTRAP_REX_R(rex)		(((rex) >> 2) & 1)
149 #define	FASTTRAP_REX_X(rex)		(((rex) >> 1) & 1)
150 #define	FASTTRAP_REX_B(rex)		((rex) & 1)
151 #define	FASTTRAP_REX(w, r, x, b)	\
152 	(0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
153 
154 /*
155  * Single-byte op-codes.
156  */
157 #define	FASTTRAP_PUSHL_EBP	0x55
158 
159 #define	FASTTRAP_JO		0x70
160 #define	FASTTRAP_JNO		0x71
161 #define	FASTTRAP_JB		0x72
162 #define	FASTTRAP_JAE		0x73
163 #define	FASTTRAP_JE		0x74
164 #define	FASTTRAP_JNE		0x75
165 #define	FASTTRAP_JBE		0x76
166 #define	FASTTRAP_JA		0x77
167 #define	FASTTRAP_JS		0x78
168 #define	FASTTRAP_JNS		0x79
169 #define	FASTTRAP_JP		0x7a
170 #define	FASTTRAP_JNP		0x7b
171 #define	FASTTRAP_JL		0x7c
172 #define	FASTTRAP_JGE		0x7d
173 #define	FASTTRAP_JLE		0x7e
174 #define	FASTTRAP_JG		0x7f
175 
176 #define	FASTTRAP_NOP		0x90
177 
178 #define	FASTTRAP_MOV_EAX	0xb8
179 #define	FASTTRAP_MOV_ECX	0xb9
180 
181 #define	FASTTRAP_RET16		0xc2
182 #define	FASTTRAP_RET		0xc3
183 
184 #define	FASTTRAP_LOOPNZ		0xe0
185 #define	FASTTRAP_LOOPZ		0xe1
186 #define	FASTTRAP_LOOP		0xe2
187 #define	FASTTRAP_JCXZ		0xe3
188 
189 #define	FASTTRAP_CALL		0xe8
190 #define	FASTTRAP_JMP32		0xe9
191 #define	FASTTRAP_JMP8		0xeb
192 
193 #define	FASTTRAP_INT3		0xcc
194 #define	FASTTRAP_INT		0xcd
195 
196 #define	FASTTRAP_2_BYTE_OP	0x0f
197 #define	FASTTRAP_GROUP5_OP	0xff
198 
199 /*
200  * Two-byte op-codes (second byte only).
201  */
202 #define	FASTTRAP_0F_JO		0x80
203 #define	FASTTRAP_0F_JNO		0x81
204 #define	FASTTRAP_0F_JB		0x82
205 #define	FASTTRAP_0F_JAE		0x83
206 #define	FASTTRAP_0F_JE		0x84
207 #define	FASTTRAP_0F_JNE		0x85
208 #define	FASTTRAP_0F_JBE		0x86
209 #define	FASTTRAP_0F_JA		0x87
210 #define	FASTTRAP_0F_JS		0x88
211 #define	FASTTRAP_0F_JNS		0x89
212 #define	FASTTRAP_0F_JP		0x8a
213 #define	FASTTRAP_0F_JNP		0x8b
214 #define	FASTTRAP_0F_JL		0x8c
215 #define	FASTTRAP_0F_JGE		0x8d
216 #define	FASTTRAP_0F_JLE		0x8e
217 #define	FASTTRAP_0F_JG		0x8f
218 
219 #define	FASTTRAP_EFLAGS_OF	0x800
220 #define	FASTTRAP_EFLAGS_DF	0x400
221 #define	FASTTRAP_EFLAGS_SF	0x080
222 #define	FASTTRAP_EFLAGS_ZF	0x040
223 #define	FASTTRAP_EFLAGS_AF	0x010
224 #define	FASTTRAP_EFLAGS_PF	0x004
225 #define	FASTTRAP_EFLAGS_CF	0x001
226 
227 /*
228  * Instruction prefixes.
229  */
230 #define	FASTTRAP_PREFIX_OPERAND	0x66
231 #define	FASTTRAP_PREFIX_ADDRESS	0x67
232 #define	FASTTRAP_PREFIX_CS	0x2E
233 #define	FASTTRAP_PREFIX_DS	0x3E
234 #define	FASTTRAP_PREFIX_ES	0x26
235 #define	FASTTRAP_PREFIX_FS	0x64
236 #define	FASTTRAP_PREFIX_GS	0x65
237 #define	FASTTRAP_PREFIX_SS	0x36
238 #define	FASTTRAP_PREFIX_LOCK	0xF0
239 #define	FASTTRAP_PREFIX_REP	0xF3
240 #define	FASTTRAP_PREFIX_REPNE	0xF2
241 
242 #define	FASTTRAP_NOREG	0xff
243 
244 /*
245  * Map between instruction register encodings and the kernel constants which
246  * correspond to indicies into struct regs.
247  */
248 #ifdef __amd64
249 static const uint8_t regmap[16] = {
250 	REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
251 	REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
252 };
253 #else
254 static const uint8_t regmap[8] = {
255 	EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI
256 };
257 #endif
258 
259 static ulong_t fasttrap_getreg(struct reg *, uint_t);
260 
261 static uint64_t
262 fasttrap_anarg(struct reg *rp, int function_entry, int argno)
263 {
264 	uint64_t value = 0;
265 	int shift = function_entry ? 1 : 0;
266 
267 #ifdef __amd64
268 	if (curproc->p_model == DATAMODEL_LP64) {
269 		uintptr_t *stack;
270 
271 		/*
272 		 * In 64-bit mode, the first six arguments are stored in
273 		 * registers.
274 		 */
275 		if (argno < 6)
276 			switch (argno) {
277 			case 0:
278 				return (rp->r_rdi);
279 			case 1:
280 				return (rp->r_rsi);
281 			case 2:
282 				return (rp->r_rdx);
283 			case 3:
284 				return (rp->r_rcx);
285 			case 4:
286 				return (rp->r_r8);
287 			case 5:
288 				return (rp->r_r9);
289 			}
290 
291 		stack = (uintptr_t *)rp->r_rsp;
292 		DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
293 		value = dtrace_fulword(&stack[argno - 6 + shift]);
294 		DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
295 	} else {
296 #endif
297 #ifdef __i386
298 		uint32_t *stack = (uint32_t *)rp->r_esp;
299 		DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
300 		value = dtrace_fuword32(&stack[argno + shift]);
301 		DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
302 #endif
303 #ifdef __amd64
304 	}
305 #endif
306 
307 	return (value);
308 }
309 
310 /*ARGSUSED*/
311 int
312 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc,
313     fasttrap_probe_type_t type)
314 {
315 	uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
316 	size_t len = FASTTRAP_MAX_INSTR_SIZE;
317 	size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET));
318 	uint_t start = 0;
319 	int rmindex, size;
320 	uint8_t seg, rex = 0;
321 
322 	/*
323 	 * Read the instruction at the given address out of the process's
324 	 * address space. We don't have to worry about a debugger
325 	 * changing this instruction before we overwrite it with our trap
326 	 * instruction since P_PR_LOCK is set. Since instructions can span
327 	 * pages, we potentially read the instruction in two parts. If the
328 	 * second part fails, we just zero out that part of the instruction.
329 	 */
330 	if (uread(p, &instr[0], first, pc) != 0)
331 		return (-1);
332 	if (len > first &&
333 	    uread(p, &instr[first], len - first, pc + first) != 0) {
334 		bzero(&instr[first], len - first);
335 		len = first;
336 	}
337 
338 	/*
339 	 * If the disassembly fails, then we have a malformed instruction.
340 	 */
341 	if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0)
342 		return (-1);
343 
344 	/*
345 	 * Make sure the disassembler isn't completely broken.
346 	 */
347 	ASSERT(-1 <= rmindex && rmindex < size);
348 
349 	/*
350 	 * If the computed size is greater than the number of bytes read,
351 	 * then it was a malformed instruction possibly because it fell on a
352 	 * page boundary and the subsequent page was missing or because of
353 	 * some malicious user.
354 	 */
355 	if (size > len)
356 		return (-1);
357 
358 	tp->ftt_size = (uint8_t)size;
359 	tp->ftt_segment = FASTTRAP_SEG_NONE;
360 
361 	/*
362 	 * Find the start of the instruction's opcode by processing any
363 	 * legacy prefixes.
364 	 */
365 	for (;;) {
366 		seg = 0;
367 		switch (instr[start]) {
368 		case FASTTRAP_PREFIX_SS:
369 			seg++;
370 			/*FALLTHRU*/
371 		case FASTTRAP_PREFIX_GS:
372 			seg++;
373 			/*FALLTHRU*/
374 		case FASTTRAP_PREFIX_FS:
375 			seg++;
376 			/*FALLTHRU*/
377 		case FASTTRAP_PREFIX_ES:
378 			seg++;
379 			/*FALLTHRU*/
380 		case FASTTRAP_PREFIX_DS:
381 			seg++;
382 			/*FALLTHRU*/
383 		case FASTTRAP_PREFIX_CS:
384 			seg++;
385 			/*FALLTHRU*/
386 		case FASTTRAP_PREFIX_OPERAND:
387 		case FASTTRAP_PREFIX_ADDRESS:
388 		case FASTTRAP_PREFIX_LOCK:
389 		case FASTTRAP_PREFIX_REP:
390 		case FASTTRAP_PREFIX_REPNE:
391 			if (seg != 0) {
392 				/*
393 				 * It's illegal for an instruction to specify
394 				 * two segment prefixes -- give up on this
395 				 * illegal instruction.
396 				 */
397 				if (tp->ftt_segment != FASTTRAP_SEG_NONE)
398 					return (-1);
399 
400 				tp->ftt_segment = seg;
401 			}
402 			start++;
403 			continue;
404 		}
405 		break;
406 	}
407 
408 #ifdef __amd64
409 	/*
410 	 * Identify the REX prefix on 64-bit processes.
411 	 */
412 	if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
413 		rex = instr[start++];
414 #endif
415 
416 	/*
417 	 * Now that we're pretty sure that the instruction is okay, copy the
418 	 * valid part to the tracepoint.
419 	 */
420 	bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
421 
422 	tp->ftt_type = FASTTRAP_T_COMMON;
423 	if (instr[start] == FASTTRAP_2_BYTE_OP) {
424 		switch (instr[start + 1]) {
425 		case FASTTRAP_0F_JO:
426 		case FASTTRAP_0F_JNO:
427 		case FASTTRAP_0F_JB:
428 		case FASTTRAP_0F_JAE:
429 		case FASTTRAP_0F_JE:
430 		case FASTTRAP_0F_JNE:
431 		case FASTTRAP_0F_JBE:
432 		case FASTTRAP_0F_JA:
433 		case FASTTRAP_0F_JS:
434 		case FASTTRAP_0F_JNS:
435 		case FASTTRAP_0F_JP:
436 		case FASTTRAP_0F_JNP:
437 		case FASTTRAP_0F_JL:
438 		case FASTTRAP_0F_JGE:
439 		case FASTTRAP_0F_JLE:
440 		case FASTTRAP_0F_JG:
441 			tp->ftt_type = FASTTRAP_T_JCC;
442 			tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
443 			tp->ftt_dest = pc + tp->ftt_size +
444 			    /* LINTED - alignment */
445 			    *(int32_t *)&instr[start + 2];
446 			break;
447 		}
448 	} else if (instr[start] == FASTTRAP_GROUP5_OP) {
449 		uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
450 		uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
451 		uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
452 
453 		if (reg == 2 || reg == 4) {
454 			uint_t i, sz;
455 
456 			if (reg == 2)
457 				tp->ftt_type = FASTTRAP_T_CALL;
458 			else
459 				tp->ftt_type = FASTTRAP_T_JMP;
460 
461 			if (mod == 3)
462 				tp->ftt_code = 2;
463 			else
464 				tp->ftt_code = 1;
465 
466 			ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
467 
468 			/*
469 			 * See AMD x86-64 Architecture Programmer's Manual
470 			 * Volume 3, Section 1.2.7, Table 1-12, and
471 			 * Appendix A.3.1, Table A-15.
472 			 */
473 			if (mod != 3 && rm == 4) {
474 				uint8_t sib = instr[start + 2];
475 				uint_t index = FASTTRAP_SIB_INDEX(sib);
476 				uint_t base = FASTTRAP_SIB_BASE(sib);
477 
478 				tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
479 
480 				tp->ftt_index = (index == 4) ?
481 				    FASTTRAP_NOREG :
482 				    regmap[index | (FASTTRAP_REX_X(rex) << 3)];
483 				tp->ftt_base = (mod == 0 && base == 5) ?
484 				    FASTTRAP_NOREG :
485 				    regmap[base | (FASTTRAP_REX_B(rex) << 3)];
486 
487 				i = 3;
488 				sz = mod == 1 ? 1 : 4;
489 			} else {
490 				/*
491 				 * In 64-bit mode, mod == 0 and r/m == 5
492 				 * denotes %rip-relative addressing; in 32-bit
493 				 * mode, the base register isn't used. In both
494 				 * modes, there is a 32-bit operand.
495 				 */
496 				if (mod == 0 && rm == 5) {
497 #ifdef __amd64
498 					if (p->p_model == DATAMODEL_LP64)
499 						tp->ftt_base = REG_RIP;
500 					else
501 #endif
502 						tp->ftt_base = FASTTRAP_NOREG;
503 					sz = 4;
504 				} else  {
505 					uint8_t base = rm |
506 					    (FASTTRAP_REX_B(rex) << 3);
507 
508 					tp->ftt_base = regmap[base];
509 					sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
510 				}
511 				tp->ftt_index = FASTTRAP_NOREG;
512 				i = 2;
513 			}
514 
515 			if (sz == 1) {
516 				tp->ftt_dest = *(int8_t *)&instr[start + i];
517 			} else if (sz == 4) {
518 				/* LINTED - alignment */
519 				tp->ftt_dest = *(int32_t *)&instr[start + i];
520 			} else {
521 				tp->ftt_dest = 0;
522 			}
523 		}
524 	} else {
525 		switch (instr[start]) {
526 		case FASTTRAP_RET:
527 			tp->ftt_type = FASTTRAP_T_RET;
528 			break;
529 
530 		case FASTTRAP_RET16:
531 			tp->ftt_type = FASTTRAP_T_RET16;
532 			/* LINTED - alignment */
533 			tp->ftt_dest = *(uint16_t *)&instr[start + 1];
534 			break;
535 
536 		case FASTTRAP_JO:
537 		case FASTTRAP_JNO:
538 		case FASTTRAP_JB:
539 		case FASTTRAP_JAE:
540 		case FASTTRAP_JE:
541 		case FASTTRAP_JNE:
542 		case FASTTRAP_JBE:
543 		case FASTTRAP_JA:
544 		case FASTTRAP_JS:
545 		case FASTTRAP_JNS:
546 		case FASTTRAP_JP:
547 		case FASTTRAP_JNP:
548 		case FASTTRAP_JL:
549 		case FASTTRAP_JGE:
550 		case FASTTRAP_JLE:
551 		case FASTTRAP_JG:
552 			tp->ftt_type = FASTTRAP_T_JCC;
553 			tp->ftt_code = instr[start];
554 			tp->ftt_dest = pc + tp->ftt_size +
555 			    (int8_t)instr[start + 1];
556 			break;
557 
558 		case FASTTRAP_LOOPNZ:
559 		case FASTTRAP_LOOPZ:
560 		case FASTTRAP_LOOP:
561 			tp->ftt_type = FASTTRAP_T_LOOP;
562 			tp->ftt_code = instr[start];
563 			tp->ftt_dest = pc + tp->ftt_size +
564 			    (int8_t)instr[start + 1];
565 			break;
566 
567 		case FASTTRAP_JCXZ:
568 			tp->ftt_type = FASTTRAP_T_JCXZ;
569 			tp->ftt_dest = pc + tp->ftt_size +
570 			    (int8_t)instr[start + 1];
571 			break;
572 
573 		case FASTTRAP_CALL:
574 			tp->ftt_type = FASTTRAP_T_CALL;
575 			tp->ftt_dest = pc + tp->ftt_size +
576 			    /* LINTED - alignment */
577 			    *(int32_t *)&instr[start + 1];
578 			tp->ftt_code = 0;
579 			break;
580 
581 		case FASTTRAP_JMP32:
582 			tp->ftt_type = FASTTRAP_T_JMP;
583 			tp->ftt_dest = pc + tp->ftt_size +
584 			    /* LINTED - alignment */
585 			    *(int32_t *)&instr[start + 1];
586 			break;
587 		case FASTTRAP_JMP8:
588 			tp->ftt_type = FASTTRAP_T_JMP;
589 			tp->ftt_dest = pc + tp->ftt_size +
590 			    (int8_t)instr[start + 1];
591 			break;
592 
593 		case FASTTRAP_PUSHL_EBP:
594 			if (start == 0)
595 				tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
596 			break;
597 
598 		case FASTTRAP_NOP:
599 #ifdef __amd64
600 			ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
601 
602 			/*
603 			 * On amd64 we have to be careful not to confuse a nop
604 			 * (actually xchgl %eax, %eax) with an instruction using
605 			 * the same opcode, but that does something different
606 			 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
607 			 */
608 			if (FASTTRAP_REX_B(rex) == 0)
609 #endif
610 				tp->ftt_type = FASTTRAP_T_NOP;
611 			break;
612 
613 		case FASTTRAP_INT3:
614 			/*
615 			 * The pid provider shares the int3 trap with debugger
616 			 * breakpoints so we can't instrument them.
617 			 */
618 			ASSERT(instr[start] == FASTTRAP_INSTR);
619 			return (-1);
620 
621 		case FASTTRAP_INT:
622 			/*
623 			 * Interrupts seem like they could be traced with
624 			 * no negative implications, but it's possible that
625 			 * a thread could be redirected by the trap handling
626 			 * code which would eventually return to the
627 			 * instruction after the interrupt. If the interrupt
628 			 * were in our scratch space, the subsequent
629 			 * instruction might be overwritten before we return.
630 			 * Accordingly we refuse to instrument any interrupt.
631 			 */
632 			return (-1);
633 		}
634 	}
635 
636 #ifdef __amd64
637 	if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
638 		/*
639 		 * If the process is 64-bit and the instruction type is still
640 		 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
641 		 * execute it -- we need to watch for %rip-relative
642 		 * addressing mode. See the portion of fasttrap_pid_probe()
643 		 * below where we handle tracepoints with type
644 		 * FASTTRAP_T_COMMON for how we emulate instructions that
645 		 * employ %rip-relative addressing.
646 		 */
647 		if (rmindex != -1) {
648 			uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
649 			uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
650 			uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
651 
652 			ASSERT(rmindex > start);
653 
654 			if (mod == 0 && rm == 5) {
655 				/*
656 				 * We need to be sure to avoid other
657 				 * registers used by this instruction. While
658 				 * the reg field may determine the op code
659 				 * rather than denoting a register, assuming
660 				 * that it denotes a register is always safe.
661 				 * We leave the REX field intact and use
662 				 * whatever value's there for simplicity.
663 				 */
664 				if (reg != 0) {
665 					tp->ftt_ripmode = FASTTRAP_RIP_1 |
666 					    (FASTTRAP_RIP_X *
667 					    FASTTRAP_REX_B(rex));
668 					rm = 0;
669 				} else {
670 					tp->ftt_ripmode = FASTTRAP_RIP_2 |
671 					    (FASTTRAP_RIP_X *
672 					    FASTTRAP_REX_B(rex));
673 					rm = 1;
674 				}
675 
676 				tp->ftt_modrm = tp->ftt_instr[rmindex];
677 				tp->ftt_instr[rmindex] =
678 				    FASTTRAP_MODRM(2, reg, rm);
679 			}
680 		}
681 	}
682 #endif
683 
684 	return (0);
685 }
686 
687 int
688 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
689 {
690 	fasttrap_instr_t instr = FASTTRAP_INSTR;
691 
692 	if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
693 		return (-1);
694 
695 	return (0);
696 }
697 
698 int
699 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
700 {
701 	uint8_t instr;
702 
703 	/*
704 	 * Distinguish between read or write failures and a changed
705 	 * instruction.
706 	 */
707 	if (uread(p, &instr, 1, tp->ftt_pc) != 0)
708 		return (0);
709 	if (instr != FASTTRAP_INSTR)
710 		return (0);
711 	if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
712 		return (-1);
713 
714 	return (0);
715 }
716 
717 #ifdef __amd64
718 static uintptr_t
719 fasttrap_fulword_noerr(const void *uaddr)
720 {
721 	uintptr_t ret;
722 
723 	if ((ret = fasttrap_fulword(uaddr)) != -1)
724 		return (ret);
725 
726 	return (0);
727 }
728 #endif
729 
730 #ifdef __i386__
731 static uint32_t
732 fasttrap_fuword32_noerr(const void *uaddr)
733 {
734 	uint32_t ret;
735 
736 	if ((ret = fasttrap_fuword32(uaddr)) != -1)
737 		return (ret);
738 
739 	return (0);
740 }
741 #endif
742 
743 static void
744 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid,
745     uintptr_t new_pc)
746 {
747 	fasttrap_tracepoint_t *tp;
748 	fasttrap_bucket_t *bucket;
749 	fasttrap_id_t *id;
750 #if defined(sun)
751 	kmutex_t *pid_mtx;
752 #endif
753 
754 #if defined(sun)
755 	pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
756 	mutex_enter(pid_mtx);
757 #endif
758 	bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
759 
760 	for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
761 		if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
762 		    tp->ftt_proc->ftpc_acount != 0)
763 			break;
764 	}
765 
766 	/*
767 	 * Don't sweat it if we can't find the tracepoint again; unlike
768 	 * when we're in fasttrap_pid_probe(), finding the tracepoint here
769 	 * is not essential to the correct execution of the process.
770 	 */
771 	if (tp == NULL) {
772 #if defined(sun)
773 		mutex_exit(pid_mtx);
774 #endif
775 		return;
776 	}
777 
778 	for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
779 		/*
780 		 * If there's a branch that could act as a return site, we
781 		 * need to trace it, and check here if the program counter is
782 		 * external to the function.
783 		 */
784 		if (tp->ftt_type != FASTTRAP_T_RET &&
785 		    tp->ftt_type != FASTTRAP_T_RET16 &&
786 		    new_pc - id->fti_probe->ftp_faddr <
787 		    id->fti_probe->ftp_fsize)
788 			continue;
789 
790 		dtrace_probe(id->fti_probe->ftp_id,
791 		    pc - id->fti_probe->ftp_faddr,
792 		    rp->r_rax, rp->r_rbx, 0, 0);
793 	}
794 
795 #if defined(sun)
796 	mutex_exit(pid_mtx);
797 #endif
798 }
799 
800 static void
801 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr)
802 {
803 #if defined(sun)
804 	sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP);
805 
806 	sqp->sq_info.si_signo = SIGSEGV;
807 	sqp->sq_info.si_code = SEGV_MAPERR;
808 	sqp->sq_info.si_addr = (caddr_t)addr;
809 
810 	mutex_enter(&p->p_lock);
811 	sigaddqa(p, t, sqp);
812 	mutex_exit(&p->p_lock);
813 
814 	if (t != NULL)
815 		aston(t);
816 #else
817 	ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP);
818 
819 	ksiginfo_init(ksi);
820 	ksi->ksi_signo = SIGSEGV;
821 	ksi->ksi_code = SEGV_MAPERR;
822 	ksi->ksi_addr = (caddr_t)addr;
823 	(void) tdksignal(t, SIGSEGV, ksi);
824 #endif
825 }
826 
827 #ifdef __amd64
828 static void
829 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc,
830     uintptr_t *argv)
831 {
832 	int i, x, cap = MIN(argc, probe->ftp_nargs);
833 	uintptr_t *stack = (uintptr_t *)rp->r_rsp;
834 
835 	for (i = 0; i < cap; i++) {
836 		x = probe->ftp_argmap[i];
837 
838 		if (x < 6)
839 			argv[i] = (&rp->r_rdi)[x];
840 		else
841 			argv[i] = fasttrap_fulword_noerr(&stack[x]);
842 	}
843 
844 	for (; i < argc; i++) {
845 		argv[i] = 0;
846 	}
847 }
848 #endif
849 
850 #ifdef __i386__
851 static void
852 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc,
853     uint32_t *argv)
854 {
855 	int i, x, cap = MIN(argc, probe->ftp_nargs);
856 	uint32_t *stack = (uint32_t *)rp->r_rsp;
857 
858 	for (i = 0; i < cap; i++) {
859 		x = probe->ftp_argmap[i];
860 
861 		argv[i] = fasttrap_fuword32_noerr(&stack[x]);
862 	}
863 
864 	for (; i < argc; i++) {
865 		argv[i] = 0;
866 	}
867 }
868 #endif
869 
870 static int
871 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr)
872 {
873 	proc_t *p = curproc;
874 #ifdef __i386__
875 	struct segment_descriptor *desc;
876 #else
877 	struct user_segment_descriptor *desc;
878 #endif
879 	uint16_t sel = 0, ndx, type;
880 	uintptr_t limit;
881 
882 	switch (tp->ftt_segment) {
883 	case FASTTRAP_SEG_CS:
884 		sel = rp->r_cs;
885 		break;
886 	case FASTTRAP_SEG_DS:
887 		sel = rp->r_ds;
888 		break;
889 	case FASTTRAP_SEG_ES:
890 		sel = rp->r_es;
891 		break;
892 	case FASTTRAP_SEG_FS:
893 		sel = rp->r_fs;
894 		break;
895 	case FASTTRAP_SEG_GS:
896 		sel = rp->r_gs;
897 		break;
898 	case FASTTRAP_SEG_SS:
899 		sel = rp->r_ss;
900 		break;
901 	}
902 
903 	/*
904 	 * Make sure the given segment register specifies a user priority
905 	 * selector rather than a kernel selector.
906 	 */
907 	if (ISPL(sel) != SEL_UPL)
908 		return (-1);
909 
910 	ndx = IDXSEL(sel);
911 
912 	/*
913 	 * Check the bounds and grab the descriptor out of the specified
914 	 * descriptor table.
915 	 */
916 	if (ISLDT(sel)) {
917 #ifdef __i386__
918 		if (ndx > p->p_md.md_ldt->ldt_len)
919 			return (-1);
920 
921 		desc = (struct segment_descriptor *)
922 		    p->p_md.md_ldt[ndx].ldt_base;
923 #else
924 		if (ndx > max_ldt_segment)
925 			return (-1);
926 
927 		desc = (struct user_segment_descriptor *)
928 		    p->p_md.md_ldt[ndx].ldt_base;
929 #endif
930 
931 	} else {
932 		if (ndx >= NGDT)
933 			return (-1);
934 
935 #ifdef __i386__
936 		desc = &gdt[ndx].sd;
937 #else
938 		desc = &gdt[ndx];
939 #endif
940 	}
941 
942 	/*
943 	 * The descriptor must have user privilege level and it must be
944 	 * present in memory.
945 	 */
946 	if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1)
947 		return (-1);
948 
949 	type = desc->sd_type;
950 
951 	/*
952 	 * If the S bit in the type field is not set, this descriptor can
953 	 * only be used in system context.
954 	 */
955 	if ((type & 0x10) != 0x10)
956 		return (-1);
957 
958 	limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1);
959 
960 	if (tp->ftt_segment == FASTTRAP_SEG_CS) {
961 		/*
962 		 * The code/data bit and readable bit must both be set.
963 		 */
964 		if ((type & 0xa) != 0xa)
965 			return (-1);
966 
967 		if (*addr > limit)
968 			return (-1);
969 	} else {
970 		/*
971 		 * The code/data bit must be clear.
972 		 */
973 		if ((type & 0x8) != 0)
974 			return (-1);
975 
976 		/*
977 		 * If the expand-down bit is clear, we just check the limit as
978 		 * it would naturally be applied. Otherwise, we need to check
979 		 * that the address is the range [limit + 1 .. 0xffff] or
980 		 * [limit + 1 ... 0xffffffff] depending on if the default
981 		 * operand size bit is set.
982 		 */
983 		if ((type & 0x4) == 0) {
984 			if (*addr > limit)
985 				return (-1);
986 		} else if (desc->sd_def32) {
987 			if (*addr < limit + 1 || 0xffff < *addr)
988 				return (-1);
989 		} else {
990 			if (*addr < limit + 1 || 0xffffffff < *addr)
991 				return (-1);
992 		}
993 	}
994 
995 	*addr += USD_GETBASE(desc);
996 
997 	return (0);
998 }
999 
1000 int
1001 fasttrap_pid_probe(struct reg *rp)
1002 {
1003 	proc_t *p = curproc;
1004 	uintptr_t pc = rp->r_rip - 1;
1005 	uintptr_t new_pc = 0;
1006 	fasttrap_bucket_t *bucket;
1007 #if defined(sun)
1008 	kmutex_t *pid_mtx;
1009 #endif
1010 	fasttrap_tracepoint_t *tp, tp_local;
1011 	pid_t pid;
1012 	dtrace_icookie_t cookie;
1013 	uint_t is_enabled = 0;
1014 
1015 	/*
1016 	 * It's possible that a user (in a veritable orgy of bad planning)
1017 	 * could redirect this thread's flow of control before it reached the
1018 	 * return probe fasttrap. In this case we need to kill the process
1019 	 * since it's in a unrecoverable state.
1020 	 */
1021 	if (curthread->t_dtrace_step) {
1022 		ASSERT(curthread->t_dtrace_on);
1023 		fasttrap_sigtrap(p, curthread, pc);
1024 		return (0);
1025 	}
1026 
1027 	/*
1028 	 * Clear all user tracing flags.
1029 	 */
1030 	curthread->t_dtrace_ft = 0;
1031 	curthread->t_dtrace_pc = 0;
1032 	curthread->t_dtrace_npc = 0;
1033 	curthread->t_dtrace_scrpc = 0;
1034 	curthread->t_dtrace_astpc = 0;
1035 #ifdef __amd64
1036 	curthread->t_dtrace_regv = 0;
1037 #endif
1038 
1039 #if defined(sun)
1040 	/*
1041 	 * Treat a child created by a call to vfork(2) as if it were its
1042 	 * parent. We know that there's only one thread of control in such a
1043 	 * process: this one.
1044 	 */
1045 	while (p->p_flag & SVFORK) {
1046 		p = p->p_parent;
1047 	}
1048 #endif
1049 
1050 	PROC_LOCK(p);
1051 	_PHOLD(p);
1052 	pid = p->p_pid;
1053 #if defined(sun)
1054 	pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1055 	mutex_enter(pid_mtx);
1056 #endif
1057 	bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1058 
1059 	/*
1060 	 * Lookup the tracepoint that the process just hit.
1061 	 */
1062 	for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1063 		if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1064 		    tp->ftt_proc->ftpc_acount != 0)
1065 			break;
1066 	}
1067 
1068 	/*
1069 	 * If we couldn't find a matching tracepoint, either a tracepoint has
1070 	 * been inserted without using the pid<pid> ioctl interface (see
1071 	 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1072 	 */
1073 	if (tp == NULL) {
1074 #if defined(sun)
1075 		mutex_exit(pid_mtx);
1076 #endif
1077 		_PRELE(p);
1078 		PROC_UNLOCK(p);
1079 		return (-1);
1080 	}
1081 
1082 	/*
1083 	 * Set the program counter to the address of the traced instruction
1084 	 * so that it looks right in ustack() output.
1085 	 */
1086 	rp->r_rip = pc;
1087 
1088 	if (tp->ftt_ids != NULL) {
1089 		fasttrap_id_t *id;
1090 
1091 #ifdef __amd64
1092 		if (p->p_model == DATAMODEL_LP64) {
1093 			for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1094 				fasttrap_probe_t *probe = id->fti_probe;
1095 
1096 				if (id->fti_ptype == DTFTP_ENTRY) {
1097 					/*
1098 					 * We note that this was an entry
1099 					 * probe to help ustack() find the
1100 					 * first caller.
1101 					 */
1102 					cookie = dtrace_interrupt_disable();
1103 					DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1104 					dtrace_probe(probe->ftp_id, rp->r_rdi,
1105 					    rp->r_rsi, rp->r_rdx, rp->r_rcx,
1106 					    rp->r_r8);
1107 					DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1108 					dtrace_interrupt_enable(cookie);
1109 				} else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1110 					/*
1111 					 * Note that in this case, we don't
1112 					 * call dtrace_probe() since it's only
1113 					 * an artificial probe meant to change
1114 					 * the flow of control so that it
1115 					 * encounters the true probe.
1116 					 */
1117 					is_enabled = 1;
1118 				} else if (probe->ftp_argmap == NULL) {
1119 					dtrace_probe(probe->ftp_id, rp->r_rdi,
1120 					    rp->r_rsi, rp->r_rdx, rp->r_rcx,
1121 					    rp->r_r8);
1122 				} else {
1123 					uintptr_t t[5];
1124 
1125 					fasttrap_usdt_args64(probe, rp,
1126 					    sizeof (t) / sizeof (t[0]), t);
1127 
1128 					dtrace_probe(probe->ftp_id, t[0], t[1],
1129 					    t[2], t[3], t[4]);
1130 				}
1131 			}
1132 		} else {
1133 #else /* __amd64 */
1134 			uintptr_t s0, s1, s2, s3, s4, s5;
1135 			uint32_t *stack = (uint32_t *)rp->r_esp;
1136 
1137 			/*
1138 			 * In 32-bit mode, all arguments are passed on the
1139 			 * stack. If this is a function entry probe, we need
1140 			 * to skip the first entry on the stack as it
1141 			 * represents the return address rather than a
1142 			 * parameter to the function.
1143 			 */
1144 			s0 = fasttrap_fuword32_noerr(&stack[0]);
1145 			s1 = fasttrap_fuword32_noerr(&stack[1]);
1146 			s2 = fasttrap_fuword32_noerr(&stack[2]);
1147 			s3 = fasttrap_fuword32_noerr(&stack[3]);
1148 			s4 = fasttrap_fuword32_noerr(&stack[4]);
1149 			s5 = fasttrap_fuword32_noerr(&stack[5]);
1150 
1151 			for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1152 				fasttrap_probe_t *probe = id->fti_probe;
1153 
1154 				if (id->fti_ptype == DTFTP_ENTRY) {
1155 					/*
1156 					 * We note that this was an entry
1157 					 * probe to help ustack() find the
1158 					 * first caller.
1159 					 */
1160 					cookie = dtrace_interrupt_disable();
1161 					DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1162 					dtrace_probe(probe->ftp_id, s1, s2,
1163 					    s3, s4, s5);
1164 					DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1165 					dtrace_interrupt_enable(cookie);
1166 				} else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1167 					/*
1168 					 * Note that in this case, we don't
1169 					 * call dtrace_probe() since it's only
1170 					 * an artificial probe meant to change
1171 					 * the flow of control so that it
1172 					 * encounters the true probe.
1173 					 */
1174 					is_enabled = 1;
1175 				} else if (probe->ftp_argmap == NULL) {
1176 					dtrace_probe(probe->ftp_id, s0, s1,
1177 					    s2, s3, s4);
1178 				} else {
1179 					uint32_t t[5];
1180 
1181 					fasttrap_usdt_args32(probe, rp,
1182 					    sizeof (t) / sizeof (t[0]), t);
1183 
1184 					dtrace_probe(probe->ftp_id, t[0], t[1],
1185 					    t[2], t[3], t[4]);
1186 				}
1187 			}
1188 #endif /* __amd64 */
1189 #ifdef __amd64
1190 		}
1191 #endif
1192 	}
1193 
1194 	/*
1195 	 * We're about to do a bunch of work so we cache a local copy of
1196 	 * the tracepoint to emulate the instruction, and then find the
1197 	 * tracepoint again later if we need to light up any return probes.
1198 	 */
1199 	tp_local = *tp;
1200 	PROC_UNLOCK(p);
1201 #if defined(sun)
1202 	mutex_exit(pid_mtx);
1203 #endif
1204 	tp = &tp_local;
1205 
1206 	/*
1207 	 * Set the program counter to appear as though the traced instruction
1208 	 * had completely executed. This ensures that fasttrap_getreg() will
1209 	 * report the expected value for REG_RIP.
1210 	 */
1211 	rp->r_rip = pc + tp->ftt_size;
1212 
1213 	/*
1214 	 * If there's an is-enabled probe connected to this tracepoint it
1215 	 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1216 	 * instruction that was placed there by DTrace when the binary was
1217 	 * linked. As this probe is, in fact, enabled, we need to stuff 1
1218 	 * into %eax or %rax. Accordingly, we can bypass all the instruction
1219 	 * emulation logic since we know the inevitable result. It's possible
1220 	 * that a user could construct a scenario where the 'is-enabled'
1221 	 * probe was on some other instruction, but that would be a rather
1222 	 * exotic way to shoot oneself in the foot.
1223 	 */
1224 	if (is_enabled) {
1225 		rp->r_rax = 1;
1226 		new_pc = rp->r_rip;
1227 		goto done;
1228 	}
1229 
1230 	/*
1231 	 * We emulate certain types of instructions to ensure correctness
1232 	 * (in the case of position dependent instructions) or optimize
1233 	 * common cases. The rest we have the thread execute back in user-
1234 	 * land.
1235 	 */
1236 	switch (tp->ftt_type) {
1237 	case FASTTRAP_T_RET:
1238 	case FASTTRAP_T_RET16:
1239 	{
1240 		uintptr_t dst = 0;
1241 		uintptr_t addr = 0;
1242 		int ret = 0;
1243 
1244 		/*
1245 		 * We have to emulate _every_ facet of the behavior of a ret
1246 		 * instruction including what happens if the load from %esp
1247 		 * fails; in that case, we send a SIGSEGV.
1248 		 */
1249 #ifdef __amd64
1250 		if (p->p_model == DATAMODEL_NATIVE) {
1251 			ret = dst = fasttrap_fulword((void *)rp->r_rsp);
1252 			addr = rp->r_rsp + sizeof (uintptr_t);
1253 		} else {
1254 #endif
1255 #ifdef __i386__
1256 			uint32_t dst32;
1257 			ret = dst32 = fasttrap_fuword32((void *)rp->r_esp);
1258 			dst = dst32;
1259 			addr = rp->r_esp + sizeof (uint32_t);
1260 #endif
1261 #ifdef __amd64
1262 		}
1263 #endif
1264 
1265 		if (ret == -1) {
1266 			fasttrap_sigsegv(p, curthread, rp->r_rsp);
1267 			new_pc = pc;
1268 			break;
1269 		}
1270 
1271 		if (tp->ftt_type == FASTTRAP_T_RET16)
1272 			addr += tp->ftt_dest;
1273 
1274 		rp->r_rsp = addr;
1275 		new_pc = dst;
1276 		break;
1277 	}
1278 
1279 	case FASTTRAP_T_JCC:
1280 	{
1281 		uint_t taken = 0;
1282 
1283 		switch (tp->ftt_code) {
1284 		case FASTTRAP_JO:
1285 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0;
1286 			break;
1287 		case FASTTRAP_JNO:
1288 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0;
1289 			break;
1290 		case FASTTRAP_JB:
1291 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0;
1292 			break;
1293 		case FASTTRAP_JAE:
1294 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0;
1295 			break;
1296 		case FASTTRAP_JE:
1297 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1298 			break;
1299 		case FASTTRAP_JNE:
1300 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1301 			break;
1302 		case FASTTRAP_JBE:
1303 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1304 			    (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1305 			break;
1306 		case FASTTRAP_JA:
1307 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1308 			    (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1309 			break;
1310 		case FASTTRAP_JS:
1311 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0;
1312 			break;
1313 		case FASTTRAP_JNS:
1314 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0;
1315 			break;
1316 		case FASTTRAP_JP:
1317 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0;
1318 			break;
1319 		case FASTTRAP_JNP:
1320 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0;
1321 			break;
1322 		case FASTTRAP_JL:
1323 			taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1324 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1325 			break;
1326 		case FASTTRAP_JGE:
1327 			taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1328 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1329 			break;
1330 		case FASTTRAP_JLE:
1331 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1332 			    ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1333 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1334 			break;
1335 		case FASTTRAP_JG:
1336 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1337 			    ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1338 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1339 			break;
1340 
1341 		}
1342 
1343 		if (taken)
1344 			new_pc = tp->ftt_dest;
1345 		else
1346 			new_pc = pc + tp->ftt_size;
1347 		break;
1348 	}
1349 
1350 	case FASTTRAP_T_LOOP:
1351 	{
1352 		uint_t taken = 0;
1353 #ifdef __amd64
1354 		greg_t cx = rp->r_rcx--;
1355 #else
1356 		greg_t cx = rp->r_ecx--;
1357 #endif
1358 
1359 		switch (tp->ftt_code) {
1360 		case FASTTRAP_LOOPNZ:
1361 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1362 			    cx != 0;
1363 			break;
1364 		case FASTTRAP_LOOPZ:
1365 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1366 			    cx != 0;
1367 			break;
1368 		case FASTTRAP_LOOP:
1369 			taken = (cx != 0);
1370 			break;
1371 		}
1372 
1373 		if (taken)
1374 			new_pc = tp->ftt_dest;
1375 		else
1376 			new_pc = pc + tp->ftt_size;
1377 		break;
1378 	}
1379 
1380 	case FASTTRAP_T_JCXZ:
1381 	{
1382 #ifdef __amd64
1383 		greg_t cx = rp->r_rcx;
1384 #else
1385 		greg_t cx = rp->r_ecx;
1386 #endif
1387 
1388 		if (cx == 0)
1389 			new_pc = tp->ftt_dest;
1390 		else
1391 			new_pc = pc + tp->ftt_size;
1392 		break;
1393 	}
1394 
1395 	case FASTTRAP_T_PUSHL_EBP:
1396 	{
1397 		int ret = 0;
1398 
1399 #ifdef __amd64
1400 		if (p->p_model == DATAMODEL_NATIVE) {
1401 			rp->r_rsp -= sizeof (uintptr_t);
1402 			ret = fasttrap_sulword(&rp->r_rbp, (void *)rp->r_rsp);
1403 		} else {
1404 #endif
1405 #ifdef __i386__
1406 			rp->r_rsp -= sizeof (uint32_t);
1407 			ret = fasttrap_suword32(&rp->r_rbp, (void *)rp->r_rsp);
1408 #endif
1409 #ifdef __amd64
1410 		}
1411 #endif
1412 
1413 		if (ret == -1) {
1414 			fasttrap_sigsegv(p, curthread, rp->r_rsp);
1415 			new_pc = pc;
1416 			break;
1417 		}
1418 
1419 		new_pc = pc + tp->ftt_size;
1420 		break;
1421 	}
1422 
1423 	case FASTTRAP_T_NOP:
1424 		new_pc = pc + tp->ftt_size;
1425 		break;
1426 
1427 	case FASTTRAP_T_JMP:
1428 	case FASTTRAP_T_CALL:
1429 		if (tp->ftt_code == 0) {
1430 			new_pc = tp->ftt_dest;
1431 		} else {
1432 #ifdef __amd64
1433 			uintptr_t value;
1434 #endif
1435 			uintptr_t addr = tp->ftt_dest;
1436 
1437 			if (tp->ftt_base != FASTTRAP_NOREG)
1438 				addr += fasttrap_getreg(rp, tp->ftt_base);
1439 			if (tp->ftt_index != FASTTRAP_NOREG)
1440 				addr += fasttrap_getreg(rp, tp->ftt_index) <<
1441 				    tp->ftt_scale;
1442 
1443 			if (tp->ftt_code == 1) {
1444 				/*
1445 				 * If there's a segment prefix for this
1446 				 * instruction, we'll need to check permissions
1447 				 * and bounds on the given selector, and adjust
1448 				 * the address accordingly.
1449 				 */
1450 				if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1451 				    fasttrap_do_seg(tp, rp, &addr) != 0) {
1452 					fasttrap_sigsegv(p, curthread, addr);
1453 					new_pc = pc;
1454 					break;
1455 				}
1456 
1457 #ifdef __amd64
1458 				if (p->p_model == DATAMODEL_NATIVE) {
1459 					if ((value = fasttrap_fulword((void *)addr))
1460 					     == -1) {
1461 						fasttrap_sigsegv(p, curthread,
1462 						    addr);
1463 						new_pc = pc;
1464 						break;
1465 					}
1466 					new_pc = value;
1467 				} else {
1468 #endif
1469 #ifdef __i386__
1470 					uint32_t value32;
1471 					addr = (uintptr_t)(uint32_t)addr;
1472 					if ((value32 = fasttrap_fuword32((void *)addr))
1473 					    == -1) {
1474 						fasttrap_sigsegv(p, curthread,
1475 						    addr);
1476 						new_pc = pc;
1477 						break;
1478 					}
1479 					new_pc = value32;
1480 #endif
1481 				}
1482 #ifdef __amd64
1483 			} else {
1484 				new_pc = addr;
1485 			}
1486 #endif
1487 		}
1488 
1489 		/*
1490 		 * If this is a call instruction, we need to push the return
1491 		 * address onto the stack. If this fails, we send the process
1492 		 * a SIGSEGV and reset the pc to emulate what would happen if
1493 		 * this instruction weren't traced.
1494 		 */
1495 		if (tp->ftt_type == FASTTRAP_T_CALL) {
1496 			int ret = 0;
1497 			uintptr_t addr = 0, pcps;
1498 #ifdef __amd64
1499 			if (p->p_model == DATAMODEL_NATIVE) {
1500 				addr = rp->r_rsp - sizeof (uintptr_t);
1501 				pcps = pc + tp->ftt_size;
1502 				ret = fasttrap_sulword((void *)addr, &pcps);
1503 			} else {
1504 #endif
1505 #ifdef __i386__
1506 				addr = rp->r_rsp - sizeof (uint32_t);
1507 				pcps = (uint32_t)(pc + tp->ftt_size);
1508 				ret = fasttrap_suword32((void *)addr, &pcps);
1509 #endif
1510 #ifdef __amd64
1511 			}
1512 #endif
1513 
1514 			if (ret == -1) {
1515 				fasttrap_sigsegv(p, curthread, addr);
1516 				new_pc = pc;
1517 				break;
1518 			}
1519 
1520 			rp->r_rsp = addr;
1521 		}
1522 
1523 		break;
1524 
1525 	case FASTTRAP_T_COMMON:
1526 	{
1527 		uintptr_t addr;
1528 #if defined(__amd64)
1529 		uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1530 #else
1531 		uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1532 #endif
1533 		uint_t i = 0;
1534 #if defined(sun)
1535 		klwp_t *lwp = ttolwp(curthread);
1536 #endif
1537 
1538 		/*
1539 		 * Compute the address of the ulwp_t and step over the
1540 		 * ul_self pointer. The method used to store the user-land
1541 		 * thread pointer is very different on 32- and 64-bit
1542 		 * kernels.
1543 		 */
1544 #if defined(sun)
1545 #if defined(__amd64)
1546 		if (p->p_model == DATAMODEL_LP64) {
1547 			addr = lwp->lwp_pcb.pcb_fsbase;
1548 			addr += sizeof (void *);
1549 		} else {
1550 			addr = lwp->lwp_pcb.pcb_gsbase;
1551 			addr += sizeof (caddr32_t);
1552 		}
1553 #else
1554 		addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc);
1555 		addr += sizeof (void *);
1556 #endif
1557 #endif /* sun */
1558 #ifdef __i386__
1559 		addr = USD_GETBASE(&curthread->td_pcb->pcb_gsd);
1560 #else
1561 		addr = curthread->td_pcb->pcb_gsbase;
1562 #endif
1563 		addr += sizeof (void *);
1564 
1565 		/*
1566 		 * Generic Instruction Tracing
1567 		 * ---------------------------
1568 		 *
1569 		 * This is the layout of the scratch space in the user-land
1570 		 * thread structure for our generated instructions.
1571 		 *
1572 		 *	32-bit mode			bytes
1573 		 *	------------------------	-----
1574 		 * a:	<original instruction>		<= 15
1575 		 *	jmp	<pc + tp->ftt_size>	    5
1576 		 * b:	<original instruction>		<= 15
1577 		 *	int	T_DTRACE_RET		    2
1578 		 *					-----
1579 		 *					<= 37
1580 		 *
1581 		 *	64-bit mode			bytes
1582 		 *	------------------------	-----
1583 		 * a:	<original instruction>		<= 15
1584 		 *	jmp	0(%rip)			    6
1585 		 *	<pc + tp->ftt_size>		    8
1586 		 * b:	<original instruction>		<= 15
1587 		 * 	int	T_DTRACE_RET		    2
1588 		 * 					-----
1589 		 * 					<= 46
1590 		 *
1591 		 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1592 		 * to b. If we encounter a signal on the way out of the
1593 		 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1594 		 * so that we execute the original instruction and re-enter
1595 		 * the kernel rather than redirecting to the next instruction.
1596 		 *
1597 		 * If there are return probes (so we know that we're going to
1598 		 * need to reenter the kernel after executing the original
1599 		 * instruction), the scratch space will just contain the
1600 		 * original instruction followed by an interrupt -- the same
1601 		 * data as at b.
1602 		 *
1603 		 * %rip-relative Addressing
1604 		 * ------------------------
1605 		 *
1606 		 * There's a further complication in 64-bit mode due to %rip-
1607 		 * relative addressing. While this is clearly a beneficial
1608 		 * architectural decision for position independent code, it's
1609 		 * hard not to see it as a personal attack against the pid
1610 		 * provider since before there was a relatively small set of
1611 		 * instructions to emulate; with %rip-relative addressing,
1612 		 * almost every instruction can potentially depend on the
1613 		 * address at which it's executed. Rather than emulating
1614 		 * the broad spectrum of instructions that can now be
1615 		 * position dependent, we emulate jumps and others as in
1616 		 * 32-bit mode, and take a different tack for instructions
1617 		 * using %rip-relative addressing.
1618 		 *
1619 		 * For every instruction that uses the ModRM byte, the
1620 		 * in-kernel disassembler reports its location. We use the
1621 		 * ModRM byte to identify that an instruction uses
1622 		 * %rip-relative addressing and to see what other registers
1623 		 * the instruction uses. To emulate those instructions,
1624 		 * we modify the instruction to be %rax-relative rather than
1625 		 * %rip-relative (or %rcx-relative if the instruction uses
1626 		 * %rax; or %r8- or %r9-relative if the REX.B is present so
1627 		 * we don't have to rewrite the REX prefix). We then load
1628 		 * the value that %rip would have been into the scratch
1629 		 * register and generate an instruction to reset the scratch
1630 		 * register back to its original value. The instruction
1631 		 * sequence looks like this:
1632 		 *
1633 		 *	64-mode %rip-relative		bytes
1634 		 *	------------------------	-----
1635 		 * a:	<modified instruction>		<= 15
1636 		 *	movq	$<value>, %<scratch>	    6
1637 		 *	jmp	0(%rip)			    6
1638 		 *	<pc + tp->ftt_size>		    8
1639 		 * b:	<modified instruction>  	<= 15
1640 		 * 	int	T_DTRACE_RET		    2
1641 		 * 					-----
1642 		 *					   52
1643 		 *
1644 		 * We set curthread->t_dtrace_regv so that upon receiving
1645 		 * a signal we can reset the value of the scratch register.
1646 		 */
1647 
1648 		ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1649 
1650 		curthread->t_dtrace_scrpc = addr;
1651 		bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1652 		i += tp->ftt_size;
1653 
1654 #ifdef __amd64
1655 		if (tp->ftt_ripmode != 0) {
1656 			greg_t *reg = NULL;
1657 
1658 			ASSERT(p->p_model == DATAMODEL_LP64);
1659 			ASSERT(tp->ftt_ripmode &
1660 			    (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
1661 
1662 			/*
1663 			 * If this was a %rip-relative instruction, we change
1664 			 * it to be either a %rax- or %rcx-relative
1665 			 * instruction (depending on whether those registers
1666 			 * are used as another operand; or %r8- or %r9-
1667 			 * relative depending on the value of REX.B). We then
1668 			 * set that register and generate a movq instruction
1669 			 * to reset the value.
1670 			 */
1671 			if (tp->ftt_ripmode & FASTTRAP_RIP_X)
1672 				scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
1673 			else
1674 				scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
1675 
1676 			if (tp->ftt_ripmode & FASTTRAP_RIP_1)
1677 				scratch[i++] = FASTTRAP_MOV_EAX;
1678 			else
1679 				scratch[i++] = FASTTRAP_MOV_ECX;
1680 
1681 			switch (tp->ftt_ripmode) {
1682 			case FASTTRAP_RIP_1:
1683 				reg = &rp->r_rax;
1684 				curthread->t_dtrace_reg = REG_RAX;
1685 				break;
1686 			case FASTTRAP_RIP_2:
1687 				reg = &rp->r_rcx;
1688 				curthread->t_dtrace_reg = REG_RCX;
1689 				break;
1690 			case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
1691 				reg = &rp->r_r8;
1692 				curthread->t_dtrace_reg = REG_R8;
1693 				break;
1694 			case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
1695 				reg = &rp->r_r9;
1696 				curthread->t_dtrace_reg = REG_R9;
1697 				break;
1698 			}
1699 
1700 			/* LINTED - alignment */
1701 			*(uint64_t *)&scratch[i] = *reg;
1702 			curthread->t_dtrace_regv = *reg;
1703 			*reg = pc + tp->ftt_size;
1704 			i += sizeof (uint64_t);
1705 		}
1706 #endif
1707 
1708 		/*
1709 		 * Generate the branch instruction to what would have
1710 		 * normally been the subsequent instruction. In 32-bit mode,
1711 		 * this is just a relative branch; in 64-bit mode this is a
1712 		 * %rip-relative branch that loads the 64-bit pc value
1713 		 * immediately after the jmp instruction.
1714 		 */
1715 #ifdef __amd64
1716 		if (p->p_model == DATAMODEL_LP64) {
1717 			scratch[i++] = FASTTRAP_GROUP5_OP;
1718 			scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
1719 			/* LINTED - alignment */
1720 			*(uint32_t *)&scratch[i] = 0;
1721 			i += sizeof (uint32_t);
1722 			/* LINTED - alignment */
1723 			*(uint64_t *)&scratch[i] = pc + tp->ftt_size;
1724 			i += sizeof (uint64_t);
1725 		} else {
1726 #endif
1727 #ifdef __i386__
1728 			/*
1729 			 * Set up the jmp to the next instruction; note that
1730 			 * the size of the traced instruction cancels out.
1731 			 */
1732 			scratch[i++] = FASTTRAP_JMP32;
1733 			/* LINTED - alignment */
1734 			*(uint32_t *)&scratch[i] = pc - addr - 5;
1735 			i += sizeof (uint32_t);
1736 #endif
1737 #ifdef __amd64
1738 		}
1739 #endif
1740 
1741 		curthread->t_dtrace_astpc = addr + i;
1742 		bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1743 		i += tp->ftt_size;
1744 		scratch[i++] = FASTTRAP_INT;
1745 		scratch[i++] = T_DTRACE_RET;
1746 
1747 		ASSERT(i <= sizeof (scratch));
1748 
1749 #if defined(sun)
1750 		if (fasttrap_copyout(scratch, (char *)addr, i)) {
1751 #else
1752 		if (uwrite(curproc, scratch, i, addr)) {
1753 #endif
1754 			fasttrap_sigtrap(p, curthread, pc);
1755 			new_pc = pc;
1756 			break;
1757 		}
1758 		if (tp->ftt_retids != NULL) {
1759 			curthread->t_dtrace_step = 1;
1760 			curthread->t_dtrace_ret = 1;
1761 			new_pc = curthread->t_dtrace_astpc;
1762 		} else {
1763 			new_pc = curthread->t_dtrace_scrpc;
1764 		}
1765 
1766 		curthread->t_dtrace_pc = pc;
1767 		curthread->t_dtrace_npc = pc + tp->ftt_size;
1768 		curthread->t_dtrace_on = 1;
1769 		break;
1770 	}
1771 
1772 	default:
1773 		panic("fasttrap: mishandled an instruction");
1774 	}
1775 
1776 done:
1777 	/*
1778 	 * If there were no return probes when we first found the tracepoint,
1779 	 * we should feel no obligation to honor any return probes that were
1780 	 * subsequently enabled -- they'll just have to wait until the next
1781 	 * time around.
1782 	 */
1783 	if (tp->ftt_retids != NULL) {
1784 		/*
1785 		 * We need to wait until the results of the instruction are
1786 		 * apparent before invoking any return probes. If this
1787 		 * instruction was emulated we can just call
1788 		 * fasttrap_return_common(); if it needs to be executed, we
1789 		 * need to wait until the user thread returns to the kernel.
1790 		 */
1791 		if (tp->ftt_type != FASTTRAP_T_COMMON) {
1792 			/*
1793 			 * Set the program counter to the address of the traced
1794 			 * instruction so that it looks right in ustack()
1795 			 * output. We had previously set it to the end of the
1796 			 * instruction to simplify %rip-relative addressing.
1797 			 */
1798 			rp->r_rip = pc;
1799 
1800 			fasttrap_return_common(rp, pc, pid, new_pc);
1801 		} else {
1802 			ASSERT(curthread->t_dtrace_ret != 0);
1803 			ASSERT(curthread->t_dtrace_pc == pc);
1804 			ASSERT(curthread->t_dtrace_scrpc != 0);
1805 			ASSERT(new_pc == curthread->t_dtrace_astpc);
1806 		}
1807 	}
1808 
1809 	rp->r_rip = new_pc;
1810 
1811 	PROC_LOCK(p);
1812 	proc_write_regs(curthread, rp);
1813 	_PRELE(p);
1814 	PROC_UNLOCK(p);
1815 
1816 	return (0);
1817 }
1818 
1819 int
1820 fasttrap_return_probe(struct reg *rp)
1821 {
1822 	proc_t *p = curproc;
1823 	uintptr_t pc = curthread->t_dtrace_pc;
1824 	uintptr_t npc = curthread->t_dtrace_npc;
1825 
1826 	curthread->t_dtrace_pc = 0;
1827 	curthread->t_dtrace_npc = 0;
1828 	curthread->t_dtrace_scrpc = 0;
1829 	curthread->t_dtrace_astpc = 0;
1830 
1831 #if defined(sun)
1832 	/*
1833 	 * Treat a child created by a call to vfork(2) as if it were its
1834 	 * parent. We know that there's only one thread of control in such a
1835 	 * process: this one.
1836 	 */
1837 	while (p->p_flag & SVFORK) {
1838 		p = p->p_parent;
1839 	}
1840 #endif
1841 
1842 	/*
1843 	 * We set rp->r_rip to the address of the traced instruction so
1844 	 * that it appears to dtrace_probe() that we're on the original
1845 	 * instruction, and so that the user can't easily detect our
1846 	 * complex web of lies. dtrace_return_probe() (our caller)
1847 	 * will correctly set %pc after we return.
1848 	 */
1849 	rp->r_rip = pc;
1850 
1851 	fasttrap_return_common(rp, pc, p->p_pid, npc);
1852 
1853 	return (0);
1854 }
1855 
1856 /*ARGSUSED*/
1857 uint64_t
1858 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1859     int aframes)
1860 {
1861 	struct reg r;
1862 
1863 	fill_regs(curthread, &r);
1864 
1865 	return (fasttrap_anarg(&r, 1, argno));
1866 }
1867 
1868 /*ARGSUSED*/
1869 uint64_t
1870 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1871     int aframes)
1872 {
1873 	struct reg r;
1874 
1875 	fill_regs(curthread, &r);
1876 
1877 	return (fasttrap_anarg(&r, 0, argno));
1878 }
1879 
1880 static ulong_t
1881 fasttrap_getreg(struct reg *rp, uint_t reg)
1882 {
1883 #ifdef __amd64
1884 	switch (reg) {
1885 	case REG_R15:		return (rp->r_r15);
1886 	case REG_R14:		return (rp->r_r14);
1887 	case REG_R13:		return (rp->r_r13);
1888 	case REG_R12:		return (rp->r_r12);
1889 	case REG_R11:		return (rp->r_r11);
1890 	case REG_R10:		return (rp->r_r10);
1891 	case REG_R9:		return (rp->r_r9);
1892 	case REG_R8:		return (rp->r_r8);
1893 	case REG_RDI:		return (rp->r_rdi);
1894 	case REG_RSI:		return (rp->r_rsi);
1895 	case REG_RBP:		return (rp->r_rbp);
1896 	case REG_RBX:		return (rp->r_rbx);
1897 	case REG_RDX:		return (rp->r_rdx);
1898 	case REG_RCX:		return (rp->r_rcx);
1899 	case REG_RAX:		return (rp->r_rax);
1900 	case REG_TRAPNO:	return (rp->r_trapno);
1901 	case REG_ERR:		return (rp->r_err);
1902 	case REG_RIP:		return (rp->r_rip);
1903 	case REG_CS:		return (rp->r_cs);
1904 #if defined(sun)
1905 	case REG_RFL:		return (rp->r_rfl);
1906 #endif
1907 	case REG_RSP:		return (rp->r_rsp);
1908 	case REG_SS:		return (rp->r_ss);
1909 	case REG_FS:		return (rp->r_fs);
1910 	case REG_GS:		return (rp->r_gs);
1911 	case REG_DS:		return (rp->r_ds);
1912 	case REG_ES:		return (rp->r_es);
1913 	case REG_FSBASE:	return (rdmsr(MSR_FSBASE));
1914 	case REG_GSBASE:	return (rdmsr(MSR_GSBASE));
1915 	}
1916 
1917 	panic("dtrace: illegal register constant");
1918 	/*NOTREACHED*/
1919 #else
1920 #define _NGREG 19
1921 	if (reg >= _NGREG)
1922 		panic("dtrace: illegal register constant");
1923 
1924 	return (((greg_t *)&rp->r_gs)[reg]);
1925 #endif
1926 }
1927