1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _VMM_LAPIC_H_ 30 #define _VMM_LAPIC_H_ 31 32 struct vm; 33 34 boolean_t lapic_msr(u_int num); 35 int lapic_rdmsr(struct vm *vm, int cpu, u_int msr, uint64_t *rval); 36 int lapic_wrmsr(struct vm *vm, int cpu, u_int msr, uint64_t wval); 37 38 int lapic_mmio_read(void *vm, int cpu, uint64_t gpa, 39 uint64_t *rval, int size, void *arg); 40 int lapic_mmio_write(void *vm, int cpu, uint64_t gpa, 41 uint64_t wval, int size, void *arg); 42 43 int lapic_timer_tick(struct vm *vm, int cpu); 44 45 /* 46 * Returns a vector between 32 and 255 if an interrupt is pending in the 47 * IRR that can be delivered based on the current state of ISR and TPR. 48 * 49 * Note that the vector does not automatically transition to the ISR as a 50 * result of calling this function. 51 * 52 * Returns -1 if there is no eligible vector that can be delivered to the 53 * guest at this time. 54 */ 55 int lapic_pending_intr(struct vm *vm, int cpu); 56 57 /* 58 * Transition 'vector' from IRR to ISR. This function is called with the 59 * vector returned by 'lapic_pending_intr()' when the guest is able to 60 * accept this interrupt (i.e. RFLAGS.IF = 1 and no conditions exist that 61 * block interrupt delivery). 62 */ 63 void lapic_intr_accepted(struct vm *vm, int cpu, int vector); 64 65 /* 66 * Signals to the LAPIC that an interrupt at 'vector' needs to be generated 67 * to the 'cpu', the state is recorded in IRR. 68 */ 69 int lapic_set_intr(struct vm *vm, int cpu, int vector); 70 71 #endif 72